LXR linux/drivers/soc/fsl/qbman/dpaa

   1/* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
   2 *
   3 * Redistribution and use in source and binary forms, with or without
   4 * modification, are permitted provided that the following conditions are met:
   5 *     * Redistributions of source code must retain the above copyright
   6 *       notice, this list of conditions and the following disclaimer.
   7 *     * Redistributions in binary form must reproduce the above copyright
   8 *       notice, this list of conditions and the following disclaimer in the
   9 *       documentation and/or other materials provided with the distribution.
  10 *     * Neither the name of Freescale Semiconductor nor the
  11 *       names of its contributors may be used to endorse or promote products
  12 *       derived from this software without specific prior written permission.
  13 *
  14 * ALTERNATIVELY, this software may be distributed under the terms of the
  15 * GNU General Public License ("GPL") as published by the Free Software
  16 * Foundation, either version 2 of that License or (at your option) any
  17 * later version.
  18 *
  19 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  20 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29 */
  30
  31#ifndef __DPAA_SYS_H
  32#define __DPAA_SYS_H
  33
  34#include <linux/cpu.h>
  35#include <linux/slab.h>
  36#include <linux/module.h>
  37#include <linux/interrupt.h>
  38#include <linux/kthread.h>
  39#include <linux/sched/signal.h>
  40#include <linux/vmalloc.h>
  41#include <linux/platform_device.h>
  42#include <linux/of.h>
  43#include <linux/of_reserved_mem.h>
  44#include <linux/prefetch.h>
  45#include <linux/genalloc.h>
  46#include <asm/cacheflush.h>
  47#include <linux/io.h>
  48#include <linux/delay.h>
  49
  50/* For 2-element tables related to cache-inhibited and cache-enabled mappings */
  51#define DPAA_PORTAL_CE 0
  52#define DPAA_PORTAL_CI 1
  53
  54static inline void dpaa_flush(void *p)
  55{
  56        /*
  57         * Only PPC needs to flush the cache currently - on ARM the mapping
  58         * is non cacheable
  59         */
  60#ifdef CONFIG_PPC
  61        flush_dcache_range((unsigned long)p, (unsigned long)p+64);
  62#endif
  63}
  64
  65#define dpaa_invalidate(p) dpaa_flush(p)
  66
  67#define dpaa_zero(p) memset(p, 0, 64)
  68
  69static inline void dpaa_touch_ro(void *p)
  70{
  71#if (L1_CACHE_BYTES == 32)
  72        prefetch(p+32);
  73#endif
  74        prefetch(p);
  75}
  76
  77/* Commonly used combo */
  78static inline void dpaa_invalidate_touch_ro(void *p)
  79{
  80        dpaa_invalidate(p);
  81        dpaa_touch_ro(p);
  82}
  83
  84
  85#ifdef CONFIG_FSL_DPAA_CHECKING
  86#define DPAA_ASSERT(x) WARN_ON(!(x))
  87#else
  88#define DPAA_ASSERT(x)
  89#endif
  90
  91/* cyclic helper for rings */
  92static inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last)
  93{
  94        /* 'first' is included, 'last' is excluded */
  95        if (first <= last)
  96                return last - first;
  97        return ringsize + last - first;
  98}
  99
 100/* Offset applied to genalloc pools due to zero being an error return */
 101#define DPAA_GENALLOC_OFF       0x80000000
 102
 103/* Initialize the devices private memory region */
 104int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr,
 105                                size_t *size);
 106
 107/* memremap() attributes for different platforms */
 108#ifdef CONFIG_PPC
 109#define QBMAN_MEMREMAP_ATTR     MEMREMAP_WB
 110#else
 111#define QBMAN_MEMREMAP_ATTR     MEMREMAP_WC
 112#endif
 113
 114static inline int dpaa_set_portal_irq_affinity(struct device *dev,
 115                                               int irq, int cpu)
 116{
 117        int ret = 0;
 118
 119        if (!irq_can_set_affinity(irq)) {
 120                dev_err(dev, "unable to set IRQ affinity\n");
 121                return -EINVAL;
 122        }
 123
 124        if (cpu == -1 || !cpu_online(cpu))
 125                cpu = cpumask_any(cpu_online_mask);
 126
 127        ret = irq_set_affinity(irq, cpumask_of(cpu));
 128        if (ret)
 129                dev_err(dev, "irq_set_affinity() on CPU %d failed\n", cpu);
 130
 131        return ret;
 132}
 133
 134#endif  /* __DPAA_SYS_H */
 135