1
2
3
4
5
6
7
8#include <linux/init.h>
9#include <linux/io.h>
10#include <linux/of.h>
11#include <linux/of_address.h>
12#include <linux/of_fdt.h>
13#include <linux/platform_device.h>
14#include <linux/irqchip.h>
15#include <linux/soc/samsung/exynos-regs-pmu.h>
16
17#include <asm/cacheflush.h>
18#include <asm/hardware/cache-l2x0.h>
19#include <asm/mach/arch.h>
20#include <asm/mach/map.h>
21
22#include "common.h"
23
24#define S3C_ADDR_BASE 0xF6000000
25#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x))
26#define S5P_VA_CHIPID S3C_ADDR(0x02000000)
27
28static struct platform_device exynos_cpuidle = {
29 .name = "exynos_cpuidle",
30#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
31 .dev.platform_data = exynos_enter_aftr,
32#endif
33 .id = -1,
34};
35
36void __iomem *sysram_base_addr __ro_after_init;
37phys_addr_t sysram_base_phys __ro_after_init;
38void __iomem *sysram_ns_base_addr __ro_after_init;
39
40unsigned long exynos_cpu_id;
41static unsigned int exynos_cpu_rev;
42
43unsigned int exynos_rev(void)
44{
45 return exynos_cpu_rev;
46}
47
48void __init exynos_sysram_init(void)
49{
50 struct device_node *node;
51
52 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
53 if (!of_device_is_available(node))
54 continue;
55 sysram_base_addr = of_iomap(node, 0);
56 sysram_base_phys = of_translate_address(node,
57 of_get_address(node, 0, NULL, NULL));
58 of_node_put(node);
59 break;
60 }
61
62 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
63 if (!of_device_is_available(node))
64 continue;
65 sysram_ns_base_addr = of_iomap(node, 0);
66 of_node_put(node);
67 break;
68 }
69}
70
71static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
72 int depth, void *data)
73{
74 struct map_desc iodesc;
75 const __be32 *reg;
76 int len;
77
78 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid"))
79 return 0;
80
81 reg = of_get_flat_dt_prop(node, "reg", &len);
82 if (reg == NULL || len != (sizeof(unsigned long) * 2))
83 return 0;
84
85 iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
86 iodesc.length = be32_to_cpu(reg[1]) - 1;
87 iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
88 iodesc.type = MT_DEVICE;
89 iotable_init(&iodesc, 1);
90 return 1;
91}
92
93static void __init exynos_init_io(void)
94{
95 debug_ll_io_init();
96
97 of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
98
99
100 exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID);
101 exynos_cpu_rev = exynos_cpu_id & 0xFF;
102
103 pr_info("Samsung CPU ID: 0x%08lx\n", exynos_cpu_id);
104
105}
106
107
108
109
110
111
112
113
114
115
116
117
118void exynos_set_delayed_reset_assertion(bool enable)
119{
120 if (of_machine_is_compatible("samsung,exynos4")) {
121 unsigned int tmp, core_id;
122
123 for (core_id = 0; core_id < num_possible_cpus(); core_id++) {
124 tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
125 if (enable)
126 tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
127 else
128 tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
129 pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
130 }
131 }
132}
133
134
135
136
137
138
139static const struct of_device_id exynos_dt_pmu_match[] = {
140 { .compatible = "samsung,exynos5260-pmu" },
141 { .compatible = "samsung,exynos5410-pmu" },
142 { },
143};
144
145static void exynos_map_pmu(void)
146{
147 struct device_node *np;
148
149 np = of_find_matching_node(NULL, exynos_dt_pmu_match);
150 if (np)
151 pmu_base_addr = of_iomap(np, 0);
152}
153
154static void __init exynos_init_irq(void)
155{
156 irqchip_init();
157
158
159
160
161
162 exynos_map_pmu();
163}
164
165static void __init exynos_dt_machine_init(void)
166{
167
168
169
170
171 if (!IS_ENABLED(CONFIG_SMP))
172 exynos_sysram_init();
173
174#if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE)
175 if (of_machine_is_compatible("samsung,exynos4210") ||
176 of_machine_is_compatible("samsung,exynos3250"))
177 exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
178#endif
179 if (of_machine_is_compatible("samsung,exynos4210") ||
180 (of_machine_is_compatible("samsung,exynos4412") &&
181 (of_machine_is_compatible("samsung,trats2") ||
182 of_machine_is_compatible("samsung,midas") ||
183 of_machine_is_compatible("samsung,p4note"))) ||
184 of_machine_is_compatible("samsung,exynos3250") ||
185 of_machine_is_compatible("samsung,exynos5250"))
186 platform_device_register(&exynos_cpuidle);
187}
188
189static char const *const exynos_dt_compat[] __initconst = {
190 "samsung,exynos3",
191 "samsung,exynos3250",
192 "samsung,exynos4",
193 "samsung,exynos4210",
194 "samsung,exynos4412",
195 "samsung,exynos5",
196 "samsung,exynos5250",
197 "samsung,exynos5260",
198 "samsung,exynos5420",
199 NULL
200};
201
202static void __init exynos_dt_fixup(void)
203{
204
205
206
207
208 of_fdt_limit_memory(8);
209}
210
211DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)")
212 .l2c_aux_val = 0x08400000,
213 .l2c_aux_mask = 0xf60fffff,
214 .smp = smp_ops(exynos_smp_ops),
215 .map_io = exynos_init_io,
216 .init_early = exynos_firmware_init,
217 .init_irq = exynos_init_irq,
218 .init_machine = exynos_dt_machine_init,
219 .init_late = exynos_pm_init,
220 .dt_compat = exynos_dt_compat,
221 .dt_fixup = exynos_dt_fixup,
222MACHINE_END
223