LXR linux/drivers/clk/mediatek/clk-mt2701-g3d.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Copyright (c) 2018 MediaTek Inc.
   4 * Author: Sean Wang <sean.wang@mediatek.com>
   5 *
   6 */
   7
   8#include <linux/clk-provider.h>
   9#include <linux/of.h>
  10#include <linux/of_address.h>
  11#include <linux/of_device.h>
  12#include <linux/platform_device.h>
  13
  14#include "clk-mtk.h"
  15#include "clk-gate.h"
  16
  17#include <dt-bindings/clock/mt2701-clk.h>
  18
  19#define GATE_G3D(_id, _name, _parent, _shift) { \
  20                .id = _id,                              \
  21                .name = _name,                          \
  22                .parent_name = _parent,                 \
  23                .regs = &g3d_cg_regs,                   \
  24                .shift = _shift,                        \
  25                .ops = &mtk_clk_gate_ops_setclr,        \
  26        }
  27
  28static const struct mtk_gate_regs g3d_cg_regs = {
  29        .sta_ofs = 0x0,
  30        .set_ofs = 0x4,
  31        .clr_ofs = 0x8,
  32};
  33
  34static const struct mtk_gate g3d_clks[] = {
  35        GATE_G3D(CLK_G3DSYS_CORE, "g3d_core", "mfg_sel", 0),
  36};
  37
  38static int clk_mt2701_g3dsys_init(struct platform_device *pdev)
  39{
  40        struct clk_onecell_data *clk_data;
  41        struct device_node *node = pdev->dev.of_node;
  42        int r;
  43
  44        clk_data = mtk_alloc_clk_data(CLK_G3DSYS_NR);
  45
  46        mtk_clk_register_gates(node, g3d_clks, ARRAY_SIZE(g3d_clks),
  47                               clk_data);
  48
  49        r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
  50        if (r)
  51                dev_err(&pdev->dev,
  52                        "could not register clock provider: %s: %d\n",
  53                        pdev->name, r);
  54
  55        mtk_register_reset_controller(node, 1, 0xc);
  56
  57        return r;
  58}
  59
  60static const struct of_device_id of_match_clk_mt2701_g3d[] = {
  61        {
  62                .compatible = "mediatek,mt2701-g3dsys",
  63                .data = clk_mt2701_g3dsys_init,
  64        }, {
  65                /* sentinel */
  66        }
  67};
  68
  69static int clk_mt2701_g3d_probe(struct platform_device *pdev)
  70{
  71        int (*clk_init)(struct platform_device *);
  72        int r;
  73
  74        clk_init = of_device_get_match_data(&pdev->dev);
  75        if (!clk_init)
  76                return -EINVAL;
  77
  78        r = clk_init(pdev);
  79        if (r)
  80                dev_err(&pdev->dev,
  81                        "could not register clock provider: %s: %d\n",
  82                        pdev->name, r);
  83
  84        return r;
  85}
  86
  87static struct platform_driver clk_mt2701_g3d_drv = {
  88        .probe = clk_mt2701_g3d_probe,
  89        .driver = {
  90                .name = "clk-mt2701-g3d",
  91                .of_match_table = of_match_clk_mt2701_g3d,
  92        },
  93};
  94
  95builtin_platform_driver(clk_mt2701_g3d_drv);
  96