LXR linux/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx

   1/*
   2 * Copyright 2019 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 */
  22
  23
  24
  25void kgd_gfx_v9_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
  26                uint32_t sh_mem_config,
  27                uint32_t sh_mem_ape1_base, uint32_t sh_mem_ape1_limit,
  28                uint32_t sh_mem_bases);
  29int kgd_gfx_v9_set_pasid_vmid_mapping(struct kgd_dev *kgd, u32 pasid,
  30                unsigned int vmid);
  31int kgd_gfx_v9_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id);
  32int kgd_gfx_v9_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
  33                        uint32_t queue_id, uint32_t __user *wptr,
  34                        uint32_t wptr_shift, uint32_t wptr_mask,
  35                        struct mm_struct *mm);
  36int kgd_gfx_v9_hiq_mqd_load(struct kgd_dev *kgd, void *mqd,
  37                            uint32_t pipe_id, uint32_t queue_id,
  38                            uint32_t doorbell_off);
  39int kgd_gfx_v9_hqd_dump(struct kgd_dev *kgd,
  40                        uint32_t pipe_id, uint32_t queue_id,
  41                        uint32_t (**dump)[2], uint32_t *n_regs);
  42bool kgd_gfx_v9_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
  43                uint32_t pipe_id, uint32_t queue_id);
  44int kgd_gfx_v9_hqd_destroy(struct kgd_dev *kgd, void *mqd,
  45                                enum kfd_preempt_type reset_type,
  46                                unsigned int utimeout, uint32_t pipe_id,
  47                                uint32_t queue_id);
  48int kgd_gfx_v9_address_watch_disable(struct kgd_dev *kgd);
  49int kgd_gfx_v9_address_watch_execute(struct kgd_dev *kgd,
  50                                        unsigned int watch_point_id,
  51                                        uint32_t cntl_val,
  52                                        uint32_t addr_hi,
  53                                        uint32_t addr_lo);
  54int kgd_gfx_v9_wave_control_execute(struct kgd_dev *kgd,
  55                                        uint32_t gfx_index_val,
  56                                        uint32_t sq_cmd);
  57uint32_t kgd_gfx_v9_address_watch_get_offset(struct kgd_dev *kgd,
  58                                        unsigned int watch_point_id,
  59                                        unsigned int reg_offset);
  60
  61bool kgd_gfx_v9_get_atc_vmid_pasid_mapping_info(struct kgd_dev *kgd,
  62                                        uint8_t vmid, uint16_t *p_pasid);
  63
  64void kgd_gfx_v9_set_vm_context_page_table_base(struct kgd_dev *kgd,
  65                        uint32_t vmid, uint64_t page_table_base);
  66void kgd_gfx_v9_get_cu_occupancy(struct kgd_dev *kgd, int pasid,
  67                int *pasid_wave_cnt, int *max_waves_per_cu);
  68void kgd_gfx_v9_program_trap_handler_settings(struct kgd_dev *kgd,
  69                uint32_t vmid, uint64_t tba_addr, uint64_t tma_addr);
  70