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21#include <linux/interrupt.h>
22#include <linux/device.h>
23#include <linux/kernel.h>
24#include <linux/sysfs.h>
25#include <linux/i2c.h>
26#include <linux/regulator/consumer.h>
27#include <linux/slab.h>
28#include <linux/types.h>
29#include <linux/err.h>
30#include <linux/module.h>
31#include <linux/bitops.h>
32
33#include <linux/iio/iio.h>
34#include <linux/iio/sysfs.h>
35#include <linux/iio/events.h>
36#include <linux/iio/buffer.h>
37#include <linux/iio/trigger_consumer.h>
38#include <linux/iio/triggered_buffer.h>
39
40#define AD799X_CHANNEL_SHIFT 4
41
42
43
44
45
46#define AD7991_REF_SEL 0x08
47#define AD7991_FLTR 0x04
48#define AD7991_BIT_TRIAL_DELAY 0x02
49#define AD7991_SAMPLE_DELAY 0x01
50
51
52
53
54
55#define AD7998_FLTR BIT(3)
56#define AD7998_ALERT_EN BIT(2)
57#define AD7998_BUSY_ALERT BIT(1)
58#define AD7998_BUSY_ALERT_POL BIT(0)
59
60#define AD7998_CONV_RES_REG 0x0
61#define AD7998_ALERT_STAT_REG 0x1
62#define AD7998_CONF_REG 0x2
63#define AD7998_CYCLE_TMR_REG 0x3
64
65#define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
66#define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
67#define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
68
69#define AD7998_CYC_MASK GENMASK(2, 0)
70#define AD7998_CYC_DIS 0x0
71#define AD7998_CYC_TCONF_32 0x1
72#define AD7998_CYC_TCONF_64 0x2
73#define AD7998_CYC_TCONF_128 0x3
74#define AD7998_CYC_TCONF_256 0x4
75#define AD7998_CYC_TCONF_512 0x5
76#define AD7998_CYC_TCONF_1024 0x6
77#define AD7998_CYC_TCONF_2048 0x7
78
79#define AD7998_ALERT_STAT_CLEAR 0xFF
80
81
82
83
84
85#define AD7997_8_READ_SINGLE BIT(7)
86#define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4))
87
88enum {
89 ad7991,
90 ad7995,
91 ad7999,
92 ad7992,
93 ad7993,
94 ad7994,
95 ad7997,
96 ad7998
97};
98
99
100
101
102
103
104
105struct ad799x_chip_config {
106 const struct iio_chan_spec channel[9];
107 u16 default_config;
108 const struct iio_info *info;
109};
110
111
112
113
114
115
116
117struct ad799x_chip_info {
118 int num_channels;
119 const struct ad799x_chip_config noirq_config;
120 const struct ad799x_chip_config irq_config;
121};
122
123struct ad799x_state {
124 struct i2c_client *client;
125 const struct ad799x_chip_config *chip_config;
126 struct regulator *reg;
127 struct regulator *vref;
128 unsigned id;
129 u16 config;
130
131 u8 *rx_buf;
132 unsigned int transfer_size;
133};
134
135static int ad799x_write_config(struct ad799x_state *st, u16 val)
136{
137 switch (st->id) {
138 case ad7997:
139 case ad7998:
140 return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
141 val);
142 case ad7992:
143 case ad7993:
144 case ad7994:
145 return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
146 val);
147 default:
148
149 st->config = val;
150 return 0;
151 }
152}
153
154static int ad799x_read_config(struct ad799x_state *st)
155{
156 switch (st->id) {
157 case ad7997:
158 case ad7998:
159 return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
160 case ad7992:
161 case ad7993:
162 case ad7994:
163 return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
164 default:
165
166 return st->config;
167 }
168}
169
170static int ad799x_update_config(struct ad799x_state *st, u16 config)
171{
172 int ret;
173
174 ret = ad799x_write_config(st, config);
175 if (ret < 0)
176 return ret;
177 ret = ad799x_read_config(st);
178 if (ret < 0)
179 return ret;
180 st->config = ret;
181
182 return 0;
183}
184
185static irqreturn_t ad799x_trigger_handler(int irq, void *p)
186{
187 struct iio_poll_func *pf = p;
188 struct iio_dev *indio_dev = pf->indio_dev;
189 struct ad799x_state *st = iio_priv(indio_dev);
190 int b_sent;
191 u8 cmd;
192
193 switch (st->id) {
194 case ad7991:
195 case ad7995:
196 case ad7999:
197 cmd = st->config |
198 (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
199 break;
200 case ad7992:
201 case ad7993:
202 case ad7994:
203 cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
204 AD7998_CONV_RES_REG;
205 break;
206 case ad7997:
207 case ad7998:
208 cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
209 break;
210 default:
211 cmd = 0;
212 }
213
214 b_sent = i2c_smbus_read_i2c_block_data(st->client,
215 cmd, st->transfer_size, st->rx_buf);
216 if (b_sent < 0)
217 goto out;
218
219 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
220 iio_get_time_ns(indio_dev));
221out:
222 iio_trigger_notify_done(indio_dev->trig);
223
224 return IRQ_HANDLED;
225}
226
227static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
228 const unsigned long *scan_mask)
229{
230 struct ad799x_state *st = iio_priv(indio_dev);
231
232 kfree(st->rx_buf);
233 st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
234 if (!st->rx_buf)
235 return -ENOMEM;
236
237 st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
238
239 switch (st->id) {
240 case ad7992:
241 case ad7993:
242 case ad7994:
243 case ad7997:
244 case ad7998:
245 st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
246 st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
247 return ad799x_write_config(st, st->config);
248 default:
249 return 0;
250 }
251}
252
253static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
254{
255 u8 cmd;
256
257 switch (st->id) {
258 case ad7991:
259 case ad7995:
260 case ad7999:
261 cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
262 break;
263 case ad7992:
264 case ad7993:
265 case ad7994:
266 cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
267 break;
268 case ad7997:
269 case ad7998:
270 cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
271 break;
272 default:
273 return -EINVAL;
274 }
275
276 return i2c_smbus_read_word_swapped(st->client, cmd);
277}
278
279static int ad799x_read_raw(struct iio_dev *indio_dev,
280 struct iio_chan_spec const *chan,
281 int *val,
282 int *val2,
283 long m)
284{
285 int ret;
286 struct ad799x_state *st = iio_priv(indio_dev);
287
288 switch (m) {
289 case IIO_CHAN_INFO_RAW:
290 ret = iio_device_claim_direct_mode(indio_dev);
291 if (ret)
292 return ret;
293 ret = ad799x_scan_direct(st, chan->scan_index);
294 iio_device_release_direct_mode(indio_dev);
295
296 if (ret < 0)
297 return ret;
298 *val = (ret >> chan->scan_type.shift) &
299 GENMASK(chan->scan_type.realbits - 1, 0);
300 return IIO_VAL_INT;
301 case IIO_CHAN_INFO_SCALE:
302 ret = regulator_get_voltage(st->vref);
303 if (ret < 0)
304 return ret;
305 *val = ret / 1000;
306 *val2 = chan->scan_type.realbits;
307 return IIO_VAL_FRACTIONAL_LOG2;
308 }
309 return -EINVAL;
310}
311static const unsigned int ad7998_frequencies[] = {
312 [AD7998_CYC_DIS] = 0,
313 [AD7998_CYC_TCONF_32] = 15625,
314 [AD7998_CYC_TCONF_64] = 7812,
315 [AD7998_CYC_TCONF_128] = 3906,
316 [AD7998_CYC_TCONF_512] = 976,
317 [AD7998_CYC_TCONF_1024] = 488,
318 [AD7998_CYC_TCONF_2048] = 244,
319};
320
321static ssize_t ad799x_read_frequency(struct device *dev,
322 struct device_attribute *attr,
323 char *buf)
324{
325 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
326 struct ad799x_state *st = iio_priv(indio_dev);
327
328 int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
329 if (ret < 0)
330 return ret;
331
332 return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
333}
334
335static ssize_t ad799x_write_frequency(struct device *dev,
336 struct device_attribute *attr,
337 const char *buf,
338 size_t len)
339{
340 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
341 struct ad799x_state *st = iio_priv(indio_dev);
342
343 long val;
344 int ret, i;
345
346 ret = kstrtol(buf, 10, &val);
347 if (ret)
348 return ret;
349
350 mutex_lock(&indio_dev->mlock);
351 ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
352 if (ret < 0)
353 goto error_ret_mutex;
354
355 ret &= ~AD7998_CYC_MASK;
356
357 for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
358 if (val == ad7998_frequencies[i])
359 break;
360 if (i == ARRAY_SIZE(ad7998_frequencies)) {
361 ret = -EINVAL;
362 goto error_ret_mutex;
363 }
364
365 ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
366 ret | i);
367 if (ret < 0)
368 goto error_ret_mutex;
369 ret = len;
370
371error_ret_mutex:
372 mutex_unlock(&indio_dev->mlock);
373
374 return ret;
375}
376
377static int ad799x_read_event_config(struct iio_dev *indio_dev,
378 const struct iio_chan_spec *chan,
379 enum iio_event_type type,
380 enum iio_event_direction dir)
381{
382 struct ad799x_state *st = iio_priv(indio_dev);
383
384 if (!(st->config & AD7998_ALERT_EN))
385 return 0;
386
387 if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
388 return 1;
389
390 return 0;
391}
392
393static int ad799x_write_event_config(struct iio_dev *indio_dev,
394 const struct iio_chan_spec *chan,
395 enum iio_event_type type,
396 enum iio_event_direction dir,
397 int state)
398{
399 struct ad799x_state *st = iio_priv(indio_dev);
400 int ret;
401
402 ret = iio_device_claim_direct_mode(indio_dev);
403 if (ret)
404 return ret;
405
406 if (state)
407 st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
408 else
409 st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
410
411 if (st->config >> AD799X_CHANNEL_SHIFT)
412 st->config |= AD7998_ALERT_EN;
413 else
414 st->config &= ~AD7998_ALERT_EN;
415
416 ret = ad799x_write_config(st, st->config);
417 iio_device_release_direct_mode(indio_dev);
418 return ret;
419}
420
421static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
422 enum iio_event_direction dir,
423 enum iio_event_info info)
424{
425 switch (info) {
426 case IIO_EV_INFO_VALUE:
427 if (dir == IIO_EV_DIR_FALLING)
428 return AD7998_DATALOW_REG(chan->channel);
429 else
430 return AD7998_DATAHIGH_REG(chan->channel);
431 case IIO_EV_INFO_HYSTERESIS:
432 return AD7998_HYST_REG(chan->channel);
433 default:
434 return -EINVAL;
435 }
436
437 return 0;
438}
439
440static int ad799x_write_event_value(struct iio_dev *indio_dev,
441 const struct iio_chan_spec *chan,
442 enum iio_event_type type,
443 enum iio_event_direction dir,
444 enum iio_event_info info,
445 int val, int val2)
446{
447 int ret;
448 struct ad799x_state *st = iio_priv(indio_dev);
449
450 if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
451 return -EINVAL;
452
453 mutex_lock(&indio_dev->mlock);
454 ret = i2c_smbus_write_word_swapped(st->client,
455 ad799x_threshold_reg(chan, dir, info),
456 val << chan->scan_type.shift);
457 mutex_unlock(&indio_dev->mlock);
458
459 return ret;
460}
461
462static int ad799x_read_event_value(struct iio_dev *indio_dev,
463 const struct iio_chan_spec *chan,
464 enum iio_event_type type,
465 enum iio_event_direction dir,
466 enum iio_event_info info,
467 int *val, int *val2)
468{
469 int ret;
470 struct ad799x_state *st = iio_priv(indio_dev);
471
472 mutex_lock(&indio_dev->mlock);
473 ret = i2c_smbus_read_word_swapped(st->client,
474 ad799x_threshold_reg(chan, dir, info));
475 mutex_unlock(&indio_dev->mlock);
476 if (ret < 0)
477 return ret;
478 *val = (ret >> chan->scan_type.shift) &
479 GENMASK(chan->scan_type.realbits - 1, 0);
480
481 return IIO_VAL_INT;
482}
483
484static irqreturn_t ad799x_event_handler(int irq, void *private)
485{
486 struct iio_dev *indio_dev = private;
487 struct ad799x_state *st = iio_priv(private);
488 int i, ret;
489
490 ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
491 if (ret <= 0)
492 goto done;
493
494 if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
495 AD7998_ALERT_STAT_CLEAR) < 0)
496 goto done;
497
498 for (i = 0; i < 8; i++) {
499 if (ret & BIT(i))
500 iio_push_event(indio_dev,
501 i & 0x1 ?
502 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
503 (i >> 1),
504 IIO_EV_TYPE_THRESH,
505 IIO_EV_DIR_RISING) :
506 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
507 (i >> 1),
508 IIO_EV_TYPE_THRESH,
509 IIO_EV_DIR_FALLING),
510 iio_get_time_ns(indio_dev));
511 }
512
513done:
514 return IRQ_HANDLED;
515}
516
517static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
518 ad799x_read_frequency,
519 ad799x_write_frequency);
520static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
521
522static struct attribute *ad799x_event_attributes[] = {
523 &iio_dev_attr_sampling_frequency.dev_attr.attr,
524 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
525 NULL,
526};
527
528static const struct attribute_group ad799x_event_attrs_group = {
529 .attrs = ad799x_event_attributes,
530};
531
532static const struct iio_info ad7991_info = {
533 .read_raw = &ad799x_read_raw,
534 .update_scan_mode = ad799x_update_scan_mode,
535};
536
537static const struct iio_info ad7993_4_7_8_noirq_info = {
538 .read_raw = &ad799x_read_raw,
539 .update_scan_mode = ad799x_update_scan_mode,
540};
541
542static const struct iio_info ad7993_4_7_8_irq_info = {
543 .read_raw = &ad799x_read_raw,
544 .event_attrs = &ad799x_event_attrs_group,
545 .read_event_config = &ad799x_read_event_config,
546 .write_event_config = &ad799x_write_event_config,
547 .read_event_value = &ad799x_read_event_value,
548 .write_event_value = &ad799x_write_event_value,
549 .update_scan_mode = ad799x_update_scan_mode,
550};
551
552static const struct iio_event_spec ad799x_events[] = {
553 {
554 .type = IIO_EV_TYPE_THRESH,
555 .dir = IIO_EV_DIR_RISING,
556 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
557 BIT(IIO_EV_INFO_ENABLE),
558 }, {
559 .type = IIO_EV_TYPE_THRESH,
560 .dir = IIO_EV_DIR_FALLING,
561 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
562 BIT(IIO_EV_INFO_ENABLE),
563 }, {
564 .type = IIO_EV_TYPE_THRESH,
565 .dir = IIO_EV_DIR_EITHER,
566 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
567 },
568};
569
570#define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
571 .type = IIO_VOLTAGE, \
572 .indexed = 1, \
573 .channel = (_index), \
574 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
575 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
576 .scan_index = (_index), \
577 .scan_type = { \
578 .sign = 'u', \
579 .realbits = (_realbits), \
580 .storagebits = 16, \
581 .shift = 12 - (_realbits), \
582 .endianness = IIO_BE, \
583 }, \
584 .event_spec = _ev_spec, \
585 .num_event_specs = _num_ev_spec, \
586}
587
588#define AD799X_CHANNEL(_index, _realbits) \
589 _AD799X_CHANNEL(_index, _realbits, NULL, 0)
590
591#define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
592 _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
593 ARRAY_SIZE(ad799x_events))
594
595static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
596 [ad7991] = {
597 .num_channels = 5,
598 .noirq_config = {
599 .channel = {
600 AD799X_CHANNEL(0, 12),
601 AD799X_CHANNEL(1, 12),
602 AD799X_CHANNEL(2, 12),
603 AD799X_CHANNEL(3, 12),
604 IIO_CHAN_SOFT_TIMESTAMP(4),
605 },
606 .info = &ad7991_info,
607 },
608 },
609 [ad7995] = {
610 .num_channels = 5,
611 .noirq_config = {
612 .channel = {
613 AD799X_CHANNEL(0, 10),
614 AD799X_CHANNEL(1, 10),
615 AD799X_CHANNEL(2, 10),
616 AD799X_CHANNEL(3, 10),
617 IIO_CHAN_SOFT_TIMESTAMP(4),
618 },
619 .info = &ad7991_info,
620 },
621 },
622 [ad7999] = {
623 .num_channels = 5,
624 .noirq_config = {
625 .channel = {
626 AD799X_CHANNEL(0, 8),
627 AD799X_CHANNEL(1, 8),
628 AD799X_CHANNEL(2, 8),
629 AD799X_CHANNEL(3, 8),
630 IIO_CHAN_SOFT_TIMESTAMP(4),
631 },
632 .info = &ad7991_info,
633 },
634 },
635 [ad7992] = {
636 .num_channels = 3,
637 .noirq_config = {
638 .channel = {
639 AD799X_CHANNEL(0, 12),
640 AD799X_CHANNEL(1, 12),
641 IIO_CHAN_SOFT_TIMESTAMP(3),
642 },
643 .info = &ad7993_4_7_8_noirq_info,
644 },
645 .irq_config = {
646 .channel = {
647 AD799X_CHANNEL_WITH_EVENTS(0, 12),
648 AD799X_CHANNEL_WITH_EVENTS(1, 12),
649 IIO_CHAN_SOFT_TIMESTAMP(3),
650 },
651 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
652 .info = &ad7993_4_7_8_irq_info,
653 },
654 },
655 [ad7993] = {
656 .num_channels = 5,
657 .noirq_config = {
658 .channel = {
659 AD799X_CHANNEL(0, 10),
660 AD799X_CHANNEL(1, 10),
661 AD799X_CHANNEL(2, 10),
662 AD799X_CHANNEL(3, 10),
663 IIO_CHAN_SOFT_TIMESTAMP(4),
664 },
665 .info = &ad7993_4_7_8_noirq_info,
666 },
667 .irq_config = {
668 .channel = {
669 AD799X_CHANNEL_WITH_EVENTS(0, 10),
670 AD799X_CHANNEL_WITH_EVENTS(1, 10),
671 AD799X_CHANNEL_WITH_EVENTS(2, 10),
672 AD799X_CHANNEL_WITH_EVENTS(3, 10),
673 IIO_CHAN_SOFT_TIMESTAMP(4),
674 },
675 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
676 .info = &ad7993_4_7_8_irq_info,
677 },
678 },
679 [ad7994] = {
680 .num_channels = 5,
681 .noirq_config = {
682 .channel = {
683 AD799X_CHANNEL(0, 12),
684 AD799X_CHANNEL(1, 12),
685 AD799X_CHANNEL(2, 12),
686 AD799X_CHANNEL(3, 12),
687 IIO_CHAN_SOFT_TIMESTAMP(4),
688 },
689 .info = &ad7993_4_7_8_noirq_info,
690 },
691 .irq_config = {
692 .channel = {
693 AD799X_CHANNEL_WITH_EVENTS(0, 12),
694 AD799X_CHANNEL_WITH_EVENTS(1, 12),
695 AD799X_CHANNEL_WITH_EVENTS(2, 12),
696 AD799X_CHANNEL_WITH_EVENTS(3, 12),
697 IIO_CHAN_SOFT_TIMESTAMP(4),
698 },
699 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
700 .info = &ad7993_4_7_8_irq_info,
701 },
702 },
703 [ad7997] = {
704 .num_channels = 9,
705 .noirq_config = {
706 .channel = {
707 AD799X_CHANNEL(0, 10),
708 AD799X_CHANNEL(1, 10),
709 AD799X_CHANNEL(2, 10),
710 AD799X_CHANNEL(3, 10),
711 AD799X_CHANNEL(4, 10),
712 AD799X_CHANNEL(5, 10),
713 AD799X_CHANNEL(6, 10),
714 AD799X_CHANNEL(7, 10),
715 IIO_CHAN_SOFT_TIMESTAMP(8),
716 },
717 .info = &ad7993_4_7_8_noirq_info,
718 },
719 .irq_config = {
720 .channel = {
721 AD799X_CHANNEL_WITH_EVENTS(0, 10),
722 AD799X_CHANNEL_WITH_EVENTS(1, 10),
723 AD799X_CHANNEL_WITH_EVENTS(2, 10),
724 AD799X_CHANNEL_WITH_EVENTS(3, 10),
725 AD799X_CHANNEL(4, 10),
726 AD799X_CHANNEL(5, 10),
727 AD799X_CHANNEL(6, 10),
728 AD799X_CHANNEL(7, 10),
729 IIO_CHAN_SOFT_TIMESTAMP(8),
730 },
731 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
732 .info = &ad7993_4_7_8_irq_info,
733 },
734 },
735 [ad7998] = {
736 .num_channels = 9,
737 .noirq_config = {
738 .channel = {
739 AD799X_CHANNEL(0, 12),
740 AD799X_CHANNEL(1, 12),
741 AD799X_CHANNEL(2, 12),
742 AD799X_CHANNEL(3, 12),
743 AD799X_CHANNEL(4, 12),
744 AD799X_CHANNEL(5, 12),
745 AD799X_CHANNEL(6, 12),
746 AD799X_CHANNEL(7, 12),
747 IIO_CHAN_SOFT_TIMESTAMP(8),
748 },
749 .info = &ad7993_4_7_8_noirq_info,
750 },
751 .irq_config = {
752 .channel = {
753 AD799X_CHANNEL_WITH_EVENTS(0, 12),
754 AD799X_CHANNEL_WITH_EVENTS(1, 12),
755 AD799X_CHANNEL_WITH_EVENTS(2, 12),
756 AD799X_CHANNEL_WITH_EVENTS(3, 12),
757 AD799X_CHANNEL(4, 12),
758 AD799X_CHANNEL(5, 12),
759 AD799X_CHANNEL(6, 12),
760 AD799X_CHANNEL(7, 12),
761 IIO_CHAN_SOFT_TIMESTAMP(8),
762 },
763 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
764 .info = &ad7993_4_7_8_irq_info,
765 },
766 },
767};
768
769static int ad799x_probe(struct i2c_client *client,
770 const struct i2c_device_id *id)
771{
772 int ret;
773 struct ad799x_state *st;
774 struct iio_dev *indio_dev;
775 const struct ad799x_chip_info *chip_info =
776 &ad799x_chip_info_tbl[id->driver_data];
777
778 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
779 if (indio_dev == NULL)
780 return -ENOMEM;
781
782 st = iio_priv(indio_dev);
783
784 i2c_set_clientdata(client, indio_dev);
785
786 st->id = id->driver_data;
787 if (client->irq > 0 && chip_info->irq_config.info)
788 st->chip_config = &chip_info->irq_config;
789 else
790 st->chip_config = &chip_info->noirq_config;
791
792
793
794 st->reg = devm_regulator_get(&client->dev, "vcc");
795 if (IS_ERR(st->reg))
796 return PTR_ERR(st->reg);
797 ret = regulator_enable(st->reg);
798 if (ret)
799 return ret;
800 st->vref = devm_regulator_get(&client->dev, "vref");
801 if (IS_ERR(st->vref)) {
802 ret = PTR_ERR(st->vref);
803 goto error_disable_reg;
804 }
805 ret = regulator_enable(st->vref);
806 if (ret)
807 goto error_disable_reg;
808
809 st->client = client;
810
811 indio_dev->name = id->name;
812 indio_dev->info = st->chip_config->info;
813
814 indio_dev->modes = INDIO_DIRECT_MODE;
815 indio_dev->channels = st->chip_config->channel;
816 indio_dev->num_channels = chip_info->num_channels;
817
818 ret = ad799x_update_config(st, st->chip_config->default_config);
819 if (ret)
820 goto error_disable_vref;
821
822 ret = iio_triggered_buffer_setup(indio_dev, NULL,
823 &ad799x_trigger_handler, NULL);
824 if (ret)
825 goto error_disable_vref;
826
827 if (client->irq > 0) {
828 ret = devm_request_threaded_irq(&client->dev,
829 client->irq,
830 NULL,
831 ad799x_event_handler,
832 IRQF_TRIGGER_FALLING |
833 IRQF_ONESHOT,
834 client->name,
835 indio_dev);
836 if (ret)
837 goto error_cleanup_ring;
838 }
839 ret = iio_device_register(indio_dev);
840 if (ret)
841 goto error_cleanup_ring;
842
843 return 0;
844
845error_cleanup_ring:
846 iio_triggered_buffer_cleanup(indio_dev);
847error_disable_vref:
848 regulator_disable(st->vref);
849error_disable_reg:
850 regulator_disable(st->reg);
851
852 return ret;
853}
854
855static int ad799x_remove(struct i2c_client *client)
856{
857 struct iio_dev *indio_dev = i2c_get_clientdata(client);
858 struct ad799x_state *st = iio_priv(indio_dev);
859
860 iio_device_unregister(indio_dev);
861
862 iio_triggered_buffer_cleanup(indio_dev);
863 regulator_disable(st->vref);
864 regulator_disable(st->reg);
865 kfree(st->rx_buf);
866
867 return 0;
868}
869
870static int __maybe_unused ad799x_suspend(struct device *dev)
871{
872 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
873 struct ad799x_state *st = iio_priv(indio_dev);
874
875 regulator_disable(st->vref);
876 regulator_disable(st->reg);
877
878 return 0;
879}
880
881static int __maybe_unused ad799x_resume(struct device *dev)
882{
883 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
884 struct ad799x_state *st = iio_priv(indio_dev);
885 int ret;
886
887 ret = regulator_enable(st->reg);
888 if (ret) {
889 dev_err(dev, "Unable to enable vcc regulator\n");
890 return ret;
891 }
892 ret = regulator_enable(st->vref);
893 if (ret) {
894 regulator_disable(st->reg);
895 dev_err(dev, "Unable to enable vref regulator\n");
896 return ret;
897 }
898
899
900 ret = ad799x_update_config(st, st->config);
901 if (ret) {
902 regulator_disable(st->vref);
903 regulator_disable(st->reg);
904 return ret;
905 }
906
907 return 0;
908}
909
910static SIMPLE_DEV_PM_OPS(ad799x_pm_ops, ad799x_suspend, ad799x_resume);
911
912static const struct i2c_device_id ad799x_id[] = {
913 { "ad7991", ad7991 },
914 { "ad7995", ad7995 },
915 { "ad7999", ad7999 },
916 { "ad7992", ad7992 },
917 { "ad7993", ad7993 },
918 { "ad7994", ad7994 },
919 { "ad7997", ad7997 },
920 { "ad7998", ad7998 },
921 {}
922};
923
924MODULE_DEVICE_TABLE(i2c, ad799x_id);
925
926static struct i2c_driver ad799x_driver = {
927 .driver = {
928 .name = "ad799x",
929 .pm = &ad799x_pm_ops,
930 },
931 .probe = ad799x_probe,
932 .remove = ad799x_remove,
933 .id_table = ad799x_id,
934};
935module_i2c_driver(ad799x_driver);
936
937MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
938MODULE_DESCRIPTION("Analog Devices AD799x ADC");
939MODULE_LICENSE("GPL v2");
940
