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9#include <linux/delay.h>
10#include <linux/gpio/consumer.h>
11#include <linux/mutex.h>
12#include <linux/device.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/module.h>
16#include <asm/unaligned.h>
17
18#include <linux/iio/iio.h>
19#include <linux/iio/imu/adis.h>
20
21#define ADIS_MSC_CTRL_DATA_RDY_EN BIT(2)
22#define ADIS_MSC_CTRL_DATA_RDY_POL_HIGH BIT(1)
23#define ADIS_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
24#define ADIS_GLOB_CMD_SW_RESET BIT(7)
25
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31
32
33int __adis_write_reg(struct adis *adis, unsigned int reg,
34 unsigned int value, unsigned int size)
35{
36 unsigned int page = reg / ADIS_PAGE_SIZE;
37 int ret, i;
38 struct spi_message msg;
39 struct spi_transfer xfers[] = {
40 {
41 .tx_buf = adis->tx,
42 .bits_per_word = 8,
43 .len = 2,
44 .cs_change = 1,
45 .delay.value = adis->data->write_delay,
46 .delay.unit = SPI_DELAY_UNIT_USECS,
47 .cs_change_delay.value = adis->data->cs_change_delay,
48 .cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
49 }, {
50 .tx_buf = adis->tx + 2,
51 .bits_per_word = 8,
52 .len = 2,
53 .cs_change = 1,
54 .delay.value = adis->data->write_delay,
55 .delay.unit = SPI_DELAY_UNIT_USECS,
56 .cs_change_delay.value = adis->data->cs_change_delay,
57 .cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
58 }, {
59 .tx_buf = adis->tx + 4,
60 .bits_per_word = 8,
61 .len = 2,
62 .cs_change = 1,
63 .delay.value = adis->data->write_delay,
64 .delay.unit = SPI_DELAY_UNIT_USECS,
65 .cs_change_delay.value = adis->data->cs_change_delay,
66 .cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
67 }, {
68 .tx_buf = adis->tx + 6,
69 .bits_per_word = 8,
70 .len = 2,
71 .delay.value = adis->data->write_delay,
72 .delay.unit = SPI_DELAY_UNIT_USECS,
73 }, {
74 .tx_buf = adis->tx + 8,
75 .bits_per_word = 8,
76 .len = 2,
77 .delay.value = adis->data->write_delay,
78 .delay.unit = SPI_DELAY_UNIT_USECS,
79 },
80 };
81
82 spi_message_init(&msg);
83
84 if (adis->current_page != page) {
85 adis->tx[0] = ADIS_WRITE_REG(ADIS_REG_PAGE_ID);
86 adis->tx[1] = page;
87 spi_message_add_tail(&xfers[0], &msg);
88 }
89
90 switch (size) {
91 case 4:
92 adis->tx[8] = ADIS_WRITE_REG(reg + 3);
93 adis->tx[9] = (value >> 24) & 0xff;
94 adis->tx[6] = ADIS_WRITE_REG(reg + 2);
95 adis->tx[7] = (value >> 16) & 0xff;
96 fallthrough;
97 case 2:
98 adis->tx[4] = ADIS_WRITE_REG(reg + 1);
99 adis->tx[5] = (value >> 8) & 0xff;
100 fallthrough;
101 case 1:
102 adis->tx[2] = ADIS_WRITE_REG(reg);
103 adis->tx[3] = value & 0xff;
104 break;
105 default:
106 return -EINVAL;
107 }
108
109 xfers[size].cs_change = 0;
110
111 for (i = 1; i <= size; i++)
112 spi_message_add_tail(&xfers[i], &msg);
113
114 ret = spi_sync(adis->spi, &msg);
115 if (ret) {
116 dev_err(&adis->spi->dev, "Failed to write register 0x%02X: %d\n",
117 reg, ret);
118 } else {
119 adis->current_page = page;
120 }
121
122 return ret;
123}
124EXPORT_SYMBOL_GPL(__adis_write_reg);
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132
133int __adis_read_reg(struct adis *adis, unsigned int reg,
134 unsigned int *val, unsigned int size)
135{
136 unsigned int page = reg / ADIS_PAGE_SIZE;
137 struct spi_message msg;
138 int ret;
139 struct spi_transfer xfers[] = {
140 {
141 .tx_buf = adis->tx,
142 .bits_per_word = 8,
143 .len = 2,
144 .cs_change = 1,
145 .delay.value = adis->data->write_delay,
146 .delay.unit = SPI_DELAY_UNIT_USECS,
147 .cs_change_delay.value = adis->data->cs_change_delay,
148 .cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
149 }, {
150 .tx_buf = adis->tx + 2,
151 .bits_per_word = 8,
152 .len = 2,
153 .cs_change = 1,
154 .delay.value = adis->data->read_delay,
155 .delay.unit = SPI_DELAY_UNIT_USECS,
156 .cs_change_delay.value = adis->data->cs_change_delay,
157 .cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
158 }, {
159 .tx_buf = adis->tx + 4,
160 .rx_buf = adis->rx,
161 .bits_per_word = 8,
162 .len = 2,
163 .cs_change = 1,
164 .delay.value = adis->data->read_delay,
165 .delay.unit = SPI_DELAY_UNIT_USECS,
166 .cs_change_delay.value = adis->data->cs_change_delay,
167 .cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
168 }, {
169 .rx_buf = adis->rx + 2,
170 .bits_per_word = 8,
171 .len = 2,
172 .delay.value = adis->data->read_delay,
173 .delay.unit = SPI_DELAY_UNIT_USECS,
174 },
175 };
176
177 spi_message_init(&msg);
178
179 if (adis->current_page != page) {
180 adis->tx[0] = ADIS_WRITE_REG(ADIS_REG_PAGE_ID);
181 adis->tx[1] = page;
182 spi_message_add_tail(&xfers[0], &msg);
183 }
184
185 switch (size) {
186 case 4:
187 adis->tx[2] = ADIS_READ_REG(reg + 2);
188 adis->tx[3] = 0;
189 spi_message_add_tail(&xfers[1], &msg);
190 fallthrough;
191 case 2:
192 adis->tx[4] = ADIS_READ_REG(reg);
193 adis->tx[5] = 0;
194 spi_message_add_tail(&xfers[2], &msg);
195 spi_message_add_tail(&xfers[3], &msg);
196 break;
197 default:
198 return -EINVAL;
199 }
200
201 ret = spi_sync(adis->spi, &msg);
202 if (ret) {
203 dev_err(&adis->spi->dev, "Failed to read register 0x%02X: %d\n",
204 reg, ret);
205 return ret;
206 } else {
207 adis->current_page = page;
208 }
209
210 switch (size) {
211 case 4:
212 *val = get_unaligned_be32(adis->rx);
213 break;
214 case 2:
215 *val = get_unaligned_be16(adis->rx + 2);
216 break;
217 }
218
219 return ret;
220}
221EXPORT_SYMBOL_GPL(__adis_read_reg);
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231
232int __adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask,
233 const u32 val, u8 size)
234{
235 int ret;
236 u32 __val;
237
238 ret = __adis_read_reg(adis, reg, &__val, size);
239 if (ret)
240 return ret;
241
242 __val = (__val & ~mask) | (val & mask);
243
244 return __adis_write_reg(adis, reg, __val, size);
245}
246EXPORT_SYMBOL_GPL(__adis_update_bits_base);
247
248#ifdef CONFIG_DEBUG_FS
249
250int adis_debugfs_reg_access(struct iio_dev *indio_dev,
251 unsigned int reg, unsigned int writeval, unsigned int *readval)
252{
253 struct adis *adis = iio_device_get_drvdata(indio_dev);
254
255 if (readval) {
256 uint16_t val16;
257 int ret;
258
259 ret = adis_read_reg_16(adis, reg, &val16);
260 if (ret == 0)
261 *readval = val16;
262
263 return ret;
264 } else {
265 return adis_write_reg_16(adis, reg, writeval);
266 }
267}
268EXPORT_SYMBOL(adis_debugfs_reg_access);
269
270#endif
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278
279int adis_enable_irq(struct adis *adis, bool enable)
280{
281 int ret = 0;
282 uint16_t msc;
283
284 mutex_lock(&adis->state_lock);
285
286 if (adis->data->enable_irq) {
287 ret = adis->data->enable_irq(adis, enable);
288 goto out_unlock;
289 }
290
291 ret = __adis_read_reg_16(adis, adis->data->msc_ctrl_reg, &msc);
292 if (ret)
293 goto out_unlock;
294
295 msc |= ADIS_MSC_CTRL_DATA_RDY_POL_HIGH;
296 msc &= ~ADIS_MSC_CTRL_DATA_RDY_DIO2;
297 if (enable)
298 msc |= ADIS_MSC_CTRL_DATA_RDY_EN;
299 else
300 msc &= ~ADIS_MSC_CTRL_DATA_RDY_EN;
301
302 ret = __adis_write_reg_16(adis, adis->data->msc_ctrl_reg, msc);
303
304out_unlock:
305 mutex_unlock(&adis->state_lock);
306 return ret;
307}
308EXPORT_SYMBOL(adis_enable_irq);
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315
316int __adis_check_status(struct adis *adis)
317{
318 uint16_t status;
319 int ret;
320 int i;
321
322 ret = __adis_read_reg_16(adis, adis->data->diag_stat_reg, &status);
323 if (ret)
324 return ret;
325
326 status &= adis->data->status_error_mask;
327
328 if (status == 0)
329 return 0;
330
331 for (i = 0; i < 16; ++i) {
332 if (status & BIT(i)) {
333 dev_err(&adis->spi->dev, "%s.\n",
334 adis->data->status_error_msgs[i]);
335 }
336 }
337
338 return -EIO;
339}
340EXPORT_SYMBOL_GPL(__adis_check_status);
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347
348int __adis_reset(struct adis *adis)
349{
350 int ret;
351 const struct adis_timeout *timeouts = adis->data->timeouts;
352
353 ret = __adis_write_reg_8(adis, adis->data->glob_cmd_reg,
354 ADIS_GLOB_CMD_SW_RESET);
355 if (ret) {
356 dev_err(&adis->spi->dev, "Failed to reset device: %d\n", ret);
357 return ret;
358 }
359
360 msleep(timeouts->sw_reset_ms);
361
362 return 0;
363}
364EXPORT_SYMBOL_GPL(__adis_reset);
365
366static int adis_self_test(struct adis *adis)
367{
368 int ret;
369 const struct adis_timeout *timeouts = adis->data->timeouts;
370
371 ret = __adis_write_reg_16(adis, adis->data->self_test_reg,
372 adis->data->self_test_mask);
373 if (ret) {
374 dev_err(&adis->spi->dev, "Failed to initiate self test: %d\n",
375 ret);
376 return ret;
377 }
378
379 msleep(timeouts->self_test_ms);
380
381 ret = __adis_check_status(adis);
382
383 if (adis->data->self_test_no_autoclear)
384 __adis_write_reg_16(adis, adis->data->self_test_reg, 0x00);
385
386 return ret;
387}
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406int __adis_initial_startup(struct adis *adis)
407{
408 const struct adis_timeout *timeouts = adis->data->timeouts;
409 struct gpio_desc *gpio;
410 uint16_t prod_id;
411 int ret;
412
413
414 gpio = devm_gpiod_get_optional(&adis->spi->dev, "reset", GPIOD_OUT_HIGH);
415 if (IS_ERR(gpio))
416 return PTR_ERR(gpio);
417
418 if (gpio) {
419 msleep(10);
420
421 gpiod_set_value_cansleep(gpio, 0);
422 msleep(timeouts->reset_ms);
423 } else {
424 ret = __adis_reset(adis);
425 if (ret)
426 return ret;
427 }
428
429 ret = adis_self_test(adis);
430 if (ret)
431 return ret;
432
433 if (!adis->data->prod_id_reg)
434 return 0;
435
436 ret = adis_read_reg_16(adis, adis->data->prod_id_reg, &prod_id);
437 if (ret)
438 return ret;
439
440 if (prod_id != adis->data->prod_id)
441 dev_warn(&adis->spi->dev,
442 "Device ID(%u) and product ID(%u) do not match.\n",
443 adis->data->prod_id, prod_id);
444
445 return 0;
446}
447EXPORT_SYMBOL_GPL(__adis_initial_startup);
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464int adis_single_conversion(struct iio_dev *indio_dev,
465 const struct iio_chan_spec *chan, unsigned int error_mask, int *val)
466{
467 struct adis *adis = iio_device_get_drvdata(indio_dev);
468 unsigned int uval;
469 int ret;
470
471 mutex_lock(&adis->state_lock);
472
473 ret = __adis_read_reg(adis, chan->address, &uval,
474 chan->scan_type.storagebits / 8);
475 if (ret)
476 goto err_unlock;
477
478 if (uval & error_mask) {
479 ret = __adis_check_status(adis);
480 if (ret)
481 goto err_unlock;
482 }
483
484 if (chan->scan_type.sign == 's')
485 *val = sign_extend32(uval, chan->scan_type.realbits - 1);
486 else
487 *val = uval & ((1 << chan->scan_type.realbits) - 1);
488
489 ret = IIO_VAL_INT;
490err_unlock:
491 mutex_unlock(&adis->state_lock);
492 return ret;
493}
494EXPORT_SYMBOL_GPL(adis_single_conversion);
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508int adis_init(struct adis *adis, struct iio_dev *indio_dev,
509 struct spi_device *spi, const struct adis_data *data)
510{
511 if (!data || !data->timeouts) {
512 dev_err(&spi->dev, "No config data or timeouts not defined!\n");
513 return -EINVAL;
514 }
515
516 mutex_init(&adis->state_lock);
517 adis->spi = spi;
518 adis->data = data;
519 iio_device_set_drvdata(indio_dev, adis);
520
521 if (data->has_paging) {
522
523 adis->current_page = -1;
524 } else {
525
526 adis->current_page = 0;
527 }
528
529 return adis_enable_irq(adis, false);
530}
531EXPORT_SYMBOL_GPL(adis_init);
532
533MODULE_LICENSE("GPL");
534MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
535MODULE_DESCRIPTION("Common library code for ADIS16XXX devices");
536