1
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5
6
7#include <asm/unaligned.h>
8
9#include <linux/clk.h>
10#include <linux/delay.h>
11#include <linux/i2c.h>
12#include <linux/module.h>
13#include <linux/pm_runtime.h>
14
15#include <media/v4l2-ctrls.h>
16#include <media/v4l2-fwnode.h>
17#include <media/v4l2-subdev.h>
18
19
20#define OV9282_REG_MODE_SELECT 0x0100
21#define OV9282_MODE_STANDBY 0x00
22#define OV9282_MODE_STREAMING 0x01
23
24
25#define OV9282_REG_LPFR 0x380e
26
27
28#define OV9282_REG_ID 0x300a
29#define OV9282_ID 0x9281
30
31
32#define OV9282_REG_EXPOSURE 0x3500
33#define OV9282_EXPOSURE_MIN 1
34#define OV9282_EXPOSURE_OFFSET 12
35#define OV9282_EXPOSURE_STEP 1
36#define OV9282_EXPOSURE_DEFAULT 0x0282
37
38
39#define OV9282_REG_AGAIN 0x3509
40#define OV9282_AGAIN_MIN 0x10
41#define OV9282_AGAIN_MAX 0xff
42#define OV9282_AGAIN_STEP 1
43#define OV9282_AGAIN_DEFAULT 0x10
44
45
46#define OV9282_REG_HOLD 0x3308
47
48
49#define OV9282_INCLK_RATE 24000000
50
51
52#define OV9282_LINK_FREQ 400000000
53#define OV9282_NUM_DATA_LANES 2
54
55#define OV9282_REG_MIN 0x00
56#define OV9282_REG_MAX 0xfffff
57
58
59
60
61
62
63struct ov9282_reg {
64 u16 address;
65 u8 val;
66};
67
68
69
70
71
72
73struct ov9282_reg_list {
74 u32 num_of_regs;
75 const struct ov9282_reg *regs;
76};
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91struct ov9282_mode {
92 u32 width;
93 u32 height;
94 u32 code;
95 u32 hblank;
96 u32 vblank;
97 u32 vblank_min;
98 u32 vblank_max;
99 u64 pclk;
100 u32 link_freq_idx;
101 struct ov9282_reg_list reg_list;
102};
103
104
105
106
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119
120
121
122
123
124struct ov9282 {
125 struct device *dev;
126 struct i2c_client *client;
127 struct v4l2_subdev sd;
128 struct media_pad pad;
129 struct gpio_desc *reset_gpio;
130 struct clk *inclk;
131 struct v4l2_ctrl_handler ctrl_handler;
132 struct v4l2_ctrl *link_freq_ctrl;
133 struct v4l2_ctrl *pclk_ctrl;
134 struct v4l2_ctrl *hblank_ctrl;
135 struct v4l2_ctrl *vblank_ctrl;
136 struct {
137 struct v4l2_ctrl *exp_ctrl;
138 struct v4l2_ctrl *again_ctrl;
139 };
140 u32 vblank;
141 const struct ov9282_mode *cur_mode;
142 struct mutex mutex;
143 bool streaming;
144};
145
146static const s64 link_freq[] = {
147 OV9282_LINK_FREQ,
148};
149
150
151static const struct ov9282_reg mode_1280x720_regs[] = {
152 {0x0302, 0x32},
153 {0x030d, 0x50},
154 {0x030e, 0x02},
155 {0x3001, 0x00},
156 {0x3004, 0x00},
157 {0x3005, 0x00},
158 {0x3006, 0x04},
159 {0x3011, 0x0a},
160 {0x3013, 0x18},
161 {0x301c, 0xf0},
162 {0x3022, 0x01},
163 {0x3030, 0x10},
164 {0x3039, 0x32},
165 {0x303a, 0x00},
166 {0x3500, 0x00},
167 {0x3501, 0x5f},
168 {0x3502, 0x1e},
169 {0x3503, 0x08},
170 {0x3505, 0x8c},
171 {0x3507, 0x03},
172 {0x3508, 0x00},
173 {0x3509, 0x10},
174 {0x3610, 0x80},
175 {0x3611, 0xa0},
176 {0x3620, 0x6e},
177 {0x3632, 0x56},
178 {0x3633, 0x78},
179 {0x3666, 0x00},
180 {0x366f, 0x5a},
181 {0x3680, 0x84},
182 {0x3712, 0x80},
183 {0x372d, 0x22},
184 {0x3731, 0x80},
185 {0x3732, 0x30},
186 {0x3778, 0x00},
187 {0x377d, 0x22},
188 {0x3788, 0x02},
189 {0x3789, 0xa4},
190 {0x378a, 0x00},
191 {0x378b, 0x4a},
192 {0x3799, 0x20},
193 {0x3800, 0x00},
194 {0x3801, 0x00},
195 {0x3802, 0x00},
196 {0x3803, 0x00},
197 {0x3804, 0x05},
198 {0x3805, 0x0f},
199 {0x3806, 0x02},
200 {0x3807, 0xdf},
201 {0x3808, 0x05},
202 {0x3809, 0x00},
203 {0x380a, 0x02},
204 {0x380b, 0xd0},
205 {0x380c, 0x05},
206 {0x380d, 0xfa},
207 {0x380e, 0x06},
208 {0x380f, 0xce},
209 {0x3810, 0x00},
210 {0x3811, 0x08},
211 {0x3812, 0x00},
212 {0x3813, 0x08},
213 {0x3814, 0x11},
214 {0x3815, 0x11},
215 {0x3820, 0x3c},
216 {0x3821, 0x84},
217 {0x3881, 0x42},
218 {0x38a8, 0x02},
219 {0x38a9, 0x80},
220 {0x38b1, 0x00},
221 {0x38c4, 0x00},
222 {0x38c5, 0xc0},
223 {0x38c6, 0x04},
224 {0x38c7, 0x80},
225 {0x3920, 0xff},
226 {0x4003, 0x40},
227 {0x4008, 0x02},
228 {0x4009, 0x05},
229 {0x400c, 0x00},
230 {0x400d, 0x03},
231 {0x4010, 0x40},
232 {0x4043, 0x40},
233 {0x4307, 0x30},
234 {0x4317, 0x00},
235 {0x4501, 0x00},
236 {0x4507, 0x00},
237 {0x4509, 0x80},
238 {0x450a, 0x08},
239 {0x4601, 0x04},
240 {0x470f, 0x00},
241 {0x4f07, 0x00},
242 {0x4800, 0x20},
243 {0x5000, 0x9f},
244 {0x5001, 0x00},
245 {0x5e00, 0x00},
246 {0x5d00, 0x07},
247 {0x5d01, 0x00},
248 {0x0101, 0x01},
249 {0x1000, 0x03},
250 {0x5a08, 0x84},
251};
252
253
254static const struct ov9282_mode supported_mode = {
255 .width = 1280,
256 .height = 720,
257 .hblank = 250,
258 .vblank = 1022,
259 .vblank_min = 151,
260 .vblank_max = 51540,
261 .pclk = 160000000,
262 .link_freq_idx = 0,
263 .code = MEDIA_BUS_FMT_Y10_1X10,
264 .reg_list = {
265 .num_of_regs = ARRAY_SIZE(mode_1280x720_regs),
266 .regs = mode_1280x720_regs,
267 },
268};
269
270
271
272
273
274
275
276static inline struct ov9282 *to_ov9282(struct v4l2_subdev *subdev)
277{
278 return container_of(subdev, struct ov9282, sd);
279}
280
281
282
283
284
285
286
287
288
289
290static int ov9282_read_reg(struct ov9282 *ov9282, u16 reg, u32 len, u32 *val)
291{
292 struct i2c_client *client = v4l2_get_subdevdata(&ov9282->sd);
293 struct i2c_msg msgs[2] = {0};
294 u8 addr_buf[2] = {0};
295 u8 data_buf[4] = {0};
296 int ret;
297
298 if (WARN_ON(len > 4))
299 return -EINVAL;
300
301 put_unaligned_be16(reg, addr_buf);
302
303
304 msgs[0].addr = client->addr;
305 msgs[0].flags = 0;
306 msgs[0].len = ARRAY_SIZE(addr_buf);
307 msgs[0].buf = addr_buf;
308
309
310 msgs[1].addr = client->addr;
311 msgs[1].flags = I2C_M_RD;
312 msgs[1].len = len;
313 msgs[1].buf = &data_buf[4 - len];
314
315 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
316 if (ret != ARRAY_SIZE(msgs))
317 return -EIO;
318
319 *val = get_unaligned_be32(data_buf);
320
321 return 0;
322}
323
324
325
326
327
328
329
330
331
332
333static int ov9282_write_reg(struct ov9282 *ov9282, u16 reg, u32 len, u32 val)
334{
335 struct i2c_client *client = v4l2_get_subdevdata(&ov9282->sd);
336 u8 buf[6] = {0};
337
338 if (WARN_ON(len > 4))
339 return -EINVAL;
340
341 put_unaligned_be16(reg, buf);
342 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
343 if (i2c_master_send(client, buf, len + 2) != len + 2)
344 return -EIO;
345
346 return 0;
347}
348
349
350
351
352
353
354
355
356
357static int ov9282_write_regs(struct ov9282 *ov9282,
358 const struct ov9282_reg *regs, u32 len)
359{
360 unsigned int i;
361 int ret;
362
363 for (i = 0; i < len; i++) {
364 ret = ov9282_write_reg(ov9282, regs[i].address, 1, regs[i].val);
365 if (ret)
366 return ret;
367 }
368
369 return 0;
370}
371
372
373
374
375
376
377
378
379static int ov9282_update_controls(struct ov9282 *ov9282,
380 const struct ov9282_mode *mode)
381{
382 int ret;
383
384 ret = __v4l2_ctrl_s_ctrl(ov9282->link_freq_ctrl, mode->link_freq_idx);
385 if (ret)
386 return ret;
387
388 ret = __v4l2_ctrl_s_ctrl(ov9282->hblank_ctrl, mode->hblank);
389 if (ret)
390 return ret;
391
392 return __v4l2_ctrl_modify_range(ov9282->vblank_ctrl, mode->vblank_min,
393 mode->vblank_max, 1, mode->vblank);
394}
395
396
397
398
399
400
401
402
403
404static int ov9282_update_exp_gain(struct ov9282 *ov9282, u32 exposure, u32 gain)
405{
406 u32 lpfr;
407 int ret;
408
409 lpfr = ov9282->vblank + ov9282->cur_mode->height;
410
411 dev_dbg(ov9282->dev, "Set exp %u, analog gain %u, lpfr %u",
412 exposure, gain, lpfr);
413
414 ret = ov9282_write_reg(ov9282, OV9282_REG_HOLD, 1, 1);
415 if (ret)
416 return ret;
417
418 ret = ov9282_write_reg(ov9282, OV9282_REG_LPFR, 2, lpfr);
419 if (ret)
420 goto error_release_group_hold;
421
422 ret = ov9282_write_reg(ov9282, OV9282_REG_EXPOSURE, 3, exposure << 4);
423 if (ret)
424 goto error_release_group_hold;
425
426 ret = ov9282_write_reg(ov9282, OV9282_REG_AGAIN, 1, gain);
427
428error_release_group_hold:
429 ov9282_write_reg(ov9282, OV9282_REG_HOLD, 1, 0);
430
431 return ret;
432}
433
434
435
436
437
438
439
440
441
442
443
444
445
446static int ov9282_set_ctrl(struct v4l2_ctrl *ctrl)
447{
448 struct ov9282 *ov9282 =
449 container_of(ctrl->handler, struct ov9282, ctrl_handler);
450 u32 analog_gain;
451 u32 exposure;
452 int ret;
453
454 switch (ctrl->id) {
455 case V4L2_CID_VBLANK:
456 ov9282->vblank = ov9282->vblank_ctrl->val;
457
458 dev_dbg(ov9282->dev, "Received vblank %u, new lpfr %u",
459 ov9282->vblank,
460 ov9282->vblank + ov9282->cur_mode->height);
461
462 ret = __v4l2_ctrl_modify_range(ov9282->exp_ctrl,
463 OV9282_EXPOSURE_MIN,
464 ov9282->vblank +
465 ov9282->cur_mode->height -
466 OV9282_EXPOSURE_OFFSET,
467 1, OV9282_EXPOSURE_DEFAULT);
468 break;
469 case V4L2_CID_EXPOSURE:
470
471 if (!pm_runtime_get_if_in_use(ov9282->dev))
472 return 0;
473
474 exposure = ctrl->val;
475 analog_gain = ov9282->again_ctrl->val;
476
477 dev_dbg(ov9282->dev, "Received exp %u, analog gain %u",
478 exposure, analog_gain);
479
480 ret = ov9282_update_exp_gain(ov9282, exposure, analog_gain);
481
482 pm_runtime_put(ov9282->dev);
483
484 break;
485 default:
486 dev_err(ov9282->dev, "Invalid control %d", ctrl->id);
487 ret = -EINVAL;
488 }
489
490 return ret;
491}
492
493
494static const struct v4l2_ctrl_ops ov9282_ctrl_ops = {
495 .s_ctrl = ov9282_set_ctrl,
496};
497
498
499
500
501
502
503
504
505
506static int ov9282_enum_mbus_code(struct v4l2_subdev *sd,
507 struct v4l2_subdev_state *sd_state,
508 struct v4l2_subdev_mbus_code_enum *code)
509{
510 if (code->index > 0)
511 return -EINVAL;
512
513 code->code = supported_mode.code;
514
515 return 0;
516}
517
518
519
520
521
522
523
524
525
526static int ov9282_enum_frame_size(struct v4l2_subdev *sd,
527 struct v4l2_subdev_state *sd_state,
528 struct v4l2_subdev_frame_size_enum *fsize)
529{
530 if (fsize->index > 0)
531 return -EINVAL;
532
533 if (fsize->code != supported_mode.code)
534 return -EINVAL;
535
536 fsize->min_width = supported_mode.width;
537 fsize->max_width = fsize->min_width;
538 fsize->min_height = supported_mode.height;
539 fsize->max_height = fsize->min_height;
540
541 return 0;
542}
543
544
545
546
547
548
549
550
551static void ov9282_fill_pad_format(struct ov9282 *ov9282,
552 const struct ov9282_mode *mode,
553 struct v4l2_subdev_format *fmt)
554{
555 fmt->format.width = mode->width;
556 fmt->format.height = mode->height;
557 fmt->format.code = mode->code;
558 fmt->format.field = V4L2_FIELD_NONE;
559 fmt->format.colorspace = V4L2_COLORSPACE_RAW;
560 fmt->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
561 fmt->format.quantization = V4L2_QUANTIZATION_DEFAULT;
562 fmt->format.xfer_func = V4L2_XFER_FUNC_NONE;
563}
564
565
566
567
568
569
570
571
572
573static int ov9282_get_pad_format(struct v4l2_subdev *sd,
574 struct v4l2_subdev_state *sd_state,
575 struct v4l2_subdev_format *fmt)
576{
577 struct ov9282 *ov9282 = to_ov9282(sd);
578
579 mutex_lock(&ov9282->mutex);
580
581 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
582 struct v4l2_mbus_framefmt *framefmt;
583
584 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
585 fmt->format = *framefmt;
586 } else {
587 ov9282_fill_pad_format(ov9282, ov9282->cur_mode, fmt);
588 }
589
590 mutex_unlock(&ov9282->mutex);
591
592 return 0;
593}
594
595
596
597
598
599
600
601
602
603static int ov9282_set_pad_format(struct v4l2_subdev *sd,
604 struct v4l2_subdev_state *sd_state,
605 struct v4l2_subdev_format *fmt)
606{
607 struct ov9282 *ov9282 = to_ov9282(sd);
608 const struct ov9282_mode *mode;
609 int ret = 0;
610
611 mutex_lock(&ov9282->mutex);
612
613 mode = &supported_mode;
614 ov9282_fill_pad_format(ov9282, mode, fmt);
615
616 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
617 struct v4l2_mbus_framefmt *framefmt;
618
619 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
620 *framefmt = fmt->format;
621 } else {
622 ret = ov9282_update_controls(ov9282, mode);
623 if (!ret)
624 ov9282->cur_mode = mode;
625 }
626
627 mutex_unlock(&ov9282->mutex);
628
629 return ret;
630}
631
632
633
634
635
636
637
638
639static int ov9282_init_pad_cfg(struct v4l2_subdev *sd,
640 struct v4l2_subdev_state *sd_state)
641{
642 struct ov9282 *ov9282 = to_ov9282(sd);
643 struct v4l2_subdev_format fmt = { 0 };
644
645 fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
646 ov9282_fill_pad_format(ov9282, &supported_mode, &fmt);
647
648 return ov9282_set_pad_format(sd, sd_state, &fmt);
649}
650
651
652
653
654
655
656
657static int ov9282_start_streaming(struct ov9282 *ov9282)
658{
659 const struct ov9282_reg_list *reg_list;
660 int ret;
661
662
663 reg_list = &ov9282->cur_mode->reg_list;
664 ret = ov9282_write_regs(ov9282, reg_list->regs, reg_list->num_of_regs);
665 if (ret) {
666 dev_err(ov9282->dev, "fail to write initial registers");
667 return ret;
668 }
669
670
671 ret = __v4l2_ctrl_handler_setup(ov9282->sd.ctrl_handler);
672 if (ret) {
673 dev_err(ov9282->dev, "fail to setup handler");
674 return ret;
675 }
676
677
678 ret = ov9282_write_reg(ov9282, OV9282_REG_MODE_SELECT,
679 1, OV9282_MODE_STREAMING);
680 if (ret) {
681 dev_err(ov9282->dev, "fail to start streaming");
682 return ret;
683 }
684
685 return 0;
686}
687
688
689
690
691
692
693
694static int ov9282_stop_streaming(struct ov9282 *ov9282)
695{
696 return ov9282_write_reg(ov9282, OV9282_REG_MODE_SELECT,
697 1, OV9282_MODE_STANDBY);
698}
699
700
701
702
703
704
705
706
707static int ov9282_set_stream(struct v4l2_subdev *sd, int enable)
708{
709 struct ov9282 *ov9282 = to_ov9282(sd);
710 int ret;
711
712 mutex_lock(&ov9282->mutex);
713
714 if (ov9282->streaming == enable) {
715 mutex_unlock(&ov9282->mutex);
716 return 0;
717 }
718
719 if (enable) {
720 ret = pm_runtime_resume_and_get(ov9282->dev);
721 if (ret)
722 goto error_unlock;
723
724 ret = ov9282_start_streaming(ov9282);
725 if (ret)
726 goto error_power_off;
727 } else {
728 ov9282_stop_streaming(ov9282);
729 pm_runtime_put(ov9282->dev);
730 }
731
732 ov9282->streaming = enable;
733
734 mutex_unlock(&ov9282->mutex);
735
736 return 0;
737
738error_power_off:
739 pm_runtime_put(ov9282->dev);
740error_unlock:
741 mutex_unlock(&ov9282->mutex);
742
743 return ret;
744}
745
746
747
748
749
750
751
752static int ov9282_detect(struct ov9282 *ov9282)
753{
754 int ret;
755 u32 val;
756
757 ret = ov9282_read_reg(ov9282, OV9282_REG_ID, 2, &val);
758 if (ret)
759 return ret;
760
761 if (val != OV9282_ID) {
762 dev_err(ov9282->dev, "chip id mismatch: %x!=%x",
763 OV9282_ID, val);
764 return -ENXIO;
765 }
766
767 return 0;
768}
769
770
771
772
773
774
775
776static int ov9282_parse_hw_config(struct ov9282 *ov9282)
777{
778 struct fwnode_handle *fwnode = dev_fwnode(ov9282->dev);
779 struct v4l2_fwnode_endpoint bus_cfg = {
780 .bus_type = V4L2_MBUS_CSI2_DPHY
781 };
782 struct fwnode_handle *ep;
783 unsigned long rate;
784 unsigned int i;
785 int ret;
786
787 if (!fwnode)
788 return -ENXIO;
789
790
791 ov9282->reset_gpio = devm_gpiod_get_optional(ov9282->dev, "reset",
792 GPIOD_OUT_LOW);
793 if (IS_ERR(ov9282->reset_gpio)) {
794 dev_err(ov9282->dev, "failed to get reset gpio %ld",
795 PTR_ERR(ov9282->reset_gpio));
796 return PTR_ERR(ov9282->reset_gpio);
797 }
798
799
800 ov9282->inclk = devm_clk_get(ov9282->dev, NULL);
801 if (IS_ERR(ov9282->inclk)) {
802 dev_err(ov9282->dev, "could not get inclk");
803 return PTR_ERR(ov9282->inclk);
804 }
805
806 rate = clk_get_rate(ov9282->inclk);
807 if (rate != OV9282_INCLK_RATE) {
808 dev_err(ov9282->dev, "inclk frequency mismatch");
809 return -EINVAL;
810 }
811
812 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
813 if (!ep)
814 return -ENXIO;
815
816 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
817 fwnode_handle_put(ep);
818 if (ret)
819 return ret;
820
821 if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV9282_NUM_DATA_LANES) {
822 dev_err(ov9282->dev,
823 "number of CSI2 data lanes %d is not supported",
824 bus_cfg.bus.mipi_csi2.num_data_lanes);
825 ret = -EINVAL;
826 goto done_endpoint_free;
827 }
828
829 if (!bus_cfg.nr_of_link_frequencies) {
830 dev_err(ov9282->dev, "no link frequencies defined");
831 ret = -EINVAL;
832 goto done_endpoint_free;
833 }
834
835 for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++)
836 if (bus_cfg.link_frequencies[i] == OV9282_LINK_FREQ)
837 goto done_endpoint_free;
838
839 ret = -EINVAL;
840
841done_endpoint_free:
842 v4l2_fwnode_endpoint_free(&bus_cfg);
843
844 return ret;
845}
846
847
848static const struct v4l2_subdev_video_ops ov9282_video_ops = {
849 .s_stream = ov9282_set_stream,
850};
851
852static const struct v4l2_subdev_pad_ops ov9282_pad_ops = {
853 .init_cfg = ov9282_init_pad_cfg,
854 .enum_mbus_code = ov9282_enum_mbus_code,
855 .enum_frame_size = ov9282_enum_frame_size,
856 .get_fmt = ov9282_get_pad_format,
857 .set_fmt = ov9282_set_pad_format,
858};
859
860static const struct v4l2_subdev_ops ov9282_subdev_ops = {
861 .video = &ov9282_video_ops,
862 .pad = &ov9282_pad_ops,
863};
864
865
866
867
868
869
870
871static int ov9282_power_on(struct device *dev)
872{
873 struct v4l2_subdev *sd = dev_get_drvdata(dev);
874 struct ov9282 *ov9282 = to_ov9282(sd);
875 int ret;
876
877 usleep_range(400, 600);
878
879 gpiod_set_value_cansleep(ov9282->reset_gpio, 1);
880
881 ret = clk_prepare_enable(ov9282->inclk);
882 if (ret) {
883 dev_err(ov9282->dev, "fail to enable inclk");
884 goto error_reset;
885 }
886
887 usleep_range(400, 600);
888
889 return 0;
890
891error_reset:
892 gpiod_set_value_cansleep(ov9282->reset_gpio, 0);
893
894 return ret;
895}
896
897
898
899
900
901
902
903static int ov9282_power_off(struct device *dev)
904{
905 struct v4l2_subdev *sd = dev_get_drvdata(dev);
906 struct ov9282 *ov9282 = to_ov9282(sd);
907
908 gpiod_set_value_cansleep(ov9282->reset_gpio, 0);
909
910 clk_disable_unprepare(ov9282->inclk);
911
912 return 0;
913}
914
915
916
917
918
919
920
921static int ov9282_init_controls(struct ov9282 *ov9282)
922{
923 struct v4l2_ctrl_handler *ctrl_hdlr = &ov9282->ctrl_handler;
924 const struct ov9282_mode *mode = ov9282->cur_mode;
925 u32 lpfr;
926 int ret;
927
928 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 6);
929 if (ret)
930 return ret;
931
932
933 ctrl_hdlr->lock = &ov9282->mutex;
934
935
936 lpfr = mode->vblank + mode->height;
937 ov9282->exp_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
938 &ov9282_ctrl_ops,
939 V4L2_CID_EXPOSURE,
940 OV9282_EXPOSURE_MIN,
941 lpfr - OV9282_EXPOSURE_OFFSET,
942 OV9282_EXPOSURE_STEP,
943 OV9282_EXPOSURE_DEFAULT);
944
945 ov9282->again_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
946 &ov9282_ctrl_ops,
947 V4L2_CID_ANALOGUE_GAIN,
948 OV9282_AGAIN_MIN,
949 OV9282_AGAIN_MAX,
950 OV9282_AGAIN_STEP,
951 OV9282_AGAIN_DEFAULT);
952
953 v4l2_ctrl_cluster(2, &ov9282->exp_ctrl);
954
955 ov9282->vblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
956 &ov9282_ctrl_ops,
957 V4L2_CID_VBLANK,
958 mode->vblank_min,
959 mode->vblank_max,
960 1, mode->vblank);
961
962
963 ov9282->pclk_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
964 &ov9282_ctrl_ops,
965 V4L2_CID_PIXEL_RATE,
966 mode->pclk, mode->pclk,
967 1, mode->pclk);
968
969 ov9282->link_freq_ctrl = v4l2_ctrl_new_int_menu(ctrl_hdlr,
970 &ov9282_ctrl_ops,
971 V4L2_CID_LINK_FREQ,
972 ARRAY_SIZE(link_freq) -
973 1,
974 mode->link_freq_idx,
975 link_freq);
976 if (ov9282->link_freq_ctrl)
977 ov9282->link_freq_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
978
979 ov9282->hblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
980 &ov9282_ctrl_ops,
981 V4L2_CID_HBLANK,
982 OV9282_REG_MIN,
983 OV9282_REG_MAX,
984 1, mode->hblank);
985 if (ov9282->hblank_ctrl)
986 ov9282->hblank_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
987
988 if (ctrl_hdlr->error) {
989 dev_err(ov9282->dev, "control init failed: %d",
990 ctrl_hdlr->error);
991 v4l2_ctrl_handler_free(ctrl_hdlr);
992 return ctrl_hdlr->error;
993 }
994
995 ov9282->sd.ctrl_handler = ctrl_hdlr;
996
997 return 0;
998}
999
1000
1001
1002
1003
1004
1005
1006static int ov9282_probe(struct i2c_client *client)
1007{
1008 struct ov9282 *ov9282;
1009 int ret;
1010
1011 ov9282 = devm_kzalloc(&client->dev, sizeof(*ov9282), GFP_KERNEL);
1012 if (!ov9282)
1013 return -ENOMEM;
1014
1015 ov9282->dev = &client->dev;
1016
1017
1018 v4l2_i2c_subdev_init(&ov9282->sd, client, &ov9282_subdev_ops);
1019
1020 ret = ov9282_parse_hw_config(ov9282);
1021 if (ret) {
1022 dev_err(ov9282->dev, "HW configuration is not supported");
1023 return ret;
1024 }
1025
1026 mutex_init(&ov9282->mutex);
1027
1028 ret = ov9282_power_on(ov9282->dev);
1029 if (ret) {
1030 dev_err(ov9282->dev, "failed to power-on the sensor");
1031 goto error_mutex_destroy;
1032 }
1033
1034
1035 ret = ov9282_detect(ov9282);
1036 if (ret) {
1037 dev_err(ov9282->dev, "failed to find sensor: %d", ret);
1038 goto error_power_off;
1039 }
1040
1041
1042 ov9282->cur_mode = &supported_mode;
1043 ov9282->vblank = ov9282->cur_mode->vblank;
1044
1045 ret = ov9282_init_controls(ov9282);
1046 if (ret) {
1047 dev_err(ov9282->dev, "failed to init controls: %d", ret);
1048 goto error_power_off;
1049 }
1050
1051
1052 ov9282->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1053 ov9282->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1054
1055
1056 ov9282->pad.flags = MEDIA_PAD_FL_SOURCE;
1057 ret = media_entity_pads_init(&ov9282->sd.entity, 1, &ov9282->pad);
1058 if (ret) {
1059 dev_err(ov9282->dev, "failed to init entity pads: %d", ret);
1060 goto error_handler_free;
1061 }
1062
1063 ret = v4l2_async_register_subdev_sensor(&ov9282->sd);
1064 if (ret < 0) {
1065 dev_err(ov9282->dev,
1066 "failed to register async subdev: %d", ret);
1067 goto error_media_entity;
1068 }
1069
1070 pm_runtime_set_active(ov9282->dev);
1071 pm_runtime_enable(ov9282->dev);
1072 pm_runtime_idle(ov9282->dev);
1073
1074 return 0;
1075
1076error_media_entity:
1077 media_entity_cleanup(&ov9282->sd.entity);
1078error_handler_free:
1079 v4l2_ctrl_handler_free(ov9282->sd.ctrl_handler);
1080error_power_off:
1081 ov9282_power_off(ov9282->dev);
1082error_mutex_destroy:
1083 mutex_destroy(&ov9282->mutex);
1084
1085 return ret;
1086}
1087
1088
1089
1090
1091
1092
1093
1094static int ov9282_remove(struct i2c_client *client)
1095{
1096 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1097 struct ov9282 *ov9282 = to_ov9282(sd);
1098
1099 v4l2_async_unregister_subdev(sd);
1100 media_entity_cleanup(&sd->entity);
1101 v4l2_ctrl_handler_free(sd->ctrl_handler);
1102
1103 pm_runtime_disable(&client->dev);
1104 if (!pm_runtime_status_suspended(&client->dev))
1105 ov9282_power_off(&client->dev);
1106 pm_runtime_set_suspended(&client->dev);
1107
1108 mutex_destroy(&ov9282->mutex);
1109
1110 return 0;
1111}
1112
1113static const struct dev_pm_ops ov9282_pm_ops = {
1114 SET_RUNTIME_PM_OPS(ov9282_power_off, ov9282_power_on, NULL)
1115};
1116
1117static const struct of_device_id ov9282_of_match[] = {
1118 { .compatible = "ovti,ov9282" },
1119 { }
1120};
1121
1122MODULE_DEVICE_TABLE(of, ov9282_of_match);
1123
1124static struct i2c_driver ov9282_driver = {
1125 .probe_new = ov9282_probe,
1126 .remove = ov9282_remove,
1127 .driver = {
1128 .name = "ov9282",
1129 .pm = &ov9282_pm_ops,
1130 .of_match_table = ov9282_of_match,
1131 },
1132};
1133
1134module_i2c_driver(ov9282_driver);
1135
1136MODULE_DESCRIPTION("OmniVision ov9282 sensor driver");
1137MODULE_LICENSE("GPL");
1138