1
2
3
4
5#include <linux/scatterlist.h>
6#include <linux/memregion.h>
7#include <linux/highmem.h>
8#include <linux/sched.h>
9#include <linux/slab.h>
10#include <linux/hash.h>
11#include <linux/sort.h>
12#include <linux/io.h>
13#include <linux/nd.h>
14#include "nd-core.h"
15#include "nd.h"
16
17
18
19
20
21#include <linux/io-64-nonatomic-hi-lo.h>
22
23static DEFINE_PER_CPU(int, flush_idx);
24
25static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
26 struct nd_region_data *ndrd)
27{
28 int i, j;
29
30 dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
31 nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
32 for (i = 0; i < (1 << ndrd->hints_shift); i++) {
33 struct resource *res = &nvdimm->flush_wpq[i];
34 unsigned long pfn = PHYS_PFN(res->start);
35 void __iomem *flush_page;
36
37
38 for (j = 0; j < i; j++) {
39 struct resource *res_j = &nvdimm->flush_wpq[j];
40 unsigned long pfn_j = PHYS_PFN(res_j->start);
41
42 if (pfn == pfn_j)
43 break;
44 }
45
46 if (j < i)
47 flush_page = (void __iomem *) ((unsigned long)
48 ndrd_get_flush_wpq(ndrd, dimm, j)
49 & PAGE_MASK);
50 else
51 flush_page = devm_nvdimm_ioremap(dev,
52 PFN_PHYS(pfn), PAGE_SIZE);
53 if (!flush_page)
54 return -ENXIO;
55 ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
56 + (res->start & ~PAGE_MASK));
57 }
58
59 return 0;
60}
61
62int nd_region_activate(struct nd_region *nd_region)
63{
64 int i, j, num_flush = 0;
65 struct nd_region_data *ndrd;
66 struct device *dev = &nd_region->dev;
67 size_t flush_data_size = sizeof(void *);
68
69 nvdimm_bus_lock(&nd_region->dev);
70 for (i = 0; i < nd_region->ndr_mappings; i++) {
71 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
72 struct nvdimm *nvdimm = nd_mapping->nvdimm;
73
74 if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) {
75 nvdimm_bus_unlock(&nd_region->dev);
76 return -EBUSY;
77 }
78
79
80 flush_data_size += sizeof(void *);
81 num_flush = min_not_zero(num_flush, nvdimm->num_flush);
82 if (!nvdimm->num_flush)
83 continue;
84 flush_data_size += nvdimm->num_flush * sizeof(void *);
85 }
86 nvdimm_bus_unlock(&nd_region->dev);
87
88 ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
89 if (!ndrd)
90 return -ENOMEM;
91 dev_set_drvdata(dev, ndrd);
92
93 if (!num_flush)
94 return 0;
95
96 ndrd->hints_shift = ilog2(num_flush);
97 for (i = 0; i < nd_region->ndr_mappings; i++) {
98 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
99 struct nvdimm *nvdimm = nd_mapping->nvdimm;
100 int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
101
102 if (rc)
103 return rc;
104 }
105
106
107
108
109
110 for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
111
112 if (!ndrd_get_flush_wpq(ndrd, i, 0))
113 continue;
114
115 for (j = i + 1; j < nd_region->ndr_mappings; j++)
116 if (ndrd_get_flush_wpq(ndrd, i, 0) ==
117 ndrd_get_flush_wpq(ndrd, j, 0))
118 ndrd_set_flush_wpq(ndrd, j, 0, NULL);
119 }
120
121 return 0;
122}
123
124static void nd_region_release(struct device *dev)
125{
126 struct nd_region *nd_region = to_nd_region(dev);
127 u16 i;
128
129 for (i = 0; i < nd_region->ndr_mappings; i++) {
130 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
131 struct nvdimm *nvdimm = nd_mapping->nvdimm;
132
133 put_device(&nvdimm->dev);
134 }
135 free_percpu(nd_region->lane);
136 memregion_free(nd_region->id);
137 if (is_nd_blk(dev))
138 kfree(to_nd_blk_region(dev));
139 else
140 kfree(nd_region);
141}
142
143struct nd_region *to_nd_region(struct device *dev)
144{
145 struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
146
147 WARN_ON(dev->type->release != nd_region_release);
148 return nd_region;
149}
150EXPORT_SYMBOL_GPL(to_nd_region);
151
152struct device *nd_region_dev(struct nd_region *nd_region)
153{
154 if (!nd_region)
155 return NULL;
156 return &nd_region->dev;
157}
158EXPORT_SYMBOL_GPL(nd_region_dev);
159
160struct nd_blk_region *to_nd_blk_region(struct device *dev)
161{
162 struct nd_region *nd_region = to_nd_region(dev);
163
164 WARN_ON(!is_nd_blk(dev));
165 return container_of(nd_region, struct nd_blk_region, nd_region);
166}
167EXPORT_SYMBOL_GPL(to_nd_blk_region);
168
169void *nd_region_provider_data(struct nd_region *nd_region)
170{
171 return nd_region->provider_data;
172}
173EXPORT_SYMBOL_GPL(nd_region_provider_data);
174
175void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
176{
177 return ndbr->blk_provider_data;
178}
179EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
180
181void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
182{
183 ndbr->blk_provider_data = data;
184}
185EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
186
187
188
189
190
191
192
193
194
195int nd_region_to_nstype(struct nd_region *nd_region)
196{
197 if (is_memory(&nd_region->dev)) {
198 u16 i, label;
199
200 for (i = 0, label = 0; i < nd_region->ndr_mappings; i++) {
201 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
202 struct nvdimm *nvdimm = nd_mapping->nvdimm;
203
204 if (test_bit(NDD_LABELING, &nvdimm->flags))
205 label++;
206 }
207 if (label)
208 return ND_DEVICE_NAMESPACE_PMEM;
209 else
210 return ND_DEVICE_NAMESPACE_IO;
211 } else if (is_nd_blk(&nd_region->dev)) {
212 return ND_DEVICE_NAMESPACE_BLK;
213 }
214
215 return 0;
216}
217EXPORT_SYMBOL(nd_region_to_nstype);
218
219static unsigned long long region_size(struct nd_region *nd_region)
220{
221 if (is_memory(&nd_region->dev)) {
222 return nd_region->ndr_size;
223 } else if (nd_region->ndr_mappings == 1) {
224 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
225
226 return nd_mapping->size;
227 }
228
229 return 0;
230}
231
232static ssize_t size_show(struct device *dev,
233 struct device_attribute *attr, char *buf)
234{
235 struct nd_region *nd_region = to_nd_region(dev);
236
237 return sprintf(buf, "%llu\n", region_size(nd_region));
238}
239static DEVICE_ATTR_RO(size);
240
241static ssize_t deep_flush_show(struct device *dev,
242 struct device_attribute *attr, char *buf)
243{
244 struct nd_region *nd_region = to_nd_region(dev);
245
246
247
248
249
250 return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
251}
252
253static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
254 const char *buf, size_t len)
255{
256 bool flush;
257 int rc = strtobool(buf, &flush);
258 struct nd_region *nd_region = to_nd_region(dev);
259
260 if (rc)
261 return rc;
262 if (!flush)
263 return -EINVAL;
264 rc = nvdimm_flush(nd_region, NULL);
265 if (rc)
266 return rc;
267
268 return len;
269}
270static DEVICE_ATTR_RW(deep_flush);
271
272static ssize_t mappings_show(struct device *dev,
273 struct device_attribute *attr, char *buf)
274{
275 struct nd_region *nd_region = to_nd_region(dev);
276
277 return sprintf(buf, "%d\n", nd_region->ndr_mappings);
278}
279static DEVICE_ATTR_RO(mappings);
280
281static ssize_t nstype_show(struct device *dev,
282 struct device_attribute *attr, char *buf)
283{
284 struct nd_region *nd_region = to_nd_region(dev);
285
286 return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
287}
288static DEVICE_ATTR_RO(nstype);
289
290static ssize_t set_cookie_show(struct device *dev,
291 struct device_attribute *attr, char *buf)
292{
293 struct nd_region *nd_region = to_nd_region(dev);
294 struct nd_interleave_set *nd_set = nd_region->nd_set;
295 ssize_t rc = 0;
296
297 if (is_memory(dev) && nd_set)
298 ;
299 else
300 return -ENXIO;
301
302
303
304
305
306
307
308 nd_device_lock(dev);
309 nvdimm_bus_lock(dev);
310 wait_nvdimm_bus_probe_idle(dev);
311 if (nd_region->ndr_mappings) {
312 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
313 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
314
315 if (ndd) {
316 struct nd_namespace_index *nsindex;
317
318 nsindex = to_namespace_index(ndd, ndd->ns_current);
319 rc = sprintf(buf, "%#llx\n",
320 nd_region_interleave_set_cookie(nd_region,
321 nsindex));
322 }
323 }
324 nvdimm_bus_unlock(dev);
325 nd_device_unlock(dev);
326
327 if (rc)
328 return rc;
329 return sprintf(buf, "%#llx\n", nd_set->cookie1);
330}
331static DEVICE_ATTR_RO(set_cookie);
332
333resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
334{
335 resource_size_t blk_max_overlap = 0, available, overlap;
336 int i;
337
338 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
339
340 retry:
341 available = 0;
342 overlap = blk_max_overlap;
343 for (i = 0; i < nd_region->ndr_mappings; i++) {
344 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
345 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
346
347
348 if (!ndd)
349 return 0;
350
351 if (is_memory(&nd_region->dev)) {
352 available += nd_pmem_available_dpa(nd_region,
353 nd_mapping, &overlap);
354 if (overlap > blk_max_overlap) {
355 blk_max_overlap = overlap;
356 goto retry;
357 }
358 } else if (is_nd_blk(&nd_region->dev))
359 available += nd_blk_available_dpa(nd_region);
360 }
361
362 return available;
363}
364
365resource_size_t nd_region_allocatable_dpa(struct nd_region *nd_region)
366{
367 resource_size_t available = 0;
368 int i;
369
370 if (is_memory(&nd_region->dev))
371 available = PHYS_ADDR_MAX;
372
373 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
374 for (i = 0; i < nd_region->ndr_mappings; i++) {
375 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
376
377 if (is_memory(&nd_region->dev))
378 available = min(available,
379 nd_pmem_max_contiguous_dpa(nd_region,
380 nd_mapping));
381 else if (is_nd_blk(&nd_region->dev))
382 available += nd_blk_available_dpa(nd_region);
383 }
384 if (is_memory(&nd_region->dev))
385 return available * nd_region->ndr_mappings;
386 return available;
387}
388
389static ssize_t available_size_show(struct device *dev,
390 struct device_attribute *attr, char *buf)
391{
392 struct nd_region *nd_region = to_nd_region(dev);
393 unsigned long long available = 0;
394
395
396
397
398
399
400
401 nd_device_lock(dev);
402 nvdimm_bus_lock(dev);
403 wait_nvdimm_bus_probe_idle(dev);
404 available = nd_region_available_dpa(nd_region);
405 nvdimm_bus_unlock(dev);
406 nd_device_unlock(dev);
407
408 return sprintf(buf, "%llu\n", available);
409}
410static DEVICE_ATTR_RO(available_size);
411
412static ssize_t max_available_extent_show(struct device *dev,
413 struct device_attribute *attr, char *buf)
414{
415 struct nd_region *nd_region = to_nd_region(dev);
416 unsigned long long available = 0;
417
418 nd_device_lock(dev);
419 nvdimm_bus_lock(dev);
420 wait_nvdimm_bus_probe_idle(dev);
421 available = nd_region_allocatable_dpa(nd_region);
422 nvdimm_bus_unlock(dev);
423 nd_device_unlock(dev);
424
425 return sprintf(buf, "%llu\n", available);
426}
427static DEVICE_ATTR_RO(max_available_extent);
428
429static ssize_t init_namespaces_show(struct device *dev,
430 struct device_attribute *attr, char *buf)
431{
432 struct nd_region_data *ndrd = dev_get_drvdata(dev);
433 ssize_t rc;
434
435 nvdimm_bus_lock(dev);
436 if (ndrd)
437 rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
438 else
439 rc = -ENXIO;
440 nvdimm_bus_unlock(dev);
441
442 return rc;
443}
444static DEVICE_ATTR_RO(init_namespaces);
445
446static ssize_t namespace_seed_show(struct device *dev,
447 struct device_attribute *attr, char *buf)
448{
449 struct nd_region *nd_region = to_nd_region(dev);
450 ssize_t rc;
451
452 nvdimm_bus_lock(dev);
453 if (nd_region->ns_seed)
454 rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
455 else
456 rc = sprintf(buf, "\n");
457 nvdimm_bus_unlock(dev);
458 return rc;
459}
460static DEVICE_ATTR_RO(namespace_seed);
461
462static ssize_t btt_seed_show(struct device *dev,
463 struct device_attribute *attr, char *buf)
464{
465 struct nd_region *nd_region = to_nd_region(dev);
466 ssize_t rc;
467
468 nvdimm_bus_lock(dev);
469 if (nd_region->btt_seed)
470 rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
471 else
472 rc = sprintf(buf, "\n");
473 nvdimm_bus_unlock(dev);
474
475 return rc;
476}
477static DEVICE_ATTR_RO(btt_seed);
478
479static ssize_t pfn_seed_show(struct device *dev,
480 struct device_attribute *attr, char *buf)
481{
482 struct nd_region *nd_region = to_nd_region(dev);
483 ssize_t rc;
484
485 nvdimm_bus_lock(dev);
486 if (nd_region->pfn_seed)
487 rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
488 else
489 rc = sprintf(buf, "\n");
490 nvdimm_bus_unlock(dev);
491
492 return rc;
493}
494static DEVICE_ATTR_RO(pfn_seed);
495
496static ssize_t dax_seed_show(struct device *dev,
497 struct device_attribute *attr, char *buf)
498{
499 struct nd_region *nd_region = to_nd_region(dev);
500 ssize_t rc;
501
502 nvdimm_bus_lock(dev);
503 if (nd_region->dax_seed)
504 rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
505 else
506 rc = sprintf(buf, "\n");
507 nvdimm_bus_unlock(dev);
508
509 return rc;
510}
511static DEVICE_ATTR_RO(dax_seed);
512
513static ssize_t read_only_show(struct device *dev,
514 struct device_attribute *attr, char *buf)
515{
516 struct nd_region *nd_region = to_nd_region(dev);
517
518 return sprintf(buf, "%d\n", nd_region->ro);
519}
520
521static int revalidate_read_only(struct device *dev, void *data)
522{
523 nd_device_notify(dev, NVDIMM_REVALIDATE_REGION);
524 return 0;
525}
526
527static ssize_t read_only_store(struct device *dev,
528 struct device_attribute *attr, const char *buf, size_t len)
529{
530 bool ro;
531 int rc = strtobool(buf, &ro);
532 struct nd_region *nd_region = to_nd_region(dev);
533
534 if (rc)
535 return rc;
536
537 nd_region->ro = ro;
538 device_for_each_child(dev, NULL, revalidate_read_only);
539 return len;
540}
541static DEVICE_ATTR_RW(read_only);
542
543static ssize_t align_show(struct device *dev,
544 struct device_attribute *attr, char *buf)
545{
546 struct nd_region *nd_region = to_nd_region(dev);
547
548 return sprintf(buf, "%#lx\n", nd_region->align);
549}
550
551static ssize_t align_store(struct device *dev,
552 struct device_attribute *attr, const char *buf, size_t len)
553{
554 struct nd_region *nd_region = to_nd_region(dev);
555 unsigned long val, dpa;
556 u32 remainder;
557 int rc;
558
559 rc = kstrtoul(buf, 0, &val);
560 if (rc)
561 return rc;
562
563 if (!nd_region->ndr_mappings)
564 return -ENXIO;
565
566
567
568
569
570
571
572
573 dpa = div_u64_rem(val, nd_region->ndr_mappings, &remainder);
574 if (!is_power_of_2(dpa) || dpa < PAGE_SIZE
575 || val > region_size(nd_region) || remainder)
576 return -EINVAL;
577
578
579
580
581
582
583 nvdimm_bus_lock(dev);
584 nd_region->align = val;
585 nvdimm_bus_unlock(dev);
586
587 return len;
588}
589static DEVICE_ATTR_RW(align);
590
591static ssize_t region_badblocks_show(struct device *dev,
592 struct device_attribute *attr, char *buf)
593{
594 struct nd_region *nd_region = to_nd_region(dev);
595 ssize_t rc;
596
597 nd_device_lock(dev);
598 if (dev->driver)
599 rc = badblocks_show(&nd_region->bb, buf, 0);
600 else
601 rc = -ENXIO;
602 nd_device_unlock(dev);
603
604 return rc;
605}
606static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
607
608static ssize_t resource_show(struct device *dev,
609 struct device_attribute *attr, char *buf)
610{
611 struct nd_region *nd_region = to_nd_region(dev);
612
613 return sprintf(buf, "%#llx\n", nd_region->ndr_start);
614}
615static DEVICE_ATTR_ADMIN_RO(resource);
616
617static ssize_t persistence_domain_show(struct device *dev,
618 struct device_attribute *attr, char *buf)
619{
620 struct nd_region *nd_region = to_nd_region(dev);
621
622 if (test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags))
623 return sprintf(buf, "cpu_cache\n");
624 else if (test_bit(ND_REGION_PERSIST_MEMCTRL, &nd_region->flags))
625 return sprintf(buf, "memory_controller\n");
626 else
627 return sprintf(buf, "\n");
628}
629static DEVICE_ATTR_RO(persistence_domain);
630
631static struct attribute *nd_region_attributes[] = {
632 &dev_attr_size.attr,
633 &dev_attr_align.attr,
634 &dev_attr_nstype.attr,
635 &dev_attr_mappings.attr,
636 &dev_attr_btt_seed.attr,
637 &dev_attr_pfn_seed.attr,
638 &dev_attr_dax_seed.attr,
639 &dev_attr_deep_flush.attr,
640 &dev_attr_read_only.attr,
641 &dev_attr_set_cookie.attr,
642 &dev_attr_available_size.attr,
643 &dev_attr_max_available_extent.attr,
644 &dev_attr_namespace_seed.attr,
645 &dev_attr_init_namespaces.attr,
646 &dev_attr_badblocks.attr,
647 &dev_attr_resource.attr,
648 &dev_attr_persistence_domain.attr,
649 NULL,
650};
651
652static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
653{
654 struct device *dev = container_of(kobj, typeof(*dev), kobj);
655 struct nd_region *nd_region = to_nd_region(dev);
656 struct nd_interleave_set *nd_set = nd_region->nd_set;
657 int type = nd_region_to_nstype(nd_region);
658
659 if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
660 return 0;
661
662 if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
663 return 0;
664
665 if (!is_memory(dev) && a == &dev_attr_badblocks.attr)
666 return 0;
667
668 if (a == &dev_attr_resource.attr && !is_memory(dev))
669 return 0;
670
671 if (a == &dev_attr_deep_flush.attr) {
672 int has_flush = nvdimm_has_flush(nd_region);
673
674 if (has_flush == 1)
675 return a->mode;
676 else if (has_flush == 0)
677 return 0444;
678 else
679 return 0;
680 }
681
682 if (a == &dev_attr_persistence_domain.attr) {
683 if ((nd_region->flags & (BIT(ND_REGION_PERSIST_CACHE)
684 | BIT(ND_REGION_PERSIST_MEMCTRL))) == 0)
685 return 0;
686 return a->mode;
687 }
688
689 if (a == &dev_attr_align.attr)
690 return a->mode;
691
692 if (a != &dev_attr_set_cookie.attr
693 && a != &dev_attr_available_size.attr)
694 return a->mode;
695
696 if ((type == ND_DEVICE_NAMESPACE_PMEM
697 || type == ND_DEVICE_NAMESPACE_BLK)
698 && a == &dev_attr_available_size.attr)
699 return a->mode;
700 else if (is_memory(dev) && nd_set)
701 return a->mode;
702
703 return 0;
704}
705
706static ssize_t mappingN(struct device *dev, char *buf, int n)
707{
708 struct nd_region *nd_region = to_nd_region(dev);
709 struct nd_mapping *nd_mapping;
710 struct nvdimm *nvdimm;
711
712 if (n >= nd_region->ndr_mappings)
713 return -ENXIO;
714 nd_mapping = &nd_region->mapping[n];
715 nvdimm = nd_mapping->nvdimm;
716
717 return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
718 nd_mapping->start, nd_mapping->size,
719 nd_mapping->position);
720}
721
722#define REGION_MAPPING(idx) \
723static ssize_t mapping##idx##_show(struct device *dev, \
724 struct device_attribute *attr, char *buf) \
725{ \
726 return mappingN(dev, buf, idx); \
727} \
728static DEVICE_ATTR_RO(mapping##idx)
729
730
731
732
733
734REGION_MAPPING(0);
735REGION_MAPPING(1);
736REGION_MAPPING(2);
737REGION_MAPPING(3);
738REGION_MAPPING(4);
739REGION_MAPPING(5);
740REGION_MAPPING(6);
741REGION_MAPPING(7);
742REGION_MAPPING(8);
743REGION_MAPPING(9);
744REGION_MAPPING(10);
745REGION_MAPPING(11);
746REGION_MAPPING(12);
747REGION_MAPPING(13);
748REGION_MAPPING(14);
749REGION_MAPPING(15);
750REGION_MAPPING(16);
751REGION_MAPPING(17);
752REGION_MAPPING(18);
753REGION_MAPPING(19);
754REGION_MAPPING(20);
755REGION_MAPPING(21);
756REGION_MAPPING(22);
757REGION_MAPPING(23);
758REGION_MAPPING(24);
759REGION_MAPPING(25);
760REGION_MAPPING(26);
761REGION_MAPPING(27);
762REGION_MAPPING(28);
763REGION_MAPPING(29);
764REGION_MAPPING(30);
765REGION_MAPPING(31);
766
767static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
768{
769 struct device *dev = container_of(kobj, struct device, kobj);
770 struct nd_region *nd_region = to_nd_region(dev);
771
772 if (n < nd_region->ndr_mappings)
773 return a->mode;
774 return 0;
775}
776
777static struct attribute *mapping_attributes[] = {
778 &dev_attr_mapping0.attr,
779 &dev_attr_mapping1.attr,
780 &dev_attr_mapping2.attr,
781 &dev_attr_mapping3.attr,
782 &dev_attr_mapping4.attr,
783 &dev_attr_mapping5.attr,
784 &dev_attr_mapping6.attr,
785 &dev_attr_mapping7.attr,
786 &dev_attr_mapping8.attr,
787 &dev_attr_mapping9.attr,
788 &dev_attr_mapping10.attr,
789 &dev_attr_mapping11.attr,
790 &dev_attr_mapping12.attr,
791 &dev_attr_mapping13.attr,
792 &dev_attr_mapping14.attr,
793 &dev_attr_mapping15.attr,
794 &dev_attr_mapping16.attr,
795 &dev_attr_mapping17.attr,
796 &dev_attr_mapping18.attr,
797 &dev_attr_mapping19.attr,
798 &dev_attr_mapping20.attr,
799 &dev_attr_mapping21.attr,
800 &dev_attr_mapping22.attr,
801 &dev_attr_mapping23.attr,
802 &dev_attr_mapping24.attr,
803 &dev_attr_mapping25.attr,
804 &dev_attr_mapping26.attr,
805 &dev_attr_mapping27.attr,
806 &dev_attr_mapping28.attr,
807 &dev_attr_mapping29.attr,
808 &dev_attr_mapping30.attr,
809 &dev_attr_mapping31.attr,
810 NULL,
811};
812
813static const struct attribute_group nd_mapping_attribute_group = {
814 .is_visible = mapping_visible,
815 .attrs = mapping_attributes,
816};
817
818static const struct attribute_group nd_region_attribute_group = {
819 .attrs = nd_region_attributes,
820 .is_visible = region_visible,
821};
822
823static const struct attribute_group *nd_region_attribute_groups[] = {
824 &nd_device_attribute_group,
825 &nd_region_attribute_group,
826 &nd_numa_attribute_group,
827 &nd_mapping_attribute_group,
828 NULL,
829};
830
831static const struct device_type nd_blk_device_type = {
832 .name = "nd_blk",
833 .release = nd_region_release,
834 .groups = nd_region_attribute_groups,
835};
836
837static const struct device_type nd_pmem_device_type = {
838 .name = "nd_pmem",
839 .release = nd_region_release,
840 .groups = nd_region_attribute_groups,
841};
842
843static const struct device_type nd_volatile_device_type = {
844 .name = "nd_volatile",
845 .release = nd_region_release,
846 .groups = nd_region_attribute_groups,
847};
848
849bool is_nd_pmem(struct device *dev)
850{
851 return dev ? dev->type == &nd_pmem_device_type : false;
852}
853
854bool is_nd_blk(struct device *dev)
855{
856 return dev ? dev->type == &nd_blk_device_type : false;
857}
858
859bool is_nd_volatile(struct device *dev)
860{
861 return dev ? dev->type == &nd_volatile_device_type : false;
862}
863
864u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
865 struct nd_namespace_index *nsindex)
866{
867 struct nd_interleave_set *nd_set = nd_region->nd_set;
868
869 if (!nd_set)
870 return 0;
871
872 if (nsindex && __le16_to_cpu(nsindex->major) == 1
873 && __le16_to_cpu(nsindex->minor) == 1)
874 return nd_set->cookie1;
875 return nd_set->cookie2;
876}
877
878u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
879{
880 struct nd_interleave_set *nd_set = nd_region->nd_set;
881
882 if (nd_set)
883 return nd_set->altcookie;
884 return 0;
885}
886
887void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
888{
889 struct nd_label_ent *label_ent, *e;
890
891 lockdep_assert_held(&nd_mapping->lock);
892 list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
893 list_del(&label_ent->list);
894 kfree(label_ent);
895 }
896}
897
898
899
900
901
902void nd_region_advance_seeds(struct nd_region *nd_region, struct device *dev)
903{
904 nvdimm_bus_lock(dev);
905 if (nd_region->ns_seed == dev) {
906 nd_region_create_ns_seed(nd_region);
907 } else if (is_nd_btt(dev)) {
908 struct nd_btt *nd_btt = to_nd_btt(dev);
909
910 if (nd_region->btt_seed == dev)
911 nd_region_create_btt_seed(nd_region);
912 if (nd_region->ns_seed == &nd_btt->ndns->dev)
913 nd_region_create_ns_seed(nd_region);
914 } else if (is_nd_pfn(dev)) {
915 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
916
917 if (nd_region->pfn_seed == dev)
918 nd_region_create_pfn_seed(nd_region);
919 if (nd_region->ns_seed == &nd_pfn->ndns->dev)
920 nd_region_create_ns_seed(nd_region);
921 } else if (is_nd_dax(dev)) {
922 struct nd_dax *nd_dax = to_nd_dax(dev);
923
924 if (nd_region->dax_seed == dev)
925 nd_region_create_dax_seed(nd_region);
926 if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
927 nd_region_create_ns_seed(nd_region);
928 }
929 nvdimm_bus_unlock(dev);
930}
931
932int nd_blk_region_init(struct nd_region *nd_region)
933{
934 struct device *dev = &nd_region->dev;
935 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
936
937 if (!is_nd_blk(dev))
938 return 0;
939
940 if (nd_region->ndr_mappings < 1) {
941 dev_dbg(dev, "invalid BLK region\n");
942 return -ENXIO;
943 }
944
945 return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
946}
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
966{
967 unsigned int cpu, lane;
968
969 cpu = get_cpu();
970 if (nd_region->num_lanes < nr_cpu_ids) {
971 struct nd_percpu_lane *ndl_lock, *ndl_count;
972
973 lane = cpu % nd_region->num_lanes;
974 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
975 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
976 if (ndl_count->count++ == 0)
977 spin_lock(&ndl_lock->lock);
978 } else
979 lane = cpu;
980
981 return lane;
982}
983EXPORT_SYMBOL(nd_region_acquire_lane);
984
985void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
986{
987 if (nd_region->num_lanes < nr_cpu_ids) {
988 unsigned int cpu = get_cpu();
989 struct nd_percpu_lane *ndl_lock, *ndl_count;
990
991 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
992 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
993 if (--ndl_count->count == 0)
994 spin_unlock(&ndl_lock->lock);
995 put_cpu();
996 }
997 put_cpu();
998}
999EXPORT_SYMBOL(nd_region_release_lane);
1000
1001
1002
1003
1004
1005#define MEMREMAP_COMPAT_ALIGN_MAX SZ_16M
1006
1007static unsigned long default_align(struct nd_region *nd_region)
1008{
1009 unsigned long align;
1010 int i, mappings;
1011 u32 remainder;
1012
1013 if (is_nd_blk(&nd_region->dev))
1014 align = PAGE_SIZE;
1015 else
1016 align = MEMREMAP_COMPAT_ALIGN_MAX;
1017
1018 for (i = 0; i < nd_region->ndr_mappings; i++) {
1019 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
1020 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1021
1022 if (test_bit(NDD_ALIASING, &nvdimm->flags)) {
1023 align = MEMREMAP_COMPAT_ALIGN_MAX;
1024 break;
1025 }
1026 }
1027
1028 mappings = max_t(u16, 1, nd_region->ndr_mappings);
1029 div_u64_rem(align, mappings, &remainder);
1030 if (remainder)
1031 align *= mappings;
1032
1033 return align;
1034}
1035
1036static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
1037 struct nd_region_desc *ndr_desc,
1038 const struct device_type *dev_type, const char *caller)
1039{
1040 struct nd_region *nd_region;
1041 struct device *dev;
1042 void *region_buf;
1043 unsigned int i;
1044 int ro = 0;
1045
1046 for (i = 0; i < ndr_desc->num_mappings; i++) {
1047 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
1048 struct nvdimm *nvdimm = mapping->nvdimm;
1049
1050 if ((mapping->start | mapping->size) % PAGE_SIZE) {
1051 dev_err(&nvdimm_bus->dev,
1052 "%s: %s mapping%d is not %ld aligned\n",
1053 caller, dev_name(&nvdimm->dev), i, PAGE_SIZE);
1054 return NULL;
1055 }
1056
1057 if (test_bit(NDD_UNARMED, &nvdimm->flags))
1058 ro = 1;
1059
1060 if (test_bit(NDD_NOBLK, &nvdimm->flags)
1061 && dev_type == &nd_blk_device_type) {
1062 dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not BLK capable\n",
1063 caller, dev_name(&nvdimm->dev), i);
1064 return NULL;
1065 }
1066 }
1067
1068 if (dev_type == &nd_blk_device_type) {
1069 struct nd_blk_region_desc *ndbr_desc;
1070 struct nd_blk_region *ndbr;
1071
1072 ndbr_desc = to_blk_region_desc(ndr_desc);
1073 ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
1074 * ndr_desc->num_mappings,
1075 GFP_KERNEL);
1076 if (ndbr) {
1077 nd_region = &ndbr->nd_region;
1078 ndbr->enable = ndbr_desc->enable;
1079 ndbr->do_io = ndbr_desc->do_io;
1080 }
1081 region_buf = ndbr;
1082 } else {
1083 nd_region = kzalloc(struct_size(nd_region, mapping,
1084 ndr_desc->num_mappings),
1085 GFP_KERNEL);
1086 region_buf = nd_region;
1087 }
1088
1089 if (!region_buf)
1090 return NULL;
1091 nd_region->id = memregion_alloc(GFP_KERNEL);
1092 if (nd_region->id < 0)
1093 goto err_id;
1094
1095 nd_region->lane = alloc_percpu(struct nd_percpu_lane);
1096 if (!nd_region->lane)
1097 goto err_percpu;
1098
1099 for (i = 0; i < nr_cpu_ids; i++) {
1100 struct nd_percpu_lane *ndl;
1101
1102 ndl = per_cpu_ptr(nd_region->lane, i);
1103 spin_lock_init(&ndl->lock);
1104 ndl->count = 0;
1105 }
1106
1107 for (i = 0; i < ndr_desc->num_mappings; i++) {
1108 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
1109 struct nvdimm *nvdimm = mapping->nvdimm;
1110
1111 nd_region->mapping[i].nvdimm = nvdimm;
1112 nd_region->mapping[i].start = mapping->start;
1113 nd_region->mapping[i].size = mapping->size;
1114 nd_region->mapping[i].position = mapping->position;
1115 INIT_LIST_HEAD(&nd_region->mapping[i].labels);
1116 mutex_init(&nd_region->mapping[i].lock);
1117
1118 get_device(&nvdimm->dev);
1119 }
1120 nd_region->ndr_mappings = ndr_desc->num_mappings;
1121 nd_region->provider_data = ndr_desc->provider_data;
1122 nd_region->nd_set = ndr_desc->nd_set;
1123 nd_region->num_lanes = ndr_desc->num_lanes;
1124 nd_region->flags = ndr_desc->flags;
1125 nd_region->ro = ro;
1126 nd_region->numa_node = ndr_desc->numa_node;
1127 nd_region->target_node = ndr_desc->target_node;
1128 ida_init(&nd_region->ns_ida);
1129 ida_init(&nd_region->btt_ida);
1130 ida_init(&nd_region->pfn_ida);
1131 ida_init(&nd_region->dax_ida);
1132 dev = &nd_region->dev;
1133 dev_set_name(dev, "region%d", nd_region->id);
1134 dev->parent = &nvdimm_bus->dev;
1135 dev->type = dev_type;
1136 dev->groups = ndr_desc->attr_groups;
1137 dev->of_node = ndr_desc->of_node;
1138 nd_region->ndr_size = resource_size(ndr_desc->res);
1139 nd_region->ndr_start = ndr_desc->res->start;
1140 nd_region->align = default_align(nd_region);
1141 if (ndr_desc->flush)
1142 nd_region->flush = ndr_desc->flush;
1143 else
1144 nd_region->flush = NULL;
1145
1146 nd_device_register(dev);
1147
1148 return nd_region;
1149
1150 err_percpu:
1151 memregion_free(nd_region->id);
1152 err_id:
1153 kfree(region_buf);
1154 return NULL;
1155}
1156
1157struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
1158 struct nd_region_desc *ndr_desc)
1159{
1160 ndr_desc->num_lanes = ND_MAX_LANES;
1161 return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
1162 __func__);
1163}
1164EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
1165
1166struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
1167 struct nd_region_desc *ndr_desc)
1168{
1169 if (ndr_desc->num_mappings > 1)
1170 return NULL;
1171 ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
1172 return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
1173 __func__);
1174}
1175EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
1176
1177struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
1178 struct nd_region_desc *ndr_desc)
1179{
1180 ndr_desc->num_lanes = ND_MAX_LANES;
1181 return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
1182 __func__);
1183}
1184EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
1185
1186int nvdimm_flush(struct nd_region *nd_region, struct bio *bio)
1187{
1188 int rc = 0;
1189
1190 if (!nd_region->flush)
1191 rc = generic_nvdimm_flush(nd_region);
1192 else {
1193 if (nd_region->flush(nd_region, bio))
1194 rc = -EIO;
1195 }
1196
1197 return rc;
1198}
1199
1200
1201
1202
1203int generic_nvdimm_flush(struct nd_region *nd_region)
1204{
1205 struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
1206 int i, idx;
1207
1208
1209
1210
1211
1212 idx = this_cpu_read(flush_idx);
1213 idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
1214
1215
1216
1217
1218
1219
1220
1221
1222 pmem_wmb();
1223 for (i = 0; i < nd_region->ndr_mappings; i++)
1224 if (ndrd_get_flush_wpq(ndrd, i, 0))
1225 writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
1226 wmb();
1227
1228 return 0;
1229}
1230EXPORT_SYMBOL_GPL(nvdimm_flush);
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240int nvdimm_has_flush(struct nd_region *nd_region)
1241{
1242 int i;
1243
1244
1245 if (nd_region->ndr_mappings == 0
1246 || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
1247 return -ENXIO;
1248
1249
1250 if (test_bit(ND_REGION_ASYNC, &nd_region->flags) && nd_region->flush)
1251 return 1;
1252
1253
1254 for (i = 0; i < nd_region->ndr_mappings; i++) {
1255 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
1256 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1257
1258
1259 if (nvdimm->num_flush)
1260 return 1;
1261 }
1262
1263
1264
1265
1266
1267 return 0;
1268}
1269EXPORT_SYMBOL_GPL(nvdimm_has_flush);
1270
1271int nvdimm_has_cache(struct nd_region *nd_region)
1272{
1273 return is_nd_pmem(&nd_region->dev) &&
1274 !test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags);
1275}
1276EXPORT_SYMBOL_GPL(nvdimm_has_cache);
1277
1278bool is_nvdimm_sync(struct nd_region *nd_region)
1279{
1280 if (is_nd_volatile(&nd_region->dev))
1281 return true;
1282
1283 return is_nd_pmem(&nd_region->dev) &&
1284 !test_bit(ND_REGION_ASYNC, &nd_region->flags);
1285}
1286EXPORT_SYMBOL_GPL(is_nvdimm_sync);
1287
1288struct conflict_context {
1289 struct nd_region *nd_region;
1290 resource_size_t start, size;
1291};
1292
1293static int region_conflict(struct device *dev, void *data)
1294{
1295 struct nd_region *nd_region;
1296 struct conflict_context *ctx = data;
1297 resource_size_t res_end, region_end, region_start;
1298
1299 if (!is_memory(dev))
1300 return 0;
1301
1302 nd_region = to_nd_region(dev);
1303 if (nd_region == ctx->nd_region)
1304 return 0;
1305
1306 res_end = ctx->start + ctx->size;
1307 region_start = nd_region->ndr_start;
1308 region_end = region_start + nd_region->ndr_size;
1309 if (ctx->start >= region_start && ctx->start < region_end)
1310 return -EBUSY;
1311 if (res_end > region_start && res_end <= region_end)
1312 return -EBUSY;
1313 return 0;
1314}
1315
1316int nd_region_conflict(struct nd_region *nd_region, resource_size_t start,
1317 resource_size_t size)
1318{
1319 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev);
1320 struct conflict_context ctx = {
1321 .nd_region = nd_region,
1322 .start = start,
1323 .size = size,
1324 };
1325
1326 return device_for_each_child(&nvdimm_bus->dev, &ctx, region_conflict);
1327}
1328