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13#ifndef __LINUX_ATA_H__
14#define __LINUX_ATA_H__
15
16#include <linux/bits.h>
17#include <linux/string.h>
18#include <linux/types.h>
19#include <asm/byteorder.h>
20
21
22#define ATA_DMA_BOUNDARY 0xffffUL
23#define ATA_DMA_MASK 0xffffffffULL
24
25enum {
26
27 ATA_MAX_DEVICES = 2,
28 ATA_MAX_PRD = 256,
29 ATA_SECT_SIZE = 512,
30 ATA_MAX_SECTORS_128 = 128,
31 ATA_MAX_SECTORS = 256,
32 ATA_MAX_SECTORS_1024 = 1024,
33 ATA_MAX_SECTORS_LBA48 = 65535,
34 ATA_MAX_SECTORS_TAPE = 65535,
35 ATA_MAX_TRIM_RNUM = 64,
36
37 ATA_ID_WORDS = 256,
38 ATA_ID_CONFIG = 0,
39 ATA_ID_CYLS = 1,
40 ATA_ID_HEADS = 3,
41 ATA_ID_SECTORS = 6,
42 ATA_ID_SERNO = 10,
43 ATA_ID_BUF_SIZE = 21,
44 ATA_ID_FW_REV = 23,
45 ATA_ID_PROD = 27,
46 ATA_ID_MAX_MULTSECT = 47,
47 ATA_ID_DWORD_IO = 48,
48 ATA_ID_TRUSTED = 48,
49 ATA_ID_CAPABILITY = 49,
50 ATA_ID_OLD_PIO_MODES = 51,
51 ATA_ID_OLD_DMA_MODES = 52,
52 ATA_ID_FIELD_VALID = 53,
53 ATA_ID_CUR_CYLS = 54,
54 ATA_ID_CUR_HEADS = 55,
55 ATA_ID_CUR_SECTORS = 56,
56 ATA_ID_MULTSECT = 59,
57 ATA_ID_LBA_CAPACITY = 60,
58 ATA_ID_SWDMA_MODES = 62,
59 ATA_ID_MWDMA_MODES = 63,
60 ATA_ID_PIO_MODES = 64,
61 ATA_ID_EIDE_DMA_MIN = 65,
62 ATA_ID_EIDE_DMA_TIME = 66,
63 ATA_ID_EIDE_PIO = 67,
64 ATA_ID_EIDE_PIO_IORDY = 68,
65 ATA_ID_ADDITIONAL_SUPP = 69,
66 ATA_ID_QUEUE_DEPTH = 75,
67 ATA_ID_SATA_CAPABILITY = 76,
68 ATA_ID_SATA_CAPABILITY_2 = 77,
69 ATA_ID_FEATURE_SUPP = 78,
70 ATA_ID_MAJOR_VER = 80,
71 ATA_ID_COMMAND_SET_1 = 82,
72 ATA_ID_COMMAND_SET_2 = 83,
73 ATA_ID_CFSSE = 84,
74 ATA_ID_CFS_ENABLE_1 = 85,
75 ATA_ID_CFS_ENABLE_2 = 86,
76 ATA_ID_CSF_DEFAULT = 87,
77 ATA_ID_UDMA_MODES = 88,
78 ATA_ID_HW_CONFIG = 93,
79 ATA_ID_SPG = 98,
80 ATA_ID_LBA_CAPACITY_2 = 100,
81 ATA_ID_SECTOR_SIZE = 106,
82 ATA_ID_WWN = 108,
83 ATA_ID_LOGICAL_SECTOR_SIZE = 117,
84 ATA_ID_COMMAND_SET_3 = 119,
85 ATA_ID_COMMAND_SET_4 = 120,
86 ATA_ID_LAST_LUN = 126,
87 ATA_ID_DLF = 128,
88 ATA_ID_CSFO = 129,
89 ATA_ID_CFA_POWER = 160,
90 ATA_ID_CFA_KEY_MGMT = 162,
91 ATA_ID_CFA_MODES = 163,
92 ATA_ID_DATA_SET_MGMT = 169,
93 ATA_ID_SCT_CMD_XPORT = 206,
94 ATA_ID_ROT_SPEED = 217,
95 ATA_ID_PIO4 = (1 << 1),
96
97 ATA_ID_SERNO_LEN = 20,
98 ATA_ID_FW_REV_LEN = 8,
99 ATA_ID_PROD_LEN = 40,
100 ATA_ID_WWN_LEN = 8,
101
102 ATA_PCI_CTL_OFS = 2,
103
104 ATA_PIO0 = (1 << 0),
105 ATA_PIO1 = ATA_PIO0 | (1 << 1),
106 ATA_PIO2 = ATA_PIO1 | (1 << 2),
107 ATA_PIO3 = ATA_PIO2 | (1 << 3),
108 ATA_PIO4 = ATA_PIO3 | (1 << 4),
109 ATA_PIO5 = ATA_PIO4 | (1 << 5),
110 ATA_PIO6 = ATA_PIO5 | (1 << 6),
111
112 ATA_PIO4_ONLY = (1 << 4),
113
114 ATA_SWDMA0 = (1 << 0),
115 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
116 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
117
118 ATA_SWDMA2_ONLY = (1 << 2),
119
120 ATA_MWDMA0 = (1 << 0),
121 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
122 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
123 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
124 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
125
126 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
127 ATA_MWDMA2_ONLY = (1 << 2),
128
129 ATA_UDMA0 = (1 << 0),
130 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
131 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
132 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
133 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
134 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
135 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
136 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
137
138
139 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
140
141 ATA_UDMA_MASK_40C = ATA_UDMA2,
142
143
144 ATA_PRD_SZ = 8,
145 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
146 ATA_PRD_EOT = (1 << 31),
147
148 ATA_DMA_TABLE_OFS = 4,
149 ATA_DMA_STATUS = 2,
150 ATA_DMA_CMD = 0,
151 ATA_DMA_WR = (1 << 3),
152 ATA_DMA_START = (1 << 0),
153 ATA_DMA_INTR = (1 << 2),
154 ATA_DMA_ERR = (1 << 1),
155 ATA_DMA_ACTIVE = (1 << 0),
156
157
158 ATA_HOB = (1 << 7),
159 ATA_NIEN = (1 << 1),
160 ATA_LBA = (1 << 6),
161 ATA_DEV1 = (1 << 4),
162 ATA_DEVICE_OBS = (1 << 7) | (1 << 5),
163 ATA_DEVCTL_OBS = (1 << 3),
164 ATA_BUSY = (1 << 7),
165 ATA_DRDY = (1 << 6),
166 ATA_DF = (1 << 5),
167 ATA_DSC = (1 << 4),
168 ATA_DRQ = (1 << 3),
169 ATA_CORR = (1 << 2),
170 ATA_SENSE = (1 << 1),
171 ATA_ERR = (1 << 0),
172 ATA_SRST = (1 << 2),
173 ATA_ICRC = (1 << 7),
174 ATA_BBK = ATA_ICRC,
175 ATA_UNC = (1 << 6),
176 ATA_MC = (1 << 5),
177 ATA_IDNF = (1 << 4),
178 ATA_MCR = (1 << 3),
179 ATA_ABORTED = (1 << 2),
180 ATA_TRK0NF = (1 << 1),
181 ATA_AMNF = (1 << 0),
182 ATAPI_LFS = 0xF0,
183 ATAPI_EOM = ATA_TRK0NF,
184 ATAPI_ILI = ATA_AMNF,
185 ATAPI_IO = (1 << 1),
186 ATAPI_COD = (1 << 0),
187
188
189 ATA_REG_DATA = 0x00,
190 ATA_REG_ERR = 0x01,
191 ATA_REG_NSECT = 0x02,
192 ATA_REG_LBAL = 0x03,
193 ATA_REG_LBAM = 0x04,
194 ATA_REG_LBAH = 0x05,
195 ATA_REG_DEVICE = 0x06,
196 ATA_REG_STATUS = 0x07,
197
198 ATA_REG_FEATURE = ATA_REG_ERR,
199 ATA_REG_CMD = ATA_REG_STATUS,
200 ATA_REG_BYTEL = ATA_REG_LBAM,
201 ATA_REG_BYTEH = ATA_REG_LBAH,
202 ATA_REG_DEVSEL = ATA_REG_DEVICE,
203 ATA_REG_IRQ = ATA_REG_NSECT,
204
205
206 ATA_CMD_DEV_RESET = 0x08,
207 ATA_CMD_CHK_POWER = 0xE5,
208 ATA_CMD_STANDBY = 0xE2,
209 ATA_CMD_IDLE = 0xE3,
210 ATA_CMD_EDD = 0x90,
211 ATA_CMD_DOWNLOAD_MICRO = 0x92,
212 ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
213 ATA_CMD_NOP = 0x00,
214 ATA_CMD_FLUSH = 0xE7,
215 ATA_CMD_FLUSH_EXT = 0xEA,
216 ATA_CMD_ID_ATA = 0xEC,
217 ATA_CMD_ID_ATAPI = 0xA1,
218 ATA_CMD_SERVICE = 0xA2,
219 ATA_CMD_READ = 0xC8,
220 ATA_CMD_READ_EXT = 0x25,
221 ATA_CMD_READ_QUEUED = 0x26,
222 ATA_CMD_READ_STREAM_EXT = 0x2B,
223 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
224 ATA_CMD_WRITE = 0xCA,
225 ATA_CMD_WRITE_EXT = 0x35,
226 ATA_CMD_WRITE_QUEUED = 0x36,
227 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
228 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
229 ATA_CMD_WRITE_FUA_EXT = 0x3D,
230 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
231 ATA_CMD_FPDMA_READ = 0x60,
232 ATA_CMD_FPDMA_WRITE = 0x61,
233 ATA_CMD_NCQ_NON_DATA = 0x63,
234 ATA_CMD_FPDMA_SEND = 0x64,
235 ATA_CMD_FPDMA_RECV = 0x65,
236 ATA_CMD_PIO_READ = 0x20,
237 ATA_CMD_PIO_READ_EXT = 0x24,
238 ATA_CMD_PIO_WRITE = 0x30,
239 ATA_CMD_PIO_WRITE_EXT = 0x34,
240 ATA_CMD_READ_MULTI = 0xC4,
241 ATA_CMD_READ_MULTI_EXT = 0x29,
242 ATA_CMD_WRITE_MULTI = 0xC5,
243 ATA_CMD_WRITE_MULTI_EXT = 0x39,
244 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
245 ATA_CMD_SET_FEATURES = 0xEF,
246 ATA_CMD_SET_MULTI = 0xC6,
247 ATA_CMD_PACKET = 0xA0,
248 ATA_CMD_VERIFY = 0x40,
249 ATA_CMD_VERIFY_EXT = 0x42,
250 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
251 ATA_CMD_STANDBYNOW1 = 0xE0,
252 ATA_CMD_IDLEIMMEDIATE = 0xE1,
253 ATA_CMD_SLEEP = 0xE6,
254 ATA_CMD_INIT_DEV_PARAMS = 0x91,
255 ATA_CMD_READ_NATIVE_MAX = 0xF8,
256 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
257 ATA_CMD_SET_MAX = 0xF9,
258 ATA_CMD_SET_MAX_EXT = 0x37,
259 ATA_CMD_READ_LOG_EXT = 0x2F,
260 ATA_CMD_WRITE_LOG_EXT = 0x3F,
261 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
262 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
263 ATA_CMD_TRUSTED_NONDATA = 0x5B,
264 ATA_CMD_TRUSTED_RCV = 0x5C,
265 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
266 ATA_CMD_TRUSTED_SND = 0x5E,
267 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
268 ATA_CMD_PMP_READ = 0xE4,
269 ATA_CMD_PMP_READ_DMA = 0xE9,
270 ATA_CMD_PMP_WRITE = 0xE8,
271 ATA_CMD_PMP_WRITE_DMA = 0xEB,
272 ATA_CMD_CONF_OVERLAY = 0xB1,
273 ATA_CMD_SEC_SET_PASS = 0xF1,
274 ATA_CMD_SEC_UNLOCK = 0xF2,
275 ATA_CMD_SEC_ERASE_PREP = 0xF3,
276 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
277 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
278 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
279 ATA_CMD_CONFIG_STREAM = 0x51,
280 ATA_CMD_SMART = 0xB0,
281 ATA_CMD_MEDIA_LOCK = 0xDE,
282 ATA_CMD_MEDIA_UNLOCK = 0xDF,
283 ATA_CMD_DSM = 0x06,
284 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
285 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
286 ATA_CMD_CFA_WRITE_NE = 0x38,
287 ATA_CMD_CFA_TRANS_SECT = 0x87,
288 ATA_CMD_CFA_ERASE = 0xC0,
289 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
290 ATA_CMD_REQ_SENSE_DATA = 0x0B,
291 ATA_CMD_SANITIZE_DEVICE = 0xB4,
292 ATA_CMD_ZAC_MGMT_IN = 0x4A,
293 ATA_CMD_ZAC_MGMT_OUT = 0x9F,
294
295
296 ATA_CMD_RESTORE = 0x10,
297
298
299 ATA_SUBCMD_FPDMA_RECV_RD_LOG_DMA_EXT = 0x01,
300 ATA_SUBCMD_FPDMA_RECV_ZAC_MGMT_IN = 0x02,
301
302
303 ATA_SUBCMD_FPDMA_SEND_DSM = 0x00,
304 ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02,
305
306
307 ATA_SUBCMD_NCQ_NON_DATA_ABORT_QUEUE = 0x00,
308 ATA_SUBCMD_NCQ_NON_DATA_SET_FEATURES = 0x05,
309 ATA_SUBCMD_NCQ_NON_DATA_ZERO_EXT = 0x06,
310 ATA_SUBCMD_NCQ_NON_DATA_ZAC_MGMT_OUT = 0x07,
311
312
313 ATA_SUBCMD_ZAC_MGMT_IN_REPORT_ZONES = 0x00,
314
315
316 ATA_SUBCMD_ZAC_MGMT_OUT_CLOSE_ZONE = 0x01,
317 ATA_SUBCMD_ZAC_MGMT_OUT_FINISH_ZONE = 0x02,
318 ATA_SUBCMD_ZAC_MGMT_OUT_OPEN_ZONE = 0x03,
319 ATA_SUBCMD_ZAC_MGMT_OUT_RESET_WRITE_POINTER = 0x04,
320
321
322 ATA_LOG_DIRECTORY = 0x0,
323 ATA_LOG_SATA_NCQ = 0x10,
324 ATA_LOG_NCQ_NON_DATA = 0x12,
325 ATA_LOG_NCQ_SEND_RECV = 0x13,
326 ATA_LOG_IDENTIFY_DEVICE = 0x30,
327
328
329 ATA_LOG_SECURITY = 0x06,
330 ATA_LOG_SATA_SETTINGS = 0x08,
331 ATA_LOG_ZONED_INFORMATION = 0x09,
332
333
334 ATA_LOG_DEVSLP_OFFSET = 0x30,
335 ATA_LOG_DEVSLP_SIZE = 0x08,
336 ATA_LOG_DEVSLP_MDAT = 0x00,
337 ATA_LOG_DEVSLP_MDAT_MASK = 0x1F,
338 ATA_LOG_DEVSLP_DETO = 0x01,
339 ATA_LOG_DEVSLP_VALID = 0x07,
340 ATA_LOG_DEVSLP_VALID_MASK = 0x80,
341 ATA_LOG_NCQ_PRIO_OFFSET = 0x09,
342
343
344 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET = 0x00,
345 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM = (1 << 0),
346 ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET = 0x04,
347 ATA_LOG_NCQ_SEND_RECV_DSM_TRIM = (1 << 0),
348 ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET = 0x08,
349 ATA_LOG_NCQ_SEND_RECV_RD_LOG_SUPPORTED = (1 << 0),
350 ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET = 0x0C,
351 ATA_LOG_NCQ_SEND_RECV_WR_LOG_SUPPORTED = (1 << 0),
352 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OFFSET = 0x10,
353 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OUT_SUPPORTED = (1 << 0),
354 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_IN_SUPPORTED = (1 << 1),
355 ATA_LOG_NCQ_SEND_RECV_SIZE = 0x14,
356
357
358 ATA_LOG_NCQ_NON_DATA_SUBCMDS_OFFSET = 0x00,
359 ATA_LOG_NCQ_NON_DATA_ABORT_OFFSET = 0x00,
360 ATA_LOG_NCQ_NON_DATA_ABORT_NCQ = (1 << 0),
361 ATA_LOG_NCQ_NON_DATA_ABORT_ALL = (1 << 1),
362 ATA_LOG_NCQ_NON_DATA_ABORT_STREAMING = (1 << 2),
363 ATA_LOG_NCQ_NON_DATA_ABORT_NON_STREAMING = (1 << 3),
364 ATA_LOG_NCQ_NON_DATA_ABORT_SELECTED = (1 << 4),
365 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OFFSET = 0x1C,
366 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OUT = (1 << 0),
367 ATA_LOG_NCQ_NON_DATA_SIZE = 0x40,
368
369
370 ATA_CMD_READ_LONG = 0x22,
371 ATA_CMD_READ_LONG_ONCE = 0x23,
372 ATA_CMD_WRITE_LONG = 0x32,
373 ATA_CMD_WRITE_LONG_ONCE = 0x33,
374
375
376 SETFEATURES_XFER = 0x03,
377 XFER_UDMA_7 = 0x47,
378 XFER_UDMA_6 = 0x46,
379 XFER_UDMA_5 = 0x45,
380 XFER_UDMA_4 = 0x44,
381 XFER_UDMA_3 = 0x43,
382 XFER_UDMA_2 = 0x42,
383 XFER_UDMA_1 = 0x41,
384 XFER_UDMA_0 = 0x40,
385 XFER_MW_DMA_4 = 0x24,
386 XFER_MW_DMA_3 = 0x23,
387 XFER_MW_DMA_2 = 0x22,
388 XFER_MW_DMA_1 = 0x21,
389 XFER_MW_DMA_0 = 0x20,
390 XFER_SW_DMA_2 = 0x12,
391 XFER_SW_DMA_1 = 0x11,
392 XFER_SW_DMA_0 = 0x10,
393 XFER_PIO_6 = 0x0E,
394 XFER_PIO_5 = 0x0D,
395 XFER_PIO_4 = 0x0C,
396 XFER_PIO_3 = 0x0B,
397 XFER_PIO_2 = 0x0A,
398 XFER_PIO_1 = 0x09,
399 XFER_PIO_0 = 0x08,
400 XFER_PIO_SLOW = 0x00,
401
402 SETFEATURES_WC_ON = 0x02,
403 SETFEATURES_WC_OFF = 0x82,
404
405 SETFEATURES_RA_ON = 0xaa,
406 SETFEATURES_RA_OFF = 0x55,
407
408
409 SETFEATURES_AAM_ON = 0x42,
410 SETFEATURES_AAM_OFF = 0xC2,
411
412 SETFEATURES_SPINUP = 0x07,
413 SETFEATURES_SPINUP_TIMEOUT = 30000,
414
415 SETFEATURES_SATA_ENABLE = 0x10,
416 SETFEATURES_SATA_DISABLE = 0x90,
417
418
419 SATA_FPDMA_OFFSET = 0x01,
420 SATA_FPDMA_AA = 0x02,
421 SATA_DIPM = 0x03,
422 SATA_FPDMA_IN_ORDER = 0x04,
423 SATA_AN = 0x05,
424 SATA_SSP = 0x06,
425 SATA_DEVSLP = 0x09,
426
427 SETFEATURE_SENSE_DATA = 0xC3,
428
429
430 ATA_SET_MAX_ADDR = 0x00,
431 ATA_SET_MAX_PASSWD = 0x01,
432 ATA_SET_MAX_LOCK = 0x02,
433 ATA_SET_MAX_UNLOCK = 0x03,
434 ATA_SET_MAX_FREEZE_LOCK = 0x04,
435 ATA_SET_MAX_PASSWD_DMA = 0x05,
436 ATA_SET_MAX_UNLOCK_DMA = 0x06,
437
438
439 ATA_DCO_RESTORE = 0xC0,
440 ATA_DCO_FREEZE_LOCK = 0xC1,
441 ATA_DCO_IDENTIFY = 0xC2,
442 ATA_DCO_SET = 0xC3,
443
444
445 ATA_SMART_ENABLE = 0xD8,
446 ATA_SMART_READ_VALUES = 0xD0,
447 ATA_SMART_READ_THRESHOLDS = 0xD1,
448
449
450 ATA_DSM_TRIM = 0x01,
451
452
453 ATA_SMART_LBAM_PASS = 0x4F,
454 ATA_SMART_LBAH_PASS = 0xC2,
455
456
457 ATAPI_PKT_DMA = (1 << 0),
458 ATAPI_DMADIR = (1 << 2),
459
460 ATAPI_CDB_LEN = 16,
461
462
463 SATA_PMP_MAX_PORTS = 15,
464 SATA_PMP_CTRL_PORT = 15,
465
466 SATA_PMP_GSCR_DWORDS = 128,
467 SATA_PMP_GSCR_PROD_ID = 0,
468 SATA_PMP_GSCR_REV = 1,
469 SATA_PMP_GSCR_PORT_INFO = 2,
470 SATA_PMP_GSCR_ERROR = 32,
471 SATA_PMP_GSCR_ERROR_EN = 33,
472 SATA_PMP_GSCR_FEAT = 64,
473 SATA_PMP_GSCR_FEAT_EN = 96,
474
475 SATA_PMP_PSCR_STATUS = 0,
476 SATA_PMP_PSCR_ERROR = 1,
477 SATA_PMP_PSCR_CONTROL = 2,
478
479 SATA_PMP_FEAT_BIST = (1 << 0),
480 SATA_PMP_FEAT_PMREQ = (1 << 1),
481 SATA_PMP_FEAT_DYNSSC = (1 << 2),
482 SATA_PMP_FEAT_NOTIFY = (1 << 3),
483
484
485 ATA_CBL_NONE = 0,
486 ATA_CBL_PATA40 = 1,
487 ATA_CBL_PATA80 = 2,
488 ATA_CBL_PATA40_SHORT = 3,
489 ATA_CBL_PATA_UNK = 4,
490 ATA_CBL_PATA_IGN = 5,
491 ATA_CBL_SATA = 6,
492
493
494 SCR_STATUS = 0,
495 SCR_ERROR = 1,
496 SCR_CONTROL = 2,
497 SCR_ACTIVE = 3,
498 SCR_NOTIFICATION = 4,
499
500
501 SERR_DATA_RECOVERED = (1 << 0),
502 SERR_COMM_RECOVERED = (1 << 1),
503 SERR_DATA = (1 << 8),
504 SERR_PERSISTENT = (1 << 9),
505 SERR_PROTOCOL = (1 << 10),
506 SERR_INTERNAL = (1 << 11),
507 SERR_PHYRDY_CHG = (1 << 16),
508 SERR_PHY_INT_ERR = (1 << 17),
509 SERR_COMM_WAKE = (1 << 18),
510 SERR_10B_8B_ERR = (1 << 19),
511 SERR_DISPARITY = (1 << 20),
512 SERR_CRC = (1 << 21),
513 SERR_HANDSHAKE = (1 << 22),
514 SERR_LINK_SEQ_ERR = (1 << 23),
515 SERR_TRANS_ST_ERROR = (1 << 24),
516 SERR_UNRECOG_FIS = (1 << 25),
517 SERR_DEV_XCHG = (1 << 26),
518};
519
520enum ata_prot_flags {
521
522 ATA_PROT_FLAG_PIO = (1 << 0),
523 ATA_PROT_FLAG_DMA = (1 << 1),
524 ATA_PROT_FLAG_NCQ = (1 << 2),
525 ATA_PROT_FLAG_ATAPI = (1 << 3),
526
527
528 ATA_PROT_UNKNOWN = (u8)-1,
529 ATA_PROT_NODATA = 0,
530 ATA_PROT_PIO = ATA_PROT_FLAG_PIO,
531 ATA_PROT_DMA = ATA_PROT_FLAG_DMA,
532 ATA_PROT_NCQ_NODATA = ATA_PROT_FLAG_NCQ,
533 ATA_PROT_NCQ = ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ,
534 ATAPI_PROT_NODATA = ATA_PROT_FLAG_ATAPI,
535 ATAPI_PROT_PIO = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO,
536 ATAPI_PROT_DMA = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA,
537};
538
539enum ata_ioctls {
540 ATA_IOC_GET_IO32 = 0x309,
541 ATA_IOC_SET_IO32 = 0x324,
542};
543
544
545
546struct ata_bmdma_prd {
547 __le32 addr;
548 __le32 flags_len;
549};
550
551
552
553
554#define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
555#define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
556#define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
557#define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
558#define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
559#define ata_id_removable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
560#define ata_id_has_atapi_AN(id) \
561 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
562 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
563 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
564#define ata_id_has_fpdma_aa(id) \
565 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
566 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
567 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
568#define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
569#define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
570#define ata_id_u32(id,n) \
571 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
572#define ata_id_u64(id,n) \
573 ( ((u64) (id)[(n) + 3] << 48) | \
574 ((u64) (id)[(n) + 2] << 32) | \
575 ((u64) (id)[(n) + 1] << 16) | \
576 ((u64) (id)[(n) + 0]) )
577
578#define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
579#define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
580#define ata_id_has_devslp(id) ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
581#define ata_id_has_ncq_autosense(id) \
582 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7))
583
584static inline bool ata_id_has_hipm(const u16 *id)
585{
586 u16 val = id[ATA_ID_SATA_CAPABILITY];
587
588 if (val == 0 || val == 0xffff)
589 return false;
590
591 return val & (1 << 9);
592}
593
594static inline bool ata_id_has_dipm(const u16 *id)
595{
596 u16 val = id[ATA_ID_FEATURE_SUPP];
597
598 if (val == 0 || val == 0xffff)
599 return false;
600
601 return val & (1 << 3);
602}
603
604
605static inline bool ata_id_has_fua(const u16 *id)
606{
607 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
608 return false;
609 return id[ATA_ID_CFSSE] & (1 << 6);
610}
611
612static inline bool ata_id_has_flush(const u16 *id)
613{
614 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
615 return false;
616 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
617}
618
619static inline bool ata_id_flush_enabled(const u16 *id)
620{
621 if (ata_id_has_flush(id) == 0)
622 return false;
623 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
624 return false;
625 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
626}
627
628static inline bool ata_id_has_flush_ext(const u16 *id)
629{
630 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
631 return false;
632 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
633}
634
635static inline bool ata_id_flush_ext_enabled(const u16 *id)
636{
637 if (ata_id_has_flush_ext(id) == 0)
638 return false;
639 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
640 return false;
641
642
643
644
645 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
646}
647
648static inline u32 ata_id_logical_sector_size(const u16 *id)
649{
650
651
652
653
654 if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
655 return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
656 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
657 return ATA_SECT_SIZE;
658}
659
660static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
661{
662
663
664
665
666 if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
667 return (id[ATA_ID_SECTOR_SIZE] & 0xf);
668 return 0;
669}
670
671
672
673
674
675
676
677
678
679
680static inline u16 ata_id_logical_sector_offset(const u16 *id,
681 u8 log2_per_phys)
682{
683 u16 word_209 = id[209];
684
685 if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
686 u16 first = word_209 & 0x3fff;
687 if (first > 0)
688 return (1 << log2_per_phys) - first;
689 }
690 return 0;
691}
692
693static inline bool ata_id_has_lba48(const u16 *id)
694{
695 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
696 return false;
697 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
698 return false;
699 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
700}
701
702static inline bool ata_id_lba48_enabled(const u16 *id)
703{
704 if (ata_id_has_lba48(id) == 0)
705 return false;
706 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
707 return false;
708 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
709}
710
711static inline bool ata_id_hpa_enabled(const u16 *id)
712{
713
714 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
715 return false;
716
717 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
718 return false;
719
720 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
721 return false;
722 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
723}
724
725static inline bool ata_id_has_wcache(const u16 *id)
726{
727
728 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
729 return false;
730 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
731}
732
733static inline bool ata_id_has_pm(const u16 *id)
734{
735 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
736 return false;
737 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
738}
739
740static inline bool ata_id_rahead_enabled(const u16 *id)
741{
742 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
743 return false;
744 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
745}
746
747static inline bool ata_id_wcache_enabled(const u16 *id)
748{
749 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
750 return false;
751 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
752}
753
754static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
755{
756
757 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
758 return false;
759
760
761
762
763
764 if ((id[ATA_ID_COMMAND_SET_3] & 0xC008) == 0x4008 ||
765 (id[ATA_ID_COMMAND_SET_4] & 0xC008) == 0x4008)
766 return true;
767
768 return false;
769}
770
771static inline bool ata_id_has_sense_reporting(const u16 *id)
772{
773 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
774 return false;
775 return id[ATA_ID_COMMAND_SET_3] & (1 << 6);
776}
777
778static inline bool ata_id_sense_reporting_enabled(const u16 *id)
779{
780 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
781 return false;
782 return id[ATA_ID_COMMAND_SET_4] & (1 << 6);
783}
784
785
786
787
788
789
790
791
792
793
794
795
796
797static inline bool ata_id_sct_data_tables(const u16 *id)
798{
799 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 5) ? true : false;
800}
801
802static inline bool ata_id_sct_features_ctrl(const u16 *id)
803{
804 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 4) ? true : false;
805}
806
807static inline bool ata_id_sct_error_recovery_ctrl(const u16 *id)
808{
809 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 3) ? true : false;
810}
811
812static inline bool ata_id_sct_long_sector_access(const u16 *id)
813{
814 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 1) ? true : false;
815}
816
817static inline bool ata_id_sct_supported(const u16 *id)
818{
819 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 0) ? true : false;
820}
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835static inline unsigned int ata_id_major_version(const u16 *id)
836{
837 unsigned int mver;
838
839 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
840 return 0;
841
842 for (mver = 14; mver >= 1; mver--)
843 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
844 break;
845 return mver;
846}
847
848static inline bool ata_id_is_sata(const u16 *id)
849{
850
851
852
853
854
855
856 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
857 return true;
858 return false;
859}
860
861static inline bool ata_id_has_tpm(const u16 *id)
862{
863
864 if (ata_id_major_version(id) < 8)
865 return false;
866 if ((id[48] & 0xC000) != 0x4000)
867 return false;
868 return id[48] & (1 << 0);
869}
870
871static inline bool ata_id_has_dword_io(const u16 *id)
872{
873
874 if (ata_id_major_version(id) > 7)
875 return false;
876 return id[ATA_ID_DWORD_IO] & (1 << 0);
877}
878
879static inline bool ata_id_has_trusted(const u16 *id)
880{
881 if (ata_id_major_version(id) <= 7)
882 return false;
883 return id[ATA_ID_TRUSTED] & (1 << 0);
884}
885
886static inline bool ata_id_has_unload(const u16 *id)
887{
888 if (ata_id_major_version(id) >= 7 &&
889 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
890 id[ATA_ID_CFSSE] & (1 << 13))
891 return true;
892 return false;
893}
894
895static inline bool ata_id_has_wwn(const u16 *id)
896{
897 return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
898}
899
900static inline int ata_id_form_factor(const u16 *id)
901{
902 u16 val = id[168];
903
904 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
905 return 0;
906
907 val &= 0xf;
908
909 if (val > 5)
910 return 0;
911
912 return val;
913}
914
915static inline int ata_id_rotation_rate(const u16 *id)
916{
917 u16 val = id[217];
918
919 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
920 return 0;
921
922 if (val > 1 && val < 0x401)
923 return 0;
924
925 return val;
926}
927
928static inline bool ata_id_has_ncq_send_and_recv(const u16 *id)
929{
930 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6);
931}
932
933static inline bool ata_id_has_ncq_non_data(const u16 *id)
934{
935 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(5);
936}
937
938static inline bool ata_id_has_ncq_prio(const u16 *id)
939{
940 return id[ATA_ID_SATA_CAPABILITY] & BIT(12);
941}
942
943static inline bool ata_id_has_trim(const u16 *id)
944{
945 if (ata_id_major_version(id) >= 7 &&
946 (id[ATA_ID_DATA_SET_MGMT] & 1))
947 return true;
948 return false;
949}
950
951static inline bool ata_id_has_zero_after_trim(const u16 *id)
952{
953
954 if (ata_id_has_trim(id) &&
955 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
956 return true;
957
958 return false;
959}
960
961static inline bool ata_id_current_chs_valid(const u16 *id)
962{
963
964
965
966 return (id[ATA_ID_FIELD_VALID] & 1) &&
967 id[ATA_ID_CUR_CYLS] &&
968 id[ATA_ID_CUR_HEADS] &&
969 id[ATA_ID_CUR_HEADS] <= 16 &&
970 id[ATA_ID_CUR_SECTORS];
971}
972
973static inline bool ata_id_is_cfa(const u16 *id)
974{
975 if ((id[ATA_ID_CONFIG] == 0x848A) ||
976 (id[ATA_ID_CONFIG] == 0x844A))
977 return true;
978
979
980
981
982
983
984
985
986 return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
987}
988
989static inline bool ata_id_is_ssd(const u16 *id)
990{
991 return id[ATA_ID_ROT_SPEED] == 0x01;
992}
993
994static inline u8 ata_id_zoned_cap(const u16 *id)
995{
996 return (id[ATA_ID_ADDITIONAL_SUPP] & 0x3);
997}
998
999static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
1000{
1001
1002 if (pio > 4 && ata_id_is_cfa(id))
1003 return false;
1004
1005 if (pio > 2)
1006 return true;
1007
1008 return ata_id_has_iordy(id);
1009}
1010
1011static inline bool ata_drive_40wire(const u16 *dev_id)
1012{
1013 if (ata_id_is_sata(dev_id))
1014 return false;
1015 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
1016 return false;
1017 return true;
1018}
1019
1020static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
1021{
1022 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
1023 return false;
1024 return true;
1025}
1026
1027static inline int atapi_cdb_len(const u16 *dev_id)
1028{
1029 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
1030 switch (tmp) {
1031 case 0: return 12;
1032 case 1: return 16;
1033 default: return -1;
1034 }
1035}
1036
1037static inline int atapi_command_packet_set(const u16 *dev_id)
1038{
1039 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
1040}
1041
1042static inline bool atapi_id_dmadir(const u16 *dev_id)
1043{
1044 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
1045}
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055static inline bool ata_id_is_lba_capacity_ok(u16 *id)
1056{
1057 unsigned long lba_sects, chs_sects, head, tail;
1058
1059
1060 if (id[ATA_ID_CYLS] == 0)
1061 return true;
1062
1063 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1064
1065
1066
1067
1068
1069
1070
1071 if ((id[ATA_ID_CYLS] == 16383 ||
1072 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
1073 id[ATA_ID_SECTORS] == 63 &&
1074 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
1075 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
1076 return true;
1077
1078 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
1079
1080
1081 if (lba_sects - chs_sects < chs_sects/10)
1082 return true;
1083
1084
1085 head = (lba_sects >> 16) & 0xffff;
1086 tail = lba_sects & 0xffff;
1087 lba_sects = head | (tail << 16);
1088
1089 if (lba_sects - chs_sects < chs_sects/10) {
1090 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
1091 return true;
1092 }
1093
1094 return false;
1095}
1096
1097static inline void ata_id_to_hd_driveid(u16 *id)
1098{
1099#ifdef __BIG_ENDIAN
1100
1101 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
1102 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
1103 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
1104 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
1105 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
1106
1107
1108 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1109 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
1110
1111
1112 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
1113 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
1114#endif
1115}
1116
1117static inline bool ata_ok(u8 status)
1118{
1119 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1120 == ATA_DRDY);
1121}
1122
1123static inline bool lba_28_ok(u64 block, u32 n_block)
1124{
1125
1126 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= ATA_MAX_SECTORS);
1127}
1128
1129static inline bool lba_48_ok(u64 block, u32 n_block)
1130{
1131
1132 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= ATA_MAX_SECTORS_LBA48);
1133}
1134
1135#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1136#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1137#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1138#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1139
1140#endif
1141