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9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/clk.h>
12#include <linux/delay.h>
13#include <linux/slab.h>
14#include <sound/core.h>
15#include <sound/pcm.h>
16#include <sound/pcm_params.h>
17#include <sound/soc.h>
18#include <sound/tlv.h>
19#include <linux/gcd.h>
20#include <linux/i2c.h>
21#include <linux/spi/spi.h>
22#include <linux/regmap.h>
23#include <asm/unaligned.h>
24
25#include "sigmadsp.h"
26#include "adau17x1.h"
27#include "adau-utils.h"
28
29#define ADAU17X1_SAFELOAD_TARGET_ADDRESS 0x0006
30#define ADAU17X1_SAFELOAD_TRIGGER 0x0007
31#define ADAU17X1_SAFELOAD_DATA 0x0001
32#define ADAU17X1_SAFELOAD_DATA_SIZE 20
33#define ADAU17X1_WORD_SIZE 4
34
35static const char * const adau17x1_capture_mixer_boost_text[] = {
36 "Normal operation", "Boost Level 1", "Boost Level 2", "Boost Level 3",
37};
38
39static SOC_ENUM_SINGLE_DECL(adau17x1_capture_boost_enum,
40 ADAU17X1_REC_POWER_MGMT, 5, adau17x1_capture_mixer_boost_text);
41
42static const char * const adau17x1_mic_bias_mode_text[] = {
43 "Normal operation", "High performance",
44};
45
46static SOC_ENUM_SINGLE_DECL(adau17x1_mic_bias_mode_enum,
47 ADAU17X1_MICBIAS, 3, adau17x1_mic_bias_mode_text);
48
49static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0);
50
51static const struct snd_kcontrol_new adau17x1_controls[] = {
52 SOC_DOUBLE_R_TLV("Digital Capture Volume",
53 ADAU17X1_LEFT_INPUT_DIGITAL_VOL,
54 ADAU17X1_RIGHT_INPUT_DIGITAL_VOL,
55 0, 0xff, 1, adau17x1_digital_tlv),
56 SOC_DOUBLE_R_TLV("Digital Playback Volume", ADAU17X1_DAC_CONTROL1,
57 ADAU17X1_DAC_CONTROL2, 0, 0xff, 1, adau17x1_digital_tlv),
58
59 SOC_SINGLE("ADC High Pass Filter Switch", ADAU17X1_ADC_CONTROL,
60 5, 1, 0),
61 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0,
62 2, 1, 0),
63
64 SOC_ENUM("Capture Boost", adau17x1_capture_boost_enum),
65
66 SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum),
67};
68
69static int adau17x1_setup_firmware(struct snd_soc_component *component,
70 unsigned int rate);
71
72static int adau17x1_pll_event(struct snd_soc_dapm_widget *w,
73 struct snd_kcontrol *kcontrol, int event)
74{
75 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
76 struct adau *adau = snd_soc_component_get_drvdata(component);
77
78 if (SND_SOC_DAPM_EVENT_ON(event)) {
79 adau->pll_regs[5] = 1;
80 } else {
81 adau->pll_regs[5] = 0;
82
83
84 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
85 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 0);
86 }
87
88
89 regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
90 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
91
92 if (SND_SOC_DAPM_EVENT_ON(event)) {
93 mdelay(5);
94 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
95 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL,
96 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL);
97 }
98
99 return 0;
100}
101
102static int adau17x1_adc_fixup(struct snd_soc_dapm_widget *w,
103 struct snd_kcontrol *kcontrol, int event)
104{
105 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
106 struct adau *adau = snd_soc_component_get_drvdata(component);
107
108
109
110
111
112
113
114
115 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
116 ADAU17X1_CONVERTER0_ADOSR, ADAU17X1_CONVERTER0_ADOSR);
117 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
118 ADAU17X1_CONVERTER0_ADOSR, 0);
119
120 return 0;
121}
122
123static const char * const adau17x1_mono_stereo_text[] = {
124 "Stereo",
125 "Mono Left Channel (L+R)",
126 "Mono Right Channel (L+R)",
127 "Mono (L+R)",
128};
129
130static SOC_ENUM_SINGLE_DECL(adau17x1_dac_mode_enum,
131 ADAU17X1_DAC_CONTROL0, 6, adau17x1_mono_stereo_text);
132
133static const struct snd_kcontrol_new adau17x1_dac_mode_mux =
134 SOC_DAPM_ENUM("DAC Mono-Stereo-Mode", adau17x1_dac_mode_enum);
135
136static const struct snd_soc_dapm_widget adau17x1_dapm_widgets[] = {
137 SND_SOC_DAPM_SUPPLY_S("PLL", 3, SND_SOC_NOPM, 0, 0, adau17x1_pll_event,
138 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
139
140 SND_SOC_DAPM_SUPPLY("AIFCLK", SND_SOC_NOPM, 0, 0, NULL, 0),
141
142 SND_SOC_DAPM_SUPPLY("MICBIAS", ADAU17X1_MICBIAS, 0, 0, NULL, 0),
143
144 SND_SOC_DAPM_SUPPLY("Left Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
145 0, 0, NULL, 0),
146 SND_SOC_DAPM_SUPPLY("Right Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
147 1, 0, NULL, 0),
148
149 SND_SOC_DAPM_MUX("Left DAC Mode Mux", SND_SOC_NOPM, 0, 0,
150 &adau17x1_dac_mode_mux),
151 SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0,
152 &adau17x1_dac_mode_mux),
153
154 SND_SOC_DAPM_ADC_E("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0,
155 adau17x1_adc_fixup, SND_SOC_DAPM_POST_PMU),
156 SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0),
157 SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0),
158 SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0),
159};
160
161static const struct snd_soc_dapm_route adau17x1_dapm_routes[] = {
162 { "Left Decimator", NULL, "SYSCLK" },
163 { "Right Decimator", NULL, "SYSCLK" },
164 { "Left DAC", NULL, "SYSCLK" },
165 { "Right DAC", NULL, "SYSCLK" },
166 { "Capture", NULL, "SYSCLK" },
167 { "Playback", NULL, "SYSCLK" },
168
169 { "Left DAC", NULL, "Left DAC Mode Mux" },
170 { "Right DAC", NULL, "Right DAC Mode Mux" },
171
172 { "Capture", NULL, "AIFCLK" },
173 { "Playback", NULL, "AIFCLK" },
174};
175
176static const struct snd_soc_dapm_route adau17x1_dapm_pll_route = {
177 "SYSCLK", NULL, "PLL",
178};
179
180
181
182
183
184
185
186static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol *kcontrol,
187 struct snd_ctl_elem_value *ucontrol)
188{
189 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
190 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
191 struct adau *adau = snd_soc_component_get_drvdata(component);
192 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
193 struct snd_soc_dapm_update update = {};
194 unsigned int stream = e->shift_l;
195 unsigned int val, change;
196 int reg;
197
198 if (ucontrol->value.enumerated.item[0] >= e->items)
199 return -EINVAL;
200
201 switch (ucontrol->value.enumerated.item[0]) {
202 case 0:
203 val = 0;
204 adau->dsp_bypass[stream] = false;
205 break;
206 default:
207 val = (adau->tdm_slot[stream] * 2) + 1;
208 adau->dsp_bypass[stream] = true;
209 break;
210 }
211
212 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
213 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
214 else
215 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
216
217 change = snd_soc_component_test_bits(component, reg, 0xff, val);
218 if (change) {
219 update.kcontrol = kcontrol;
220 update.mask = 0xff;
221 update.reg = reg;
222 update.val = val;
223
224 snd_soc_dapm_mux_update_power(dapm, kcontrol,
225 ucontrol->value.enumerated.item[0], e, &update);
226 }
227
228 return change;
229}
230
231static int adau17x1_dsp_mux_enum_get(struct snd_kcontrol *kcontrol,
232 struct snd_ctl_elem_value *ucontrol)
233{
234 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
235 struct adau *adau = snd_soc_component_get_drvdata(component);
236 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
237 unsigned int stream = e->shift_l;
238 unsigned int reg, val;
239 int ret;
240
241 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
242 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
243 else
244 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
245
246 ret = regmap_read(adau->regmap, reg, &val);
247 if (ret)
248 return ret;
249
250 if (val != 0)
251 val = 1;
252 ucontrol->value.enumerated.item[0] = val;
253
254 return 0;
255}
256
257#define DECLARE_ADAU17X1_DSP_MUX_CTRL(_name, _label, _stream, _text) \
258 const struct snd_kcontrol_new _name = \
259 SOC_DAPM_ENUM_EXT(_label, (const struct soc_enum)\
260 SOC_ENUM_SINGLE(SND_SOC_NOPM, _stream, \
261 ARRAY_SIZE(_text), _text), \
262 adau17x1_dsp_mux_enum_get, adau17x1_dsp_mux_enum_put)
263
264static const char * const adau17x1_dac_mux_text[] = {
265 "DSP",
266 "AIFIN",
267};
268
269static const char * const adau17x1_capture_mux_text[] = {
270 "DSP",
271 "Decimator",
272};
273
274static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_dac_mux, "DAC Playback Mux",
275 SNDRV_PCM_STREAM_PLAYBACK, adau17x1_dac_mux_text);
276
277static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_capture_mux, "Capture Mux",
278 SNDRV_PCM_STREAM_CAPTURE, adau17x1_capture_mux_text);
279
280static const struct snd_soc_dapm_widget adau17x1_dsp_dapm_widgets[] = {
281 SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN, 0, 0, NULL, 0),
282 SND_SOC_DAPM_SIGGEN("DSP Siggen"),
283
284 SND_SOC_DAPM_MUX("DAC Playback Mux", SND_SOC_NOPM, 0, 0,
285 &adau17x1_dac_mux),
286 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
287 &adau17x1_capture_mux),
288};
289
290static const struct snd_soc_dapm_route adau17x1_dsp_dapm_routes[] = {
291 { "DAC Playback Mux", "DSP", "DSP" },
292 { "DAC Playback Mux", "AIFIN", "Playback" },
293
294 { "Left DAC Mode Mux", "Stereo", "DAC Playback Mux" },
295 { "Left DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
296 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "DAC Playback Mux" },
297 { "Right DAC Mode Mux", "Stereo", "DAC Playback Mux" },
298 { "Right DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
299 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "DAC Playback Mux" },
300
301 { "Capture Mux", "DSP", "DSP" },
302 { "Capture Mux", "Decimator", "Left Decimator" },
303 { "Capture Mux", "Decimator", "Right Decimator" },
304
305 { "Capture", NULL, "Capture Mux" },
306
307 { "DSP", NULL, "DSP Siggen" },
308
309 { "DSP", NULL, "Left Decimator" },
310 { "DSP", NULL, "Right Decimator" },
311 { "DSP", NULL, "Playback" },
312};
313
314static const struct snd_soc_dapm_route adau17x1_no_dsp_dapm_routes[] = {
315 { "Left DAC Mode Mux", "Stereo", "Playback" },
316 { "Left DAC Mode Mux", "Mono (L+R)", "Playback" },
317 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "Playback" },
318 { "Right DAC Mode Mux", "Stereo", "Playback" },
319 { "Right DAC Mode Mux", "Mono (L+R)", "Playback" },
320 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "Playback" },
321 { "Capture", NULL, "Left Decimator" },
322 { "Capture", NULL, "Right Decimator" },
323};
324
325static bool adau17x1_has_dsp(struct adau *adau)
326{
327 switch (adau->type) {
328 case ADAU1761:
329 case ADAU1381:
330 case ADAU1781:
331 return true;
332 default:
333 return false;
334 }
335}
336
337static bool adau17x1_has_safeload(struct adau *adau)
338{
339 switch (adau->type) {
340 case ADAU1761:
341 case ADAU1781:
342 return true;
343 default:
344 return false;
345 }
346}
347
348static int adau17x1_set_dai_pll(struct snd_soc_dai *dai, int pll_id,
349 int source, unsigned int freq_in, unsigned int freq_out)
350{
351 struct snd_soc_component *component = dai->component;
352 struct adau *adau = snd_soc_component_get_drvdata(component);
353 int ret;
354
355 if (freq_in < 8000000 || freq_in > 27000000)
356 return -EINVAL;
357
358 ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs);
359 if (ret < 0)
360 return ret;
361
362
363 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
364 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
365 if (ret)
366 return ret;
367
368 adau->pll_freq = freq_out;
369
370 return 0;
371}
372
373static int adau17x1_set_dai_sysclk(struct snd_soc_dai *dai,
374 int clk_id, unsigned int freq, int dir)
375{
376 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(dai->component);
377 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
378 bool is_pll;
379 bool was_pll;
380
381 switch (clk_id) {
382 case ADAU17X1_CLK_SRC_MCLK:
383 is_pll = false;
384 break;
385 case ADAU17X1_CLK_SRC_PLL_AUTO:
386 if (!adau->mclk)
387 return -EINVAL;
388 fallthrough;
389 case ADAU17X1_CLK_SRC_PLL:
390 is_pll = true;
391 break;
392 default:
393 return -EINVAL;
394 }
395
396 switch (adau->clk_src) {
397 case ADAU17X1_CLK_SRC_MCLK:
398 was_pll = false;
399 break;
400 case ADAU17X1_CLK_SRC_PLL:
401 case ADAU17X1_CLK_SRC_PLL_AUTO:
402 was_pll = true;
403 break;
404 default:
405 return -EINVAL;
406 }
407
408 adau->sysclk = freq;
409
410 if (is_pll != was_pll) {
411 if (is_pll) {
412 snd_soc_dapm_add_routes(dapm,
413 &adau17x1_dapm_pll_route, 1);
414 } else {
415 snd_soc_dapm_del_routes(dapm,
416 &adau17x1_dapm_pll_route, 1);
417 }
418 }
419
420 adau->clk_src = clk_id;
421
422 return 0;
423}
424
425static int adau17x1_auto_pll(struct snd_soc_dai *dai,
426 struct snd_pcm_hw_params *params)
427{
428 struct adau *adau = snd_soc_dai_get_drvdata(dai);
429 unsigned int pll_rate;
430
431 switch (params_rate(params)) {
432 case 48000:
433 case 8000:
434 case 12000:
435 case 16000:
436 case 24000:
437 case 32000:
438 case 96000:
439 pll_rate = 48000 * 1024;
440 break;
441 case 44100:
442 case 7350:
443 case 11025:
444 case 14700:
445 case 22050:
446 case 29400:
447 case 88200:
448 pll_rate = 44100 * 1024;
449 break;
450 default:
451 return -EINVAL;
452 }
453
454 return adau17x1_set_dai_pll(dai, ADAU17X1_PLL, ADAU17X1_PLL_SRC_MCLK,
455 clk_get_rate(adau->mclk), pll_rate);
456}
457
458static int adau17x1_hw_params(struct snd_pcm_substream *substream,
459 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
460{
461 struct snd_soc_component *component = dai->component;
462 struct adau *adau = snd_soc_component_get_drvdata(component);
463 unsigned int val, div, dsp_div;
464 unsigned int freq;
465 int ret;
466
467 switch (adau->clk_src) {
468 case ADAU17X1_CLK_SRC_PLL_AUTO:
469 ret = adau17x1_auto_pll(dai, params);
470 if (ret)
471 return ret;
472 fallthrough;
473 case ADAU17X1_CLK_SRC_PLL:
474 freq = adau->pll_freq;
475 break;
476 default:
477 freq = adau->sysclk;
478 break;
479 }
480
481 if (freq % params_rate(params) != 0)
482 return -EINVAL;
483
484 switch (freq / params_rate(params)) {
485 case 1024:
486 div = 0;
487 dsp_div = 1;
488 break;
489 case 6144:
490 div = 1;
491 dsp_div = 6;
492 break;
493 case 4096:
494 div = 2;
495 dsp_div = 5;
496 break;
497 case 3072:
498 div = 3;
499 dsp_div = 4;
500 break;
501 case 2048:
502 div = 4;
503 dsp_div = 3;
504 break;
505 case 1536:
506 div = 5;
507 dsp_div = 2;
508 break;
509 case 512:
510 div = 6;
511 dsp_div = 0;
512 break;
513 default:
514 return -EINVAL;
515 }
516
517 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
518 ADAU17X1_CONVERTER0_CONVSR_MASK, div);
519 if (adau17x1_has_dsp(adau)) {
520 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div);
521 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div);
522 }
523
524 if (adau->sigmadsp) {
525 ret = adau17x1_setup_firmware(component, params_rate(params));
526 if (ret < 0)
527 return ret;
528 }
529
530 if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
531 return 0;
532
533 switch (params_width(params)) {
534 case 16:
535 val = ADAU17X1_SERIAL_PORT1_DELAY16;
536 break;
537 case 24:
538 val = ADAU17X1_SERIAL_PORT1_DELAY8;
539 break;
540 case 32:
541 val = ADAU17X1_SERIAL_PORT1_DELAY0;
542 break;
543 default:
544 return -EINVAL;
545 }
546
547 return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
548 ADAU17X1_SERIAL_PORT1_DELAY_MASK, val);
549}
550
551static int adau17x1_set_dai_fmt(struct snd_soc_dai *dai,
552 unsigned int fmt)
553{
554 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
555 unsigned int ctrl0, ctrl1;
556 unsigned int ctrl0_mask;
557 int lrclk_pol;
558
559 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
560 case SND_SOC_DAIFMT_CBM_CFM:
561 ctrl0 = ADAU17X1_SERIAL_PORT0_MASTER;
562 adau->master = true;
563 break;
564 case SND_SOC_DAIFMT_CBS_CFS:
565 ctrl0 = 0;
566 adau->master = false;
567 break;
568 default:
569 return -EINVAL;
570 }
571
572 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
573 case SND_SOC_DAIFMT_I2S:
574 lrclk_pol = 0;
575 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
576 break;
577 case SND_SOC_DAIFMT_LEFT_J:
578 case SND_SOC_DAIFMT_RIGHT_J:
579 lrclk_pol = 1;
580 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
581 break;
582 case SND_SOC_DAIFMT_DSP_A:
583 lrclk_pol = 1;
584 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
585 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
586 break;
587 case SND_SOC_DAIFMT_DSP_B:
588 lrclk_pol = 1;
589 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
590 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
591 break;
592 default:
593 return -EINVAL;
594 }
595
596 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
597 case SND_SOC_DAIFMT_NB_NF:
598 break;
599 case SND_SOC_DAIFMT_IB_NF:
600 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
601 break;
602 case SND_SOC_DAIFMT_NB_IF:
603 lrclk_pol = !lrclk_pol;
604 break;
605 case SND_SOC_DAIFMT_IB_IF:
606 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
607 lrclk_pol = !lrclk_pol;
608 break;
609 default:
610 return -EINVAL;
611 }
612
613 if (lrclk_pol)
614 ctrl0 |= ADAU17X1_SERIAL_PORT0_LRCLK_POL;
615
616
617 ctrl0_mask = ADAU17X1_SERIAL_PORT0_MASTER |
618 ADAU17X1_SERIAL_PORT0_LRCLK_POL |
619 ADAU17X1_SERIAL_PORT0_BCLK_POL |
620 ADAU17X1_SERIAL_PORT0_PULSE_MODE;
621
622 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0_mask,
623 ctrl0);
624 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
625 ADAU17X1_SERIAL_PORT1_DELAY_MASK, ctrl1);
626
627 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
628
629 return 0;
630}
631
632static int adau17x1_set_dai_tdm_slot(struct snd_soc_dai *dai,
633 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
634{
635 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
636 unsigned int ser_ctrl0, ser_ctrl1;
637 unsigned int conv_ctrl0, conv_ctrl1;
638
639
640 if (slots == 0) {
641 slots = 2;
642 rx_mask = 3;
643 tx_mask = 3;
644 slot_width = 32;
645 }
646
647 switch (slots) {
648 case 2:
649 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_STEREO;
650 break;
651 case 4:
652 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM4;
653 break;
654 case 8:
655 if (adau->type == ADAU1361)
656 return -EINVAL;
657
658 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM8;
659 break;
660 default:
661 return -EINVAL;
662 }
663
664 switch (slot_width * slots) {
665 case 32:
666 if (adau->type == ADAU1761)
667 return -EINVAL;
668
669 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK32;
670 break;
671 case 64:
672 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK64;
673 break;
674 case 48:
675 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK48;
676 break;
677 case 128:
678 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK128;
679 break;
680 case 256:
681 if (adau->type == ADAU1361)
682 return -EINVAL;
683
684 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK256;
685 break;
686 default:
687 return -EINVAL;
688 }
689
690 switch (rx_mask) {
691 case 0x03:
692 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(1);
693 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0;
694 break;
695 case 0x0c:
696 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(2);
697 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1;
698 break;
699 case 0x30:
700 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(3);
701 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2;
702 break;
703 case 0xc0:
704 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(4);
705 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3;
706 break;
707 default:
708 return -EINVAL;
709 }
710
711 switch (tx_mask) {
712 case 0x03:
713 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(1);
714 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0;
715 break;
716 case 0x0c:
717 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(2);
718 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1;
719 break;
720 case 0x30:
721 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(3);
722 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2;
723 break;
724 case 0xc0:
725 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(4);
726 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3;
727 break;
728 default:
729 return -EINVAL;
730 }
731
732 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
733 ADAU17X1_CONVERTER0_DAC_PAIR_MASK, conv_ctrl0);
734 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1,
735 ADAU17X1_CONVERTER1_ADC_PAIR_MASK, conv_ctrl1);
736 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0,
737 ADAU17X1_SERIAL_PORT0_TDM_MASK, ser_ctrl0);
738 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
739 ADAU17X1_SERIAL_PORT1_BCLK_MASK, ser_ctrl1);
740
741 if (!adau17x1_has_dsp(adau))
742 return 0;
743
744 if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) {
745 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE,
746 (adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1);
747 }
748
749 if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) {
750 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE,
751 (adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1);
752 }
753
754 return 0;
755}
756
757static int adau17x1_startup(struct snd_pcm_substream *substream,
758 struct snd_soc_dai *dai)
759{
760 struct adau *adau = snd_soc_component_get_drvdata(dai->component);
761
762 if (adau->sigmadsp)
763 return sigmadsp_restrict_params(adau->sigmadsp, substream);
764
765 return 0;
766}
767
768const struct snd_soc_dai_ops adau17x1_dai_ops = {
769 .hw_params = adau17x1_hw_params,
770 .set_sysclk = adau17x1_set_dai_sysclk,
771 .set_fmt = adau17x1_set_dai_fmt,
772 .set_pll = adau17x1_set_dai_pll,
773 .set_tdm_slot = adau17x1_set_dai_tdm_slot,
774 .startup = adau17x1_startup,
775};
776EXPORT_SYMBOL_GPL(adau17x1_dai_ops);
777
778int adau17x1_set_micbias_voltage(struct snd_soc_component *component,
779 enum adau17x1_micbias_voltage micbias)
780{
781 struct adau *adau = snd_soc_component_get_drvdata(component);
782
783 switch (micbias) {
784 case ADAU17X1_MICBIAS_0_90_AVDD:
785 case ADAU17X1_MICBIAS_0_65_AVDD:
786 break;
787 default:
788 return -EINVAL;
789 }
790
791 return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2);
792}
793EXPORT_SYMBOL_GPL(adau17x1_set_micbias_voltage);
794
795bool adau17x1_precious_register(struct device *dev, unsigned int reg)
796{
797
798 if (reg < 0x400)
799 return true;
800
801 return false;
802}
803EXPORT_SYMBOL_GPL(adau17x1_precious_register);
804
805bool adau17x1_readable_register(struct device *dev, unsigned int reg)
806{
807
808 if (reg < 0x400)
809 return true;
810
811 switch (reg) {
812 case ADAU17X1_CLOCK_CONTROL:
813 case ADAU17X1_PLL_CONTROL:
814 case ADAU17X1_REC_POWER_MGMT:
815 case ADAU17X1_MICBIAS:
816 case ADAU17X1_SERIAL_PORT0:
817 case ADAU17X1_SERIAL_PORT1:
818 case ADAU17X1_CONVERTER0:
819 case ADAU17X1_CONVERTER1:
820 case ADAU17X1_LEFT_INPUT_DIGITAL_VOL:
821 case ADAU17X1_RIGHT_INPUT_DIGITAL_VOL:
822 case ADAU17X1_ADC_CONTROL:
823 case ADAU17X1_PLAY_POWER_MGMT:
824 case ADAU17X1_DAC_CONTROL0:
825 case ADAU17X1_DAC_CONTROL1:
826 case ADAU17X1_DAC_CONTROL2:
827 case ADAU17X1_SERIAL_PORT_PAD:
828 case ADAU17X1_CONTROL_PORT_PAD0:
829 case ADAU17X1_CONTROL_PORT_PAD1:
830 case ADAU17X1_DSP_SAMPLING_RATE:
831 case ADAU17X1_SERIAL_INPUT_ROUTE:
832 case ADAU17X1_SERIAL_OUTPUT_ROUTE:
833 case ADAU17X1_DSP_ENABLE:
834 case ADAU17X1_DSP_RUN:
835 case ADAU17X1_SERIAL_SAMPLING_RATE:
836 return true;
837 default:
838 break;
839 }
840 return false;
841}
842EXPORT_SYMBOL_GPL(adau17x1_readable_register);
843
844bool adau17x1_volatile_register(struct device *dev, unsigned int reg)
845{
846
847 if (reg < 0x4000)
848 return true;
849
850 switch (reg) {
851
852 case ADAU17X1_PLL_CONTROL:
853 case ADAU17X1_PLL_CONTROL + 1:
854 case ADAU17X1_PLL_CONTROL + 2:
855 case ADAU17X1_PLL_CONTROL + 3:
856 case ADAU17X1_PLL_CONTROL + 4:
857 case ADAU17X1_PLL_CONTROL + 5:
858 return true;
859 default:
860 break;
861 }
862
863 return false;
864}
865EXPORT_SYMBOL_GPL(adau17x1_volatile_register);
866
867static int adau17x1_setup_firmware(struct snd_soc_component *component,
868 unsigned int rate)
869{
870 int ret;
871 int dspsr, dsp_run;
872 struct adau *adau = snd_soc_component_get_drvdata(component);
873 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
874
875
876
877
878
879
880
881 if (adau->sigmadsp->current_samplerate == rate)
882 return 0;
883
884 snd_soc_dapm_mutex_lock(dapm);
885
886 ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr);
887 if (ret)
888 goto err;
889
890 ret = regmap_read(adau->regmap, ADAU17X1_DSP_RUN, &dsp_run);
891 if (ret)
892 goto err;
893
894 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1);
895 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf);
896 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, 0);
897
898 ret = sigmadsp_setup(adau->sigmadsp, rate);
899 if (ret) {
900 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0);
901 goto err;
902 }
903 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr);
904 regmap_write(adau->regmap, ADAU17X1_DSP_RUN, dsp_run);
905
906err:
907 snd_soc_dapm_mutex_unlock(dapm);
908
909 return ret;
910}
911
912int adau17x1_add_widgets(struct snd_soc_component *component)
913{
914 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
915 struct adau *adau = snd_soc_component_get_drvdata(component);
916 int ret;
917
918 ret = snd_soc_add_component_controls(component, adau17x1_controls,
919 ARRAY_SIZE(adau17x1_controls));
920 if (ret)
921 return ret;
922 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dapm_widgets,
923 ARRAY_SIZE(adau17x1_dapm_widgets));
924 if (ret)
925 return ret;
926
927 if (adau17x1_has_dsp(adau)) {
928 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dsp_dapm_widgets,
929 ARRAY_SIZE(adau17x1_dsp_dapm_widgets));
930 if (ret)
931 return ret;
932
933 if (!adau->sigmadsp)
934 return 0;
935
936 ret = sigmadsp_attach(adau->sigmadsp, component);
937 if (ret) {
938 dev_err(component->dev, "Failed to attach firmware: %d\n",
939 ret);
940 return ret;
941 }
942 }
943
944 return 0;
945}
946EXPORT_SYMBOL_GPL(adau17x1_add_widgets);
947
948int adau17x1_add_routes(struct snd_soc_component *component)
949{
950 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
951 struct adau *adau = snd_soc_component_get_drvdata(component);
952 int ret;
953
954 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dapm_routes,
955 ARRAY_SIZE(adau17x1_dapm_routes));
956 if (ret)
957 return ret;
958
959 if (adau17x1_has_dsp(adau)) {
960 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dsp_dapm_routes,
961 ARRAY_SIZE(adau17x1_dsp_dapm_routes));
962 } else {
963 ret = snd_soc_dapm_add_routes(dapm, adau17x1_no_dsp_dapm_routes,
964 ARRAY_SIZE(adau17x1_no_dsp_dapm_routes));
965 }
966
967 if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK)
968 snd_soc_dapm_add_routes(dapm, &adau17x1_dapm_pll_route, 1);
969
970 return ret;
971}
972EXPORT_SYMBOL_GPL(adau17x1_add_routes);
973
974int adau17x1_resume(struct snd_soc_component *component)
975{
976 struct adau *adau = snd_soc_component_get_drvdata(component);
977
978 if (adau->switch_mode)
979 adau->switch_mode(component->dev);
980
981 regcache_sync(adau->regmap);
982
983 return 0;
984}
985EXPORT_SYMBOL_GPL(adau17x1_resume);
986
987static int adau17x1_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
988 const uint8_t bytes[], size_t len)
989{
990 uint8_t buf[ADAU17X1_WORD_SIZE];
991 uint8_t data[ADAU17X1_SAFELOAD_DATA_SIZE];
992 unsigned int addr_offset;
993 unsigned int nbr_words;
994 int ret;
995
996
997
998
999 nbr_words = len / ADAU17X1_WORD_SIZE;
1000 if ((len - nbr_words * ADAU17X1_WORD_SIZE) == 0) {
1001 ret = regmap_raw_write(sigmadsp->control_data,
1002 ADAU17X1_SAFELOAD_DATA, bytes, len);
1003 } else {
1004 nbr_words++;
1005 memset(data, 0, ADAU17X1_SAFELOAD_DATA_SIZE);
1006 memcpy(data, bytes, len);
1007 ret = regmap_raw_write(sigmadsp->control_data,
1008 ADAU17X1_SAFELOAD_DATA, data,
1009 nbr_words * ADAU17X1_WORD_SIZE);
1010 }
1011
1012 if (ret < 0)
1013 return ret;
1014
1015
1016 addr_offset = addr - 1;
1017 put_unaligned_be32(addr_offset, buf);
1018 ret = regmap_raw_write(sigmadsp->control_data,
1019 ADAU17X1_SAFELOAD_TARGET_ADDRESS, buf, ADAU17X1_WORD_SIZE);
1020 if (ret < 0)
1021 return ret;
1022
1023
1024 put_unaligned_be32(nbr_words, buf);
1025 ret = regmap_raw_write(sigmadsp->control_data,
1026 ADAU17X1_SAFELOAD_TRIGGER, buf, ADAU17X1_WORD_SIZE);
1027 if (ret < 0)
1028 return ret;
1029
1030 return 0;
1031}
1032
1033static const struct sigmadsp_ops adau17x1_sigmadsp_ops = {
1034 .safeload = adau17x1_safeload,
1035};
1036
1037int adau17x1_probe(struct device *dev, struct regmap *regmap,
1038 enum adau17x1_type type, void (*switch_mode)(struct device *dev),
1039 const char *firmware_name)
1040{
1041 struct adau *adau;
1042 int ret;
1043
1044 if (IS_ERR(regmap))
1045 return PTR_ERR(regmap);
1046
1047 adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL);
1048 if (!adau)
1049 return -ENOMEM;
1050
1051 adau->mclk = devm_clk_get(dev, "mclk");
1052 if (IS_ERR(adau->mclk)) {
1053 if (PTR_ERR(adau->mclk) != -ENOENT)
1054 return PTR_ERR(adau->mclk);
1055
1056 adau->mclk = NULL;
1057 } else if (adau->mclk) {
1058 adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO;
1059
1060
1061
1062
1063
1064
1065 ret = adau_calc_pll_cfg(clk_get_rate(adau->mclk), 48000 * 1024,
1066 adau->pll_regs);
1067 if (ret < 0)
1068 return ret;
1069
1070 ret = clk_prepare_enable(adau->mclk);
1071 if (ret)
1072 return ret;
1073 }
1074
1075 adau->regmap = regmap;
1076 adau->switch_mode = switch_mode;
1077 adau->type = type;
1078
1079 dev_set_drvdata(dev, adau);
1080
1081 if (firmware_name) {
1082 if (adau17x1_has_safeload(adau)) {
1083 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1084 &adau17x1_sigmadsp_ops, firmware_name);
1085 } else {
1086 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap,
1087 NULL, firmware_name);
1088 }
1089 if (IS_ERR(adau->sigmadsp)) {
1090 dev_warn(dev, "Could not find firmware file: %ld\n",
1091 PTR_ERR(adau->sigmadsp));
1092 adau->sigmadsp = NULL;
1093 }
1094 }
1095
1096 if (switch_mode)
1097 switch_mode(dev);
1098
1099 return 0;
1100}
1101EXPORT_SYMBOL_GPL(adau17x1_probe);
1102
1103void adau17x1_remove(struct device *dev)
1104{
1105 struct adau *adau = dev_get_drvdata(dev);
1106
1107 clk_disable_unprepare(adau->mclk);
1108}
1109EXPORT_SYMBOL_GPL(adau17x1_remove);
1110
1111MODULE_DESCRIPTION("ASoC ADAU1X61/ADAU1X81 common code");
1112MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
1113MODULE_LICENSE("GPL");
1114
