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14#include <linux/module.h>
15#include <linux/gpio/driver.h>
16#include <linux/init.h>
17#include <linux/irq.h>
18#include <linux/kernel.h>
19#include <linux/delay.h>
20#include <linux/errno.h>
21#include <linux/ioport.h>
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/spinlock.h>
25#include <linux/dma-map-ops.h>
26#include <linux/clk.h>
27#include <linux/io.h>
28
29#include <mach/hardware.h>
30#include <asm/mach/irq.h>
31#include <asm/mach-types.h>
32#include <linux/sizes.h>
33
34#include <asm/hardware/sa1111.h>
35
36
37#define IRQ_GPAIN0 (0)
38#define IRQ_GPAIN1 (1)
39#define IRQ_GPAIN2 (2)
40#define IRQ_GPAIN3 (3)
41#define IRQ_GPBIN0 (4)
42#define IRQ_GPBIN1 (5)
43#define IRQ_GPBIN2 (6)
44#define IRQ_GPBIN3 (7)
45#define IRQ_GPBIN4 (8)
46#define IRQ_GPBIN5 (9)
47#define IRQ_GPCIN0 (10)
48#define IRQ_GPCIN1 (11)
49#define IRQ_GPCIN2 (12)
50#define IRQ_GPCIN3 (13)
51#define IRQ_GPCIN4 (14)
52#define IRQ_GPCIN5 (15)
53#define IRQ_GPCIN6 (16)
54#define IRQ_GPCIN7 (17)
55#define IRQ_MSTXINT (18)
56#define IRQ_MSRXINT (19)
57#define IRQ_MSSTOPERRINT (20)
58#define IRQ_TPTXINT (21)
59#define IRQ_TPRXINT (22)
60#define IRQ_TPSTOPERRINT (23)
61#define SSPXMTINT (24)
62#define SSPRCVINT (25)
63#define SSPROR (26)
64#define AUDXMTDMADONEA (32)
65#define AUDRCVDMADONEA (33)
66#define AUDXMTDMADONEB (34)
67#define AUDRCVDMADONEB (35)
68#define AUDTFSR (36)
69#define AUDRFSR (37)
70#define AUDTUR (38)
71#define AUDROR (39)
72#define AUDDTS (40)
73#define AUDRDD (41)
74#define AUDSTO (42)
75#define IRQ_USBPWR (43)
76#define IRQ_HCIM (44)
77#define IRQ_HCIBUFFACC (45)
78#define IRQ_HCIRMTWKP (46)
79#define IRQ_NHCIMFCIR (47)
80#define IRQ_USB_PORT_RESUME (48)
81#define IRQ_S0_READY_NINT (49)
82#define IRQ_S1_READY_NINT (50)
83#define IRQ_S0_CD_VALID (51)
84#define IRQ_S1_CD_VALID (52)
85#define IRQ_S0_BVD1_STSCHG (53)
86#define IRQ_S1_BVD1_STSCHG (54)
87#define SA1111_IRQ_NR (55)
88
89extern void sa1110_mb_enable(void);
90extern void sa1110_mb_disable(void);
91
92
93
94
95
96
97
98
99struct sa1111 {
100 struct device *dev;
101 struct clk *clk;
102 unsigned long phys;
103 int irq;
104 int irq_base;
105 spinlock_t lock;
106 void __iomem *base;
107 struct sa1111_platform_data *pdata;
108 struct irq_domain *irqdomain;
109 struct gpio_chip gc;
110#ifdef CONFIG_PM
111 void *saved_state;
112#endif
113};
114
115
116
117
118
119static struct sa1111 *g_sa1111;
120
121struct sa1111_dev_info {
122 unsigned long offset;
123 unsigned long skpcr_mask;
124 bool dma;
125 unsigned int devid;
126 unsigned int hwirq[6];
127};
128
129static struct sa1111_dev_info sa1111_devices[] = {
130 {
131 .offset = SA1111_USB,
132 .skpcr_mask = SKPCR_UCLKEN,
133 .dma = true,
134 .devid = SA1111_DEVID_USB,
135 .hwirq = {
136 IRQ_USBPWR,
137 IRQ_HCIM,
138 IRQ_HCIBUFFACC,
139 IRQ_HCIRMTWKP,
140 IRQ_NHCIMFCIR,
141 IRQ_USB_PORT_RESUME
142 },
143 },
144 {
145 .offset = 0x0600,
146 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
147 .dma = true,
148 .devid = SA1111_DEVID_SAC,
149 .hwirq = {
150 AUDXMTDMADONEA,
151 AUDXMTDMADONEB,
152 AUDRCVDMADONEA,
153 AUDRCVDMADONEB
154 },
155 },
156 {
157 .offset = 0x0800,
158 .skpcr_mask = SKPCR_SCLKEN,
159 .devid = SA1111_DEVID_SSP,
160 },
161 {
162 .offset = SA1111_KBD,
163 .skpcr_mask = SKPCR_PTCLKEN,
164 .devid = SA1111_DEVID_PS2_KBD,
165 .hwirq = {
166 IRQ_TPRXINT,
167 IRQ_TPTXINT
168 },
169 },
170 {
171 .offset = SA1111_MSE,
172 .skpcr_mask = SKPCR_PMCLKEN,
173 .devid = SA1111_DEVID_PS2_MSE,
174 .hwirq = {
175 IRQ_MSRXINT,
176 IRQ_MSTXINT
177 },
178 },
179 {
180 .offset = 0x1800,
181 .skpcr_mask = 0,
182 .devid = SA1111_DEVID_PCMCIA,
183 .hwirq = {
184 IRQ_S0_READY_NINT,
185 IRQ_S0_CD_VALID,
186 IRQ_S0_BVD1_STSCHG,
187 IRQ_S1_READY_NINT,
188 IRQ_S1_CD_VALID,
189 IRQ_S1_BVD1_STSCHG,
190 },
191 },
192};
193
194static int sa1111_map_irq(struct sa1111 *sachip, irq_hw_number_t hwirq)
195{
196 return irq_create_mapping(sachip->irqdomain, hwirq);
197}
198
199
200
201
202
203
204static void sa1111_irq_handler(struct irq_desc *desc)
205{
206 unsigned int stat0, stat1, i;
207 struct sa1111 *sachip = irq_desc_get_handler_data(desc);
208 struct irq_domain *irqdomain;
209 void __iomem *mapbase = sachip->base + SA1111_INTC;
210
211 stat0 = readl_relaxed(mapbase + SA1111_INTSTATCLR0);
212 stat1 = readl_relaxed(mapbase + SA1111_INTSTATCLR1);
213
214 writel_relaxed(stat0, mapbase + SA1111_INTSTATCLR0);
215
216 desc->irq_data.chip->irq_ack(&desc->irq_data);
217
218 writel_relaxed(stat1, mapbase + SA1111_INTSTATCLR1);
219
220 if (stat0 == 0 && stat1 == 0) {
221 do_bad_IRQ(desc);
222 return;
223 }
224
225 irqdomain = sachip->irqdomain;
226
227 for (i = 0; stat0; i++, stat0 >>= 1)
228 if (stat0 & 1)
229 generic_handle_domain_irq(irqdomain, i);
230
231 for (i = 32; stat1; i++, stat1 >>= 1)
232 if (stat1 & 1)
233 generic_handle_domain_irq(irqdomain, i);
234
235
236 desc->irq_data.chip->irq_unmask(&desc->irq_data);
237}
238
239static u32 sa1111_irqmask(struct irq_data *d)
240{
241 return BIT(irqd_to_hwirq(d) & 31);
242}
243
244static int sa1111_irqbank(struct irq_data *d)
245{
246 return (irqd_to_hwirq(d) / 32) * 4;
247}
248
249static void sa1111_ack_irq(struct irq_data *d)
250{
251}
252
253static void sa1111_mask_irq(struct irq_data *d)
254{
255 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
256 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
257 u32 ie;
258
259 ie = readl_relaxed(mapbase + SA1111_INTEN0);
260 ie &= ~sa1111_irqmask(d);
261 writel(ie, mapbase + SA1111_INTEN0);
262}
263
264static void sa1111_unmask_irq(struct irq_data *d)
265{
266 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
267 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
268 u32 ie;
269
270 ie = readl_relaxed(mapbase + SA1111_INTEN0);
271 ie |= sa1111_irqmask(d);
272 writel_relaxed(ie, mapbase + SA1111_INTEN0);
273}
274
275
276
277
278
279
280
281
282static int sa1111_retrigger_irq(struct irq_data *d)
283{
284 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
285 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
286 u32 ip, mask = sa1111_irqmask(d);
287 int i;
288
289 ip = readl_relaxed(mapbase + SA1111_INTPOL0);
290 for (i = 0; i < 8; i++) {
291 writel_relaxed(ip ^ mask, mapbase + SA1111_INTPOL0);
292 writel_relaxed(ip, mapbase + SA1111_INTPOL0);
293 if (readl_relaxed(mapbase + SA1111_INTSTATCLR0) & mask)
294 break;
295 }
296
297 if (i == 8) {
298 pr_err("Danger Will Robinson: failed to re-trigger IRQ%d\n",
299 d->irq);
300 return 0;
301 }
302
303 return 1;
304}
305
306static int sa1111_type_irq(struct irq_data *d, unsigned int flags)
307{
308 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
309 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
310 u32 ip, mask = sa1111_irqmask(d);
311
312 if (flags == IRQ_TYPE_PROBE)
313 return 0;
314
315 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
316 return -EINVAL;
317
318 ip = readl_relaxed(mapbase + SA1111_INTPOL0);
319 if (flags & IRQ_TYPE_EDGE_RISING)
320 ip &= ~mask;
321 else
322 ip |= mask;
323 writel_relaxed(ip, mapbase + SA1111_INTPOL0);
324 writel_relaxed(ip, mapbase + SA1111_WAKEPOL0);
325
326 return 0;
327}
328
329static int sa1111_wake_irq(struct irq_data *d, unsigned int on)
330{
331 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
332 void __iomem *mapbase = sachip->base + SA1111_INTC + sa1111_irqbank(d);
333 u32 we, mask = sa1111_irqmask(d);
334
335 we = readl_relaxed(mapbase + SA1111_WAKEEN0);
336 if (on)
337 we |= mask;
338 else
339 we &= ~mask;
340 writel_relaxed(we, mapbase + SA1111_WAKEEN0);
341
342 return 0;
343}
344
345static struct irq_chip sa1111_irq_chip = {
346 .name = "SA1111",
347 .irq_ack = sa1111_ack_irq,
348 .irq_mask = sa1111_mask_irq,
349 .irq_unmask = sa1111_unmask_irq,
350 .irq_retrigger = sa1111_retrigger_irq,
351 .irq_set_type = sa1111_type_irq,
352 .irq_set_wake = sa1111_wake_irq,
353};
354
355static int sa1111_irqdomain_map(struct irq_domain *d, unsigned int irq,
356 irq_hw_number_t hwirq)
357{
358 struct sa1111 *sachip = d->host_data;
359
360
361 if (hwirq > SSPROR && hwirq < AUDXMTDMADONEA)
362 return -EINVAL;
363
364 irq_set_chip_data(irq, sachip);
365 irq_set_chip_and_handler(irq, &sa1111_irq_chip, handle_edge_irq);
366 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
367
368 return 0;
369}
370
371static const struct irq_domain_ops sa1111_irqdomain_ops = {
372 .map = sa1111_irqdomain_map,
373 .xlate = irq_domain_xlate_twocell,
374};
375
376static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
377{
378 void __iomem *irqbase = sachip->base + SA1111_INTC;
379 int ret;
380
381
382
383
384 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
385
386 ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1);
387 if (ret <= 0) {
388 dev_err(sachip->dev, "unable to allocate %u irqs: %d\n",
389 SA1111_IRQ_NR, ret);
390 if (ret == 0)
391 ret = -EINVAL;
392 return ret;
393 }
394
395 sachip->irq_base = ret;
396
397
398 writel_relaxed(0, irqbase + SA1111_INTEN0);
399 writel_relaxed(0, irqbase + SA1111_INTEN1);
400 writel_relaxed(0, irqbase + SA1111_WAKEEN0);
401 writel_relaxed(0, irqbase + SA1111_WAKEEN1);
402
403
404
405
406
407 writel_relaxed(0, irqbase + SA1111_INTPOL0);
408 writel_relaxed(BIT(IRQ_S0_READY_NINT & 31) |
409 BIT(IRQ_S1_READY_NINT & 31),
410 irqbase + SA1111_INTPOL1);
411
412
413 writel_relaxed(~0, irqbase + SA1111_INTSTATCLR0);
414 writel_relaxed(~0, irqbase + SA1111_INTSTATCLR1);
415
416 sachip->irqdomain = irq_domain_add_linear(NULL, SA1111_IRQ_NR,
417 &sa1111_irqdomain_ops,
418 sachip);
419 if (!sachip->irqdomain) {
420 irq_free_descs(sachip->irq_base, SA1111_IRQ_NR);
421 return -ENOMEM;
422 }
423
424 irq_domain_associate_many(sachip->irqdomain,
425 sachip->irq_base + IRQ_GPAIN0,
426 IRQ_GPAIN0, SSPROR + 1 - IRQ_GPAIN0);
427 irq_domain_associate_many(sachip->irqdomain,
428 sachip->irq_base + AUDXMTDMADONEA,
429 AUDXMTDMADONEA,
430 IRQ_S1_BVD1_STSCHG + 1 - AUDXMTDMADONEA);
431
432
433
434
435 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
436 irq_set_chained_handler_and_data(sachip->irq, sa1111_irq_handler,
437 sachip);
438
439 dev_info(sachip->dev, "Providing IRQ%u-%u\n",
440 sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1);
441
442 return 0;
443}
444
445static void sa1111_remove_irq(struct sa1111 *sachip)
446{
447 struct irq_domain *domain = sachip->irqdomain;
448 void __iomem *irqbase = sachip->base + SA1111_INTC;
449 int i;
450
451
452 writel_relaxed(0, irqbase + SA1111_INTEN0);
453 writel_relaxed(0, irqbase + SA1111_INTEN1);
454 writel_relaxed(0, irqbase + SA1111_WAKEEN0);
455 writel_relaxed(0, irqbase + SA1111_WAKEEN1);
456
457 irq_set_chained_handler_and_data(sachip->irq, NULL, NULL);
458 for (i = 0; i < SA1111_IRQ_NR; i++)
459 irq_dispose_mapping(irq_find_mapping(domain, i));
460 irq_domain_remove(domain);
461
462 release_mem_region(sachip->phys + SA1111_INTC, 512);
463}
464
465enum {
466 SA1111_GPIO_PXDDR = (SA1111_GPIO_PADDR - SA1111_GPIO_PADDR),
467 SA1111_GPIO_PXDRR = (SA1111_GPIO_PADRR - SA1111_GPIO_PADDR),
468 SA1111_GPIO_PXDWR = (SA1111_GPIO_PADWR - SA1111_GPIO_PADDR),
469 SA1111_GPIO_PXSDR = (SA1111_GPIO_PASDR - SA1111_GPIO_PADDR),
470 SA1111_GPIO_PXSSR = (SA1111_GPIO_PASSR - SA1111_GPIO_PADDR),
471};
472
473static struct sa1111 *gc_to_sa1111(struct gpio_chip *gc)
474{
475 return container_of(gc, struct sa1111, gc);
476}
477
478static void __iomem *sa1111_gpio_map_reg(struct sa1111 *sachip, unsigned offset)
479{
480 void __iomem *reg = sachip->base + SA1111_GPIO;
481
482 if (offset < 4)
483 return reg + SA1111_GPIO_PADDR;
484 if (offset < 10)
485 return reg + SA1111_GPIO_PBDDR;
486 if (offset < 18)
487 return reg + SA1111_GPIO_PCDDR;
488 return NULL;
489}
490
491static u32 sa1111_gpio_map_bit(unsigned offset)
492{
493 if (offset < 4)
494 return BIT(offset);
495 if (offset < 10)
496 return BIT(offset - 4);
497 if (offset < 18)
498 return BIT(offset - 10);
499 return 0;
500}
501
502static void sa1111_gpio_modify(void __iomem *reg, u32 mask, u32 set)
503{
504 u32 val;
505
506 val = readl_relaxed(reg);
507 val &= ~mask;
508 val |= mask & set;
509 writel_relaxed(val, reg);
510}
511
512static int sa1111_gpio_get_direction(struct gpio_chip *gc, unsigned offset)
513{
514 struct sa1111 *sachip = gc_to_sa1111(gc);
515 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
516 u32 mask = sa1111_gpio_map_bit(offset);
517
518 return !!(readl_relaxed(reg + SA1111_GPIO_PXDDR) & mask);
519}
520
521static int sa1111_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
522{
523 struct sa1111 *sachip = gc_to_sa1111(gc);
524 unsigned long flags;
525 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
526 u32 mask = sa1111_gpio_map_bit(offset);
527
528 spin_lock_irqsave(&sachip->lock, flags);
529 sa1111_gpio_modify(reg + SA1111_GPIO_PXDDR, mask, mask);
530 sa1111_gpio_modify(reg + SA1111_GPIO_PXSDR, mask, mask);
531 spin_unlock_irqrestore(&sachip->lock, flags);
532
533 return 0;
534}
535
536static int sa1111_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
537 int value)
538{
539 struct sa1111 *sachip = gc_to_sa1111(gc);
540 unsigned long flags;
541 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
542 u32 mask = sa1111_gpio_map_bit(offset);
543
544 spin_lock_irqsave(&sachip->lock, flags);
545 sa1111_gpio_modify(reg + SA1111_GPIO_PXDWR, mask, value ? mask : 0);
546 sa1111_gpio_modify(reg + SA1111_GPIO_PXSSR, mask, value ? mask : 0);
547 sa1111_gpio_modify(reg + SA1111_GPIO_PXDDR, mask, 0);
548 sa1111_gpio_modify(reg + SA1111_GPIO_PXSDR, mask, 0);
549 spin_unlock_irqrestore(&sachip->lock, flags);
550
551 return 0;
552}
553
554static int sa1111_gpio_get(struct gpio_chip *gc, unsigned offset)
555{
556 struct sa1111 *sachip = gc_to_sa1111(gc);
557 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
558 u32 mask = sa1111_gpio_map_bit(offset);
559
560 return !!(readl_relaxed(reg + SA1111_GPIO_PXDRR) & mask);
561}
562
563static void sa1111_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
564{
565 struct sa1111 *sachip = gc_to_sa1111(gc);
566 unsigned long flags;
567 void __iomem *reg = sa1111_gpio_map_reg(sachip, offset);
568 u32 mask = sa1111_gpio_map_bit(offset);
569
570 spin_lock_irqsave(&sachip->lock, flags);
571 sa1111_gpio_modify(reg + SA1111_GPIO_PXDWR, mask, value ? mask : 0);
572 sa1111_gpio_modify(reg + SA1111_GPIO_PXSSR, mask, value ? mask : 0);
573 spin_unlock_irqrestore(&sachip->lock, flags);
574}
575
576static void sa1111_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
577 unsigned long *bits)
578{
579 struct sa1111 *sachip = gc_to_sa1111(gc);
580 unsigned long flags;
581 void __iomem *reg = sachip->base + SA1111_GPIO;
582 u32 msk, val;
583
584 msk = *mask;
585 val = *bits;
586
587 spin_lock_irqsave(&sachip->lock, flags);
588 sa1111_gpio_modify(reg + SA1111_GPIO_PADWR, msk & 15, val);
589 sa1111_gpio_modify(reg + SA1111_GPIO_PASSR, msk & 15, val);
590 sa1111_gpio_modify(reg + SA1111_GPIO_PBDWR, (msk >> 4) & 255, val >> 4);
591 sa1111_gpio_modify(reg + SA1111_GPIO_PBSSR, (msk >> 4) & 255, val >> 4);
592 sa1111_gpio_modify(reg + SA1111_GPIO_PCDWR, (msk >> 12) & 255, val >> 12);
593 sa1111_gpio_modify(reg + SA1111_GPIO_PCSSR, (msk >> 12) & 255, val >> 12);
594 spin_unlock_irqrestore(&sachip->lock, flags);
595}
596
597static int sa1111_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
598{
599 struct sa1111 *sachip = gc_to_sa1111(gc);
600
601 return sa1111_map_irq(sachip, offset);
602}
603
604static int sa1111_setup_gpios(struct sa1111 *sachip)
605{
606 sachip->gc.label = "sa1111";
607 sachip->gc.parent = sachip->dev;
608 sachip->gc.owner = THIS_MODULE;
609 sachip->gc.get_direction = sa1111_gpio_get_direction;
610 sachip->gc.direction_input = sa1111_gpio_direction_input;
611 sachip->gc.direction_output = sa1111_gpio_direction_output;
612 sachip->gc.get = sa1111_gpio_get;
613 sachip->gc.set = sa1111_gpio_set;
614 sachip->gc.set_multiple = sa1111_gpio_set_multiple;
615 sachip->gc.to_irq = sa1111_gpio_to_irq;
616 sachip->gc.base = -1;
617 sachip->gc.ngpio = 18;
618
619 return devm_gpiochip_add_data(sachip->dev, &sachip->gc, sachip);
620}
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636static void sa1111_wake(struct sa1111 *sachip)
637{
638 unsigned long flags, r;
639
640 spin_lock_irqsave(&sachip->lock, flags);
641
642 clk_enable(sachip->clk);
643
644
645
646
647 r = readl_relaxed(sachip->base + SA1111_SKCR);
648 r &= ~SKCR_VCO_OFF;
649 writel_relaxed(r, sachip->base + SA1111_SKCR);
650 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
651 writel_relaxed(r, sachip->base + SA1111_SKCR);
652
653
654
655
656
657 udelay(100);
658
659
660
661
662 r |= SKCR_RCLKEN | SKCR_RDYEN;
663 writel_relaxed(r, sachip->base + SA1111_SKCR);
664
665
666
667
668
669 udelay(1);
670
671
672
673
674 writel_relaxed(0, sachip->base + SA1111_SKPCR);
675
676 spin_unlock_irqrestore(&sachip->lock, flags);
677}
678
679#ifdef CONFIG_ARCH_SA1100
680
681static u32 sa1111_dma_mask[] = {
682 ~0,
683 ~(1 << 20),
684 ~(1 << 23),
685 ~(1 << 24),
686 ~(1 << 25),
687 ~(1 << 20),
688 ~(1 << 20),
689 0,
690};
691
692
693
694
695void
696sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
697 unsigned int cas_latency)
698{
699 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
700
701 if (cas_latency == 3)
702 smcr |= SMCR_CLAT;
703
704 writel_relaxed(smcr, sachip->base + SA1111_SMCR);
705
706
707
708
709
710
711 if (sachip->dev->dma_mask)
712 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
713
714 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
715}
716#endif
717
718static void sa1111_dev_release(struct device *_dev)
719{
720 struct sa1111_dev *dev = to_sa1111_device(_dev);
721
722 kfree(dev);
723}
724
725static int
726sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
727 struct sa1111_dev_info *info)
728{
729 struct sa1111_dev *dev;
730 unsigned i;
731 int ret;
732
733 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
734 if (!dev) {
735 ret = -ENOMEM;
736 goto err_alloc;
737 }
738
739 device_initialize(&dev->dev);
740 dev_set_name(&dev->dev, "%4.4lx", info->offset);
741 dev->devid = info->devid;
742 dev->dev.parent = sachip->dev;
743 dev->dev.bus = &sa1111_bus_type;
744 dev->dev.release = sa1111_dev_release;
745 dev->res.start = sachip->phys + info->offset;
746 dev->res.end = dev->res.start + 511;
747 dev->res.name = dev_name(&dev->dev);
748 dev->res.flags = IORESOURCE_MEM;
749 dev->mapbase = sachip->base + info->offset;
750 dev->skpcr_mask = info->skpcr_mask;
751
752 for (i = 0; i < ARRAY_SIZE(info->hwirq); i++)
753 dev->hwirq[i] = info->hwirq[i];
754
755
756
757
758
759 if (info->dma && sachip->dev->dma_mask) {
760 dev->dma_mask = *sachip->dev->dma_mask;
761 dev->dev.dma_mask = &dev->dma_mask;
762 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
763 }
764
765 ret = request_resource(parent, &dev->res);
766 if (ret) {
767 dev_err(sachip->dev, "failed to allocate resource for %s\n",
768 dev->res.name);
769 goto err_resource;
770 }
771
772 ret = device_add(&dev->dev);
773 if (ret)
774 goto err_add;
775 return 0;
776
777 err_add:
778 release_resource(&dev->res);
779 err_resource:
780 put_device(&dev->dev);
781 err_alloc:
782 return ret;
783}
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798static int __sa1111_probe(struct device *me, struct resource *mem, int irq)
799{
800 struct sa1111_platform_data *pd = me->platform_data;
801 struct sa1111 *sachip;
802 unsigned long id;
803 unsigned int has_devs;
804 int i, ret = -ENODEV;
805
806 if (!pd)
807 return -EINVAL;
808
809 sachip = devm_kzalloc(me, sizeof(struct sa1111), GFP_KERNEL);
810 if (!sachip)
811 return -ENOMEM;
812
813 sachip->clk = devm_clk_get(me, "SA1111_CLK");
814 if (IS_ERR(sachip->clk))
815 return PTR_ERR(sachip->clk);
816
817 ret = clk_prepare(sachip->clk);
818 if (ret)
819 return ret;
820
821 spin_lock_init(&sachip->lock);
822
823 sachip->dev = me;
824 dev_set_drvdata(sachip->dev, sachip);
825
826 sachip->pdata = pd;
827 sachip->phys = mem->start;
828 sachip->irq = irq;
829
830
831
832
833
834 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
835 if (!sachip->base) {
836 ret = -ENOMEM;
837 goto err_clk_unprep;
838 }
839
840
841
842
843 id = readl_relaxed(sachip->base + SA1111_SKID);
844 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
845 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
846 ret = -ENODEV;
847 goto err_unmap;
848 }
849
850 pr_info("SA1111 Microprocessor Companion Chip: silicon revision %lx, metal revision %lx\n",
851 (id & SKID_SIREV_MASK) >> 4, id & SKID_MTREV_MASK);
852
853
854
855
856 sa1111_wake(sachip);
857
858
859
860
861
862 ret = sa1111_setup_irq(sachip, pd->irq_base);
863 if (ret)
864 goto err_clk;
865
866
867 ret = sa1111_setup_gpios(sachip);
868 if (ret)
869 goto err_irq;
870
871#ifdef CONFIG_ARCH_SA1100
872 {
873 unsigned int val;
874
875
876
877
878
879
880
881
882 sa1111_configure_smc(sachip, 1,
883 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
884 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
885
886
887
888
889
890
891 val = readl_relaxed(sachip->base + SA1111_SKPCR);
892 writel_relaxed(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
893
894
895
896
897 sa1110_mb_enable();
898 }
899#endif
900
901 g_sa1111 = sachip;
902
903 has_devs = ~0;
904 if (pd)
905 has_devs &= ~pd->disable_devs;
906
907 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
908 if (sa1111_devices[i].devid & has_devs)
909 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
910
911 return 0;
912
913 err_irq:
914 sa1111_remove_irq(sachip);
915 err_clk:
916 clk_disable(sachip->clk);
917 err_unmap:
918 iounmap(sachip->base);
919 err_clk_unprep:
920 clk_unprepare(sachip->clk);
921 return ret;
922}
923
924static int sa1111_remove_one(struct device *dev, void *data)
925{
926 struct sa1111_dev *sadev = to_sa1111_device(dev);
927 if (dev->bus != &sa1111_bus_type)
928 return 0;
929 device_del(&sadev->dev);
930 release_resource(&sadev->res);
931 put_device(&sadev->dev);
932 return 0;
933}
934
935static void __sa1111_remove(struct sa1111 *sachip)
936{
937 device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
938
939 sa1111_remove_irq(sachip);
940
941 clk_disable(sachip->clk);
942 clk_unprepare(sachip->clk);
943
944 iounmap(sachip->base);
945}
946
947struct sa1111_save_data {
948 unsigned int skcr;
949 unsigned int skpcr;
950 unsigned int skcdr;
951 unsigned char skaud;
952 unsigned char skpwm0;
953 unsigned char skpwm1;
954
955
956
957
958 unsigned int intpol0;
959 unsigned int intpol1;
960 unsigned int inten0;
961 unsigned int inten1;
962 unsigned int wakepol0;
963 unsigned int wakepol1;
964 unsigned int wakeen0;
965 unsigned int wakeen1;
966};
967
968#ifdef CONFIG_PM
969
970static int sa1111_suspend_noirq(struct device *dev)
971{
972 struct sa1111 *sachip = dev_get_drvdata(dev);
973 struct sa1111_save_data *save;
974 unsigned long flags;
975 unsigned int val;
976 void __iomem *base;
977
978 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
979 if (!save)
980 return -ENOMEM;
981 sachip->saved_state = save;
982
983 spin_lock_irqsave(&sachip->lock, flags);
984
985
986
987
988 base = sachip->base;
989 save->skcr = readl_relaxed(base + SA1111_SKCR);
990 save->skpcr = readl_relaxed(base + SA1111_SKPCR);
991 save->skcdr = readl_relaxed(base + SA1111_SKCDR);
992 save->skaud = readl_relaxed(base + SA1111_SKAUD);
993 save->skpwm0 = readl_relaxed(base + SA1111_SKPWM0);
994 save->skpwm1 = readl_relaxed(base + SA1111_SKPWM1);
995
996 writel_relaxed(0, sachip->base + SA1111_SKPWM0);
997 writel_relaxed(0, sachip->base + SA1111_SKPWM1);
998
999 base = sachip->base + SA1111_INTC;
1000 save->intpol0 = readl_relaxed(base + SA1111_INTPOL0);
1001 save->intpol1 = readl_relaxed(base + SA1111_INTPOL1);
1002 save->inten0 = readl_relaxed(base + SA1111_INTEN0);
1003 save->inten1 = readl_relaxed(base + SA1111_INTEN1);
1004 save->wakepol0 = readl_relaxed(base + SA1111_WAKEPOL0);
1005 save->wakepol1 = readl_relaxed(base + SA1111_WAKEPOL1);
1006 save->wakeen0 = readl_relaxed(base + SA1111_WAKEEN0);
1007 save->wakeen1 = readl_relaxed(base + SA1111_WAKEEN1);
1008
1009
1010
1011
1012 val = readl_relaxed(sachip->base + SA1111_SKCR);
1013 writel_relaxed(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
1014
1015 clk_disable(sachip->clk);
1016
1017 spin_unlock_irqrestore(&sachip->lock, flags);
1018
1019#ifdef CONFIG_ARCH_SA1100
1020 sa1110_mb_disable();
1021#endif
1022
1023 return 0;
1024}
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035static int sa1111_resume_noirq(struct device *dev)
1036{
1037 struct sa1111 *sachip = dev_get_drvdata(dev);
1038 struct sa1111_save_data *save;
1039 unsigned long flags, id;
1040 void __iomem *base;
1041
1042 save = sachip->saved_state;
1043 if (!save)
1044 return 0;
1045
1046
1047
1048
1049
1050 id = readl_relaxed(sachip->base + SA1111_SKID);
1051 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
1052 __sa1111_remove(sachip);
1053 dev_set_drvdata(dev, NULL);
1054 kfree(save);
1055 return 0;
1056 }
1057
1058
1059
1060
1061 sa1111_wake(sachip);
1062
1063#ifdef CONFIG_ARCH_SA1100
1064
1065 sa1110_mb_enable();
1066#endif
1067
1068
1069
1070
1071
1072 spin_lock_irqsave(&sachip->lock, flags);
1073
1074 writel_relaxed(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
1075 writel_relaxed(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
1076
1077 base = sachip->base;
1078 writel_relaxed(save->skcr, base + SA1111_SKCR);
1079 writel_relaxed(save->skpcr, base + SA1111_SKPCR);
1080 writel_relaxed(save->skcdr, base + SA1111_SKCDR);
1081 writel_relaxed(save->skaud, base + SA1111_SKAUD);
1082 writel_relaxed(save->skpwm0, base + SA1111_SKPWM0);
1083 writel_relaxed(save->skpwm1, base + SA1111_SKPWM1);
1084
1085 base = sachip->base + SA1111_INTC;
1086 writel_relaxed(save->intpol0, base + SA1111_INTPOL0);
1087 writel_relaxed(save->intpol1, base + SA1111_INTPOL1);
1088 writel_relaxed(save->inten0, base + SA1111_INTEN0);
1089 writel_relaxed(save->inten1, base + SA1111_INTEN1);
1090 writel_relaxed(save->wakepol0, base + SA1111_WAKEPOL0);
1091 writel_relaxed(save->wakepol1, base + SA1111_WAKEPOL1);
1092 writel_relaxed(save->wakeen0, base + SA1111_WAKEEN0);
1093 writel_relaxed(save->wakeen1, base + SA1111_WAKEEN1);
1094
1095 spin_unlock_irqrestore(&sachip->lock, flags);
1096
1097 sachip->saved_state = NULL;
1098 kfree(save);
1099
1100 return 0;
1101}
1102
1103#else
1104#define sa1111_suspend_noirq NULL
1105#define sa1111_resume_noirq NULL
1106#endif
1107
1108static int sa1111_probe(struct platform_device *pdev)
1109{
1110 struct resource *mem;
1111 int irq;
1112
1113 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1114 if (!mem)
1115 return -EINVAL;
1116 irq = platform_get_irq(pdev, 0);
1117 if (irq < 0)
1118 return irq;
1119
1120 return __sa1111_probe(&pdev->dev, mem, irq);
1121}
1122
1123static int sa1111_remove(struct platform_device *pdev)
1124{
1125 struct sa1111 *sachip = platform_get_drvdata(pdev);
1126
1127 if (sachip) {
1128#ifdef CONFIG_PM
1129 kfree(sachip->saved_state);
1130 sachip->saved_state = NULL;
1131#endif
1132 __sa1111_remove(sachip);
1133 platform_set_drvdata(pdev, NULL);
1134 }
1135
1136 return 0;
1137}
1138
1139static struct dev_pm_ops sa1111_pm_ops = {
1140 .suspend_noirq = sa1111_suspend_noirq,
1141 .resume_noirq = sa1111_resume_noirq,
1142};
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153static struct platform_driver sa1111_device_driver = {
1154 .probe = sa1111_probe,
1155 .remove = sa1111_remove,
1156 .driver = {
1157 .name = "sa1111",
1158 .pm = &sa1111_pm_ops,
1159 },
1160};
1161
1162
1163
1164
1165
1166static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
1167{
1168 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
1169}
1170
1171
1172
1173
1174static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1175
1176static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1177{
1178 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1179
1180 skcdr = readl_relaxed(sachip->base + SA1111_SKCDR);
1181
1182 fbdiv = (skcdr & 0x007f) + 2;
1183 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1184 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1185
1186 return 3686400 * fbdiv / (ipdiv * opdiv);
1187}
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1199{
1200 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1201
1202 return __sa1111_pll_clock(sachip);
1203}
1204EXPORT_SYMBOL(sa1111_pll_clock);
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1215{
1216 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1217 unsigned long flags;
1218 unsigned int val;
1219
1220 spin_lock_irqsave(&sachip->lock, flags);
1221
1222 val = readl_relaxed(sachip->base + SA1111_SKCR);
1223 if (mode == SA1111_AUDIO_I2S) {
1224 val &= ~SKCR_SELAC;
1225 } else {
1226 val |= SKCR_SELAC;
1227 }
1228 writel_relaxed(val, sachip->base + SA1111_SKCR);
1229
1230 spin_unlock_irqrestore(&sachip->lock, flags);
1231}
1232EXPORT_SYMBOL(sa1111_select_audio_mode);
1233
1234
1235
1236
1237
1238
1239int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1240{
1241 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1242 unsigned int div;
1243
1244 if (sadev->devid != SA1111_DEVID_SAC)
1245 return -EINVAL;
1246
1247 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1248 if (div == 0)
1249 div = 1;
1250 if (div > 128)
1251 div = 128;
1252
1253 writel_relaxed(div - 1, sachip->base + SA1111_SKAUD);
1254
1255 return 0;
1256}
1257EXPORT_SYMBOL(sa1111_set_audio_rate);
1258
1259
1260
1261
1262
1263int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1264{
1265 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1266 unsigned long div;
1267
1268 if (sadev->devid != SA1111_DEVID_SAC)
1269 return -EINVAL;
1270
1271 div = readl_relaxed(sachip->base + SA1111_SKAUD) + 1;
1272
1273 return __sa1111_pll_clock(sachip) / (256 * div);
1274}
1275EXPORT_SYMBOL(sa1111_get_audio_rate);
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285int sa1111_enable_device(struct sa1111_dev *sadev)
1286{
1287 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1288 unsigned long flags;
1289 unsigned int val;
1290 int ret = 0;
1291
1292 if (sachip->pdata && sachip->pdata->enable)
1293 ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid);
1294
1295 if (ret == 0) {
1296 spin_lock_irqsave(&sachip->lock, flags);
1297 val = readl_relaxed(sachip->base + SA1111_SKPCR);
1298 writel_relaxed(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1299 spin_unlock_irqrestore(&sachip->lock, flags);
1300 }
1301 return ret;
1302}
1303EXPORT_SYMBOL(sa1111_enable_device);
1304
1305
1306
1307
1308
1309void sa1111_disable_device(struct sa1111_dev *sadev)
1310{
1311 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1312 unsigned long flags;
1313 unsigned int val;
1314
1315 spin_lock_irqsave(&sachip->lock, flags);
1316 val = readl_relaxed(sachip->base + SA1111_SKPCR);
1317 writel_relaxed(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1318 spin_unlock_irqrestore(&sachip->lock, flags);
1319
1320 if (sachip->pdata && sachip->pdata->disable)
1321 sachip->pdata->disable(sachip->pdata->data, sadev->devid);
1322}
1323EXPORT_SYMBOL(sa1111_disable_device);
1324
1325int sa1111_get_irq(struct sa1111_dev *sadev, unsigned num)
1326{
1327 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1328 if (num >= ARRAY_SIZE(sadev->hwirq))
1329 return -EINVAL;
1330 return sa1111_map_irq(sachip, sadev->hwirq[num]);
1331}
1332EXPORT_SYMBOL_GPL(sa1111_get_irq);
1333
1334
1335
1336
1337
1338
1339
1340static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1341{
1342 struct sa1111_dev *dev = to_sa1111_device(_dev);
1343 struct sa1111_driver *drv = SA1111_DRV(_drv);
1344
1345 return !!(dev->devid & drv->devid);
1346}
1347
1348static int sa1111_bus_probe(struct device *dev)
1349{
1350 struct sa1111_dev *sadev = to_sa1111_device(dev);
1351 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1352 int ret = -ENODEV;
1353
1354 if (drv->probe)
1355 ret = drv->probe(sadev);
1356 return ret;
1357}
1358
1359static void sa1111_bus_remove(struct device *dev)
1360{
1361 struct sa1111_dev *sadev = to_sa1111_device(dev);
1362 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1363
1364 if (drv->remove)
1365 drv->remove(sadev);
1366}
1367
1368struct bus_type sa1111_bus_type = {
1369 .name = "sa1111-rab",
1370 .match = sa1111_match,
1371 .probe = sa1111_bus_probe,
1372 .remove = sa1111_bus_remove,
1373};
1374EXPORT_SYMBOL(sa1111_bus_type);
1375
1376int sa1111_driver_register(struct sa1111_driver *driver)
1377{
1378 driver->drv.bus = &sa1111_bus_type;
1379 return driver_register(&driver->drv);
1380}
1381EXPORT_SYMBOL(sa1111_driver_register);
1382
1383void sa1111_driver_unregister(struct sa1111_driver *driver)
1384{
1385 driver_unregister(&driver->drv);
1386}
1387EXPORT_SYMBOL(sa1111_driver_unregister);
1388
1389#ifdef CONFIG_DMABOUNCE
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
1406{
1407
1408
1409
1410
1411
1412
1413
1414 return (machine_is_assabet() || machine_is_pfs168()) &&
1415 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000);
1416}
1417
1418static int sa1111_notifier_call(struct notifier_block *n, unsigned long action,
1419 void *data)
1420{
1421 struct sa1111_dev *dev = to_sa1111_device(data);
1422
1423 switch (action) {
1424 case BUS_NOTIFY_ADD_DEVICE:
1425 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) {
1426 int ret = dmabounce_register_dev(&dev->dev, 1024, 4096,
1427 sa1111_needs_bounce);
1428 if (ret)
1429 dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret);
1430 }
1431 break;
1432
1433 case BUS_NOTIFY_DEL_DEVICE:
1434 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL)
1435 dmabounce_unregister_dev(&dev->dev);
1436 break;
1437 }
1438 return NOTIFY_OK;
1439}
1440
1441static struct notifier_block sa1111_bus_notifier = {
1442 .notifier_call = sa1111_notifier_call,
1443};
1444#endif
1445
1446static int __init sa1111_init(void)
1447{
1448 int ret = bus_register(&sa1111_bus_type);
1449#ifdef CONFIG_DMABOUNCE
1450 if (ret == 0)
1451 bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
1452#endif
1453 if (ret == 0)
1454 platform_driver_register(&sa1111_device_driver);
1455 return ret;
1456}
1457
1458static void __exit sa1111_exit(void)
1459{
1460 platform_driver_unregister(&sa1111_device_driver);
1461#ifdef CONFIG_DMABOUNCE
1462 bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
1463#endif
1464 bus_unregister(&sa1111_bus_type);
1465}
1466
1467subsys_initcall(sa1111_init);
1468module_exit(sa1111_exit);
1469
1470MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1471MODULE_LICENSE("GPL");
1472