LXR linux/arch/arm/include/asm/opcodes.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 *  arch/arm/include/asm/opcodes.h
   4 */
   5
   6#ifndef __ASM_ARM_OPCODES_H
   7#define __ASM_ARM_OPCODES_H
   8
   9#ifndef __ASSEMBLY__
  10#include <linux/linkage.h>
  11extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
  12#endif
  13
  14#define ARM_OPCODE_CONDTEST_FAIL   0
  15#define ARM_OPCODE_CONDTEST_PASS   1
  16#define ARM_OPCODE_CONDTEST_UNCOND 2
  17
  18
  19/*
  20 * Assembler opcode byteswap helpers.
  21 * These are only intended for use by this header: don't use them directly,
  22 * because they will be suboptimal in most cases.
  23 */
  24#define ___asm_opcode_swab32(x) (       \
  25          (((x) << 24) & 0xFF000000)    \
  26        | (((x) <<  8) & 0x00FF0000)    \
  27        | (((x) >>  8) & 0x0000FF00)    \
  28        | (((x) >> 24) & 0x000000FF)    \
  29)
  30#define ___asm_opcode_swab16(x) (       \
  31          (((x) << 8) & 0xFF00)         \
  32        | (((x) >> 8) & 0x00FF)         \
  33)
  34#define ___asm_opcode_swahb32(x) (      \
  35          (((x) << 8) & 0xFF00FF00)     \
  36        | (((x) >> 8) & 0x00FF00FF)     \
  37)
  38#define ___asm_opcode_swahw32(x) (      \
  39          (((x) << 16) & 0xFFFF0000)    \
  40        | (((x) >> 16) & 0x0000FFFF)    \
  41)
  42#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
  43#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
  44
  45
  46/*
  47 * Opcode byteswap helpers
  48 *
  49 * These macros help with converting instructions between a canonical integer
  50 * format and in-memory representation, in an endianness-agnostic manner.
  51 *
  52 * __mem_to_opcode_*() convert from in-memory representation to canonical form.
  53 * __opcode_to_mem_*() convert from canonical form to in-memory representation.
  54 *
  55 *
  56 * Canonical instruction representation:
  57 *
  58 *      ARM:            0xKKLLMMNN
  59 *      Thumb 16-bit:   0x0000KKLL, where KK < 0xE8
  60 *      Thumb 32-bit:   0xKKLLMMNN, where KK >= 0xE8
  61 *
  62 * There is no way to distinguish an ARM instruction in canonical representation
  63 * from a Thumb instruction (just as these cannot be distinguished in memory).
  64 * Where this distinction is important, it needs to be tracked separately.
  65 *
  66 * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
  67 * represent any valid Thumb-2 instruction.  For this range,
  68 * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
  69 *
  70 * The ___asm variants are intended only for use by this header, in situations
  71 * involving inline assembler.  For .S files, the normal __opcode_*() macros
  72 * should do the right thing.
  73 */
  74#ifdef __ASSEMBLY__
  75
  76#define ___opcode_swab32(x) ___asm_opcode_swab32(x)
  77#define ___opcode_swab16(x) ___asm_opcode_swab16(x)
  78#define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
  79#define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
  80#define ___opcode_identity32(x) ___asm_opcode_identity32(x)
  81#define ___opcode_identity16(x) ___asm_opcode_identity16(x)
  82
  83#else /* ! __ASSEMBLY__ */
  84
  85#include <linux/types.h>
  86#include <linux/swab.h>
  87
  88#define ___opcode_swab32(x) swab32(x)
  89#define ___opcode_swab16(x) swab16(x)
  90#define ___opcode_swahb32(x) swahb32(x)
  91#define ___opcode_swahw32(x) swahw32(x)
  92#define ___opcode_identity32(x) ((u32)(x))
  93#define ___opcode_identity16(x) ((u16)(x))
  94
  95#endif /* ! __ASSEMBLY__ */
  96
  97
  98#ifdef CONFIG_CPU_ENDIAN_BE8
  99
 100#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
 101#define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
 102#define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
 103#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
 104#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
 105#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
 106
 107#else /* ! CONFIG_CPU_ENDIAN_BE8 */
 108
 109#define __opcode_to_mem_arm(x) ___opcode_identity32(x)
 110#define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
 111#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
 112#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
 113#ifndef CONFIG_CPU_ENDIAN_BE32
 114/*
 115 * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
 116 * work in all cases, due to alignment constraints.  For now, a correct
 117 * version is not provided for BE32.
 118 */
 119#define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
 120#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
 121#endif
 122
 123#endif /* ! CONFIG_CPU_ENDIAN_BE8 */
 124
 125#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
 126#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
 127#ifndef CONFIG_CPU_ENDIAN_BE32
 128#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
 129#endif
 130
 131/* Operations specific to Thumb opcodes */
 132
 133/* Instruction size checks: */
 134#define __opcode_is_thumb32(x) (                \
 135           ((x) & 0xF8000000) == 0xE8000000     \
 136        || ((x) & 0xF0000000) == 0xF0000000     \
 137)
 138#define __opcode_is_thumb16(x) (                                        \
 139           ((x) & 0xFFFF0000) == 0                                      \
 140        && !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000)      \
 141)
 142
 143/* Operations to construct or split 32-bit Thumb instructions: */
 144#define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
 145#define __opcode_thumb32_second(x) (___opcode_identity16(x))
 146#define __opcode_thumb32_compose(first, second) (                       \
 147          (___opcode_identity32(___opcode_identity16(first)) << 16)     \
 148        | ___opcode_identity32(___opcode_identity16(second))            \
 149)
 150#define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
 151#define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
 152#define ___asm_opcode_thumb32_compose(first, second) (                      \
 153          (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
 154        | ___asm_opcode_identity32(___asm_opcode_identity16(second))        \
 155)
 156
 157/*
 158 * Opcode injection helpers
 159 *
 160 * In rare cases it is necessary to assemble an opcode which the
 161 * assembler does not support directly, or which would normally be
 162 * rejected because of the CFLAGS or AFLAGS used to build the affected
 163 * file.
 164 *
 165 * Before using these macros, consider carefully whether it is feasible
 166 * instead to change the build flags for your file, or whether it really
 167 * makes sense to support old assembler versions when building that
 168 * particular kernel feature.
 169 *
 170 * The macros defined here should only be used where there is no viable
 171 * alternative.
 172 *
 173 *
 174 * __inst_arm(x): emit the specified ARM opcode
 175 * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
 176 * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
 177 *
 178 * __inst_arm_thumb16(arm, thumb): emit either the specified arm or
 179 *      16-bit Thumb opcode, depending on whether an ARM or Thumb-2
 180 *      kernel is being built
 181 *
 182 * __inst_arm_thumb32(arm, thumb): emit either the specified arm or
 183 *      32-bit Thumb opcode, depending on whether an ARM or Thumb-2
 184 *      kernel is being built
 185 *
 186 *
 187 * Note that using these macros directly is poor practice.  Instead, you
 188 * should use them to define human-readable wrapper macros to encode the
 189 * instructions that you care about.  In code which might run on ARMv7 or
 190 * above, you can usually use the __inst_arm_thumb{16,32} macros to
 191 * specify the ARM and Thumb alternatives at the same time.  This ensures
 192 * that the correct opcode gets emitted depending on the instruction set
 193 * used for the kernel build.
 194 *
 195 * Look at opcodes-virt.h for an example of how to use these macros.
 196 */
 197#include <linux/stringify.h>
 198
 199#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
 200#define __inst_thumb32(x) ___inst_thumb32(                              \
 201        ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)),   \
 202        ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x))   \
 203)
 204#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
 205
 206#ifdef CONFIG_THUMB2_KERNEL
 207#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
 208        __inst_thumb16(thumb_opcode)
 209#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
 210        __inst_thumb32(thumb_opcode)
 211#else
 212#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
 213#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
 214#endif
 215
 216/* Helpers for the helpers.  Don't use these directly. */
 217#ifdef __ASSEMBLY__
 218#define ___inst_arm(x) .long x
 219#define ___inst_thumb16(x) .short x
 220#define ___inst_thumb32(first, second) .short first, second
 221#else
 222#define ___inst_arm(x) ".long " __stringify(x) "\n\t"
 223#define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
 224#define ___inst_thumb32(first, second) \
 225        ".short " __stringify(first) ", " __stringify(second) "\n\t"
 226#endif
 227
 228#endif /* __ASM_ARM_OPCODES_H */
 229