1
2
3
4
5
6
7
8#include <linux/init.h>
9#include <linux/platform_device.h>
10#include <linux/platform_data/i2c-davinci.h>
11#include <linux/platform_data/mmc-davinci.h>
12#include <linux/platform_data/edma.h>
13#include <linux/dma-mapping.h>
14#include <linux/io.h>
15#include <linux/reboot.h>
16
17#include <mach/hardware.h>
18#include <mach/cputype.h>
19#include <mach/mux.h>
20
21#include "davinci.h"
22#include "irqs.h"
23
24#define DAVINCI_I2C_BASE 0x01C21000
25#define DAVINCI_ATA_BASE 0x01C66000
26#define DAVINCI_MMCSD0_BASE 0x01E10000
27#define DM355_MMCSD0_BASE 0x01E11000
28#define DM355_MMCSD1_BASE 0x01E00000
29#define DM365_MMCSD0_BASE 0x01D11000
30#define DM365_MMCSD1_BASE 0x01D00000
31
32void __iomem *davinci_sysmod_base;
33
34void davinci_map_sysmod(void)
35{
36 davinci_sysmod_base = ioremap(DAVINCI_SYSTEM_MODULE_BASE,
37 0x800);
38
39
40
41
42
43 BUG_ON(!davinci_sysmod_base);
44}
45
46static struct resource i2c_resources[] = {
47 {
48 .start = DAVINCI_I2C_BASE,
49 .end = DAVINCI_I2C_BASE + 0x40,
50 .flags = IORESOURCE_MEM,
51 },
52 {
53 .start = DAVINCI_INTC_IRQ(IRQ_I2C),
54 .flags = IORESOURCE_IRQ,
55 },
56};
57
58static struct platform_device davinci_i2c_device = {
59 .name = "i2c_davinci",
60 .id = 1,
61 .num_resources = ARRAY_SIZE(i2c_resources),
62 .resource = i2c_resources,
63};
64
65void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
66{
67 if (cpu_is_davinci_dm644x())
68 davinci_cfg_reg(DM644X_I2C);
69
70 davinci_i2c_device.dev.platform_data = pdata;
71 (void) platform_device_register(&davinci_i2c_device);
72}
73
74static struct resource ide_resources[] = {
75 {
76 .start = DAVINCI_ATA_BASE,
77 .end = DAVINCI_ATA_BASE + 0x7ff,
78 .flags = IORESOURCE_MEM,
79 },
80 {
81 .start = DAVINCI_INTC_IRQ(IRQ_IDE),
82 .end = DAVINCI_INTC_IRQ(IRQ_IDE),
83 .flags = IORESOURCE_IRQ,
84 },
85};
86
87static u64 ide_dma_mask = DMA_BIT_MASK(32);
88
89static struct platform_device ide_device = {
90 .name = "palm_bk3710",
91 .id = -1,
92 .resource = ide_resources,
93 .num_resources = ARRAY_SIZE(ide_resources),
94 .dev = {
95 .dma_mask = &ide_dma_mask,
96 .coherent_dma_mask = DMA_BIT_MASK(32),
97 },
98};
99
100void __init davinci_init_ide(void)
101{
102 if (cpu_is_davinci_dm644x()) {
103 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
104 davinci_cfg_reg(DM644X_ATAEN);
105 davinci_cfg_reg(DM644X_HDIREN);
106 } else if (cpu_is_davinci_dm646x()) {
107
108 davinci_cfg_reg(DM646X_ATAEN);
109 } else {
110 WARN_ON(1);
111 return;
112 }
113
114 platform_device_register(&ide_device);
115}
116
117#if IS_ENABLED(CONFIG_MMC_DAVINCI)
118
119static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
120
121static struct resource mmcsd0_resources[] = {
122 {
123
124 .start = DAVINCI_MMCSD0_BASE,
125 .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
126 .flags = IORESOURCE_MEM,
127 },
128
129 {
130 .start = DAVINCI_INTC_IRQ(IRQ_MMCINT),
131 .flags = IORESOURCE_IRQ,
132 }, {
133
134 .start = DAVINCI_INTC_IRQ(IRQ_SDIOINT),
135 .flags = IORESOURCE_IRQ,
136 },
137};
138
139static struct platform_device davinci_mmcsd0_device = {
140 .name = "dm6441-mmc",
141 .id = 0,
142 .dev = {
143 .dma_mask = &mmcsd0_dma_mask,
144 .coherent_dma_mask = DMA_BIT_MASK(32),
145 },
146 .num_resources = ARRAY_SIZE(mmcsd0_resources),
147 .resource = mmcsd0_resources,
148};
149
150static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
151
152static struct resource mmcsd1_resources[] = {
153 {
154 .start = DM355_MMCSD1_BASE,
155 .end = DM355_MMCSD1_BASE + SZ_4K - 1,
156 .flags = IORESOURCE_MEM,
157 },
158
159 {
160 .start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1),
161 .flags = IORESOURCE_IRQ,
162 }, {
163 .start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1),
164 .flags = IORESOURCE_IRQ,
165 },
166};
167
168static struct platform_device davinci_mmcsd1_device = {
169 .name = "dm6441-mmc",
170 .id = 1,
171 .dev = {
172 .dma_mask = &mmcsd1_dma_mask,
173 .coherent_dma_mask = DMA_BIT_MASK(32),
174 },
175 .num_resources = ARRAY_SIZE(mmcsd1_resources),
176 .resource = mmcsd1_resources,
177};
178
179
180void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
181{
182 struct platform_device *pdev = NULL;
183
184 if (WARN_ON(cpu_is_davinci_dm646x()))
185 return;
186
187
188
189
190
191
192
193 switch (module) {
194 case 1:
195 if (cpu_is_davinci_dm355()) {
196
197
198
199 davinci_cfg_reg(DM355_SD1_CMD);
200 davinci_cfg_reg(DM355_SD1_CLK);
201 davinci_cfg_reg(DM355_SD1_DATA0);
202 davinci_cfg_reg(DM355_SD1_DATA1);
203 davinci_cfg_reg(DM355_SD1_DATA2);
204 davinci_cfg_reg(DM355_SD1_DATA3);
205 } else if (cpu_is_davinci_dm365()) {
206
207 unsigned v;
208
209 v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
210 __raw_writel(v & ~0xfc0,
211 DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
212
213 mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
214 mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
215 SZ_4K - 1;
216 mmcsd1_resources[2].start = DAVINCI_INTC_IRQ(
217 IRQ_DM365_SDIOINT1);
218 davinci_mmcsd1_device.name = "da830-mmc";
219 } else
220 break;
221
222 pdev = &davinci_mmcsd1_device;
223 break;
224 case 0:
225 if (cpu_is_davinci_dm355()) {
226 mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
227 mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
228 mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
229 IRQ_DM355_SDIOINT0);
230
231
232 davinci_cfg_reg(DM355_MMCSD0);
233
234
235 davinci_cfg_reg(DM355_EVT26_MMC0_RX);
236 } else if (cpu_is_davinci_dm365()) {
237 mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
238 mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
239 SZ_4K - 1;
240 mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
241 IRQ_DM365_SDIOINT0);
242 davinci_mmcsd0_device.name = "da830-mmc";
243 } else if (cpu_is_davinci_dm644x()) {
244
245
246 __raw_writel(0,
247 DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
248
249 davinci_cfg_reg(DM644X_MSTK);
250 }
251
252 pdev = &davinci_mmcsd0_device;
253 break;
254 }
255
256 if (WARN_ON(!pdev))
257 return;
258
259 pdev->dev.platform_data = config;
260 platform_device_register(pdev);
261}
262
263#else
264
265void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
266{
267}
268
269#endif
270
271
272
273static struct resource wdt_resources[] = {
274 {
275 .start = DAVINCI_WDOG_BASE,
276 .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
277 .flags = IORESOURCE_MEM,
278 },
279};
280
281static struct platform_device davinci_wdt_device = {
282 .name = "davinci-wdt",
283 .id = -1,
284 .num_resources = ARRAY_SIZE(wdt_resources),
285 .resource = wdt_resources,
286};
287
288int davinci_init_wdt(void)
289{
290 return platform_device_register(&davinci_wdt_device);
291}
292
293static struct platform_device davinci_gpio_device = {
294 .name = "davinci_gpio",
295 .id = -1,
296};
297
298int davinci_gpio_register(struct resource *res, int size, void *pdata)
299{
300 davinci_gpio_device.resource = res;
301 davinci_gpio_device.num_resources = size;
302 davinci_gpio_device.dev.platform_data = pdata;
303 return platform_device_register(&davinci_gpio_device);
304}
305