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2
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4
5
6#include <linux/irqchip.h>
7#include <linux/of_platform.h>
8#include <linux/phy.h>
9#include <linux/regmap.h>
10#include <linux/mfd/syscon.h>
11#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
12#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include "common.h"
16#include "cpuidle.h"
17
18static void __init imx6sx_enet_clk_sel(void)
19{
20 struct regmap *gpr;
21
22 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
23 if (!IS_ERR(gpr)) {
24 regmap_update_bits(gpr, IOMUXC_GPR1,
25 IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, 0);
26 regmap_update_bits(gpr, IOMUXC_GPR1,
27 IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, 0);
28 } else {
29 pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
30 }
31}
32
33static inline void imx6sx_enet_init(void)
34{
35 imx6sx_enet_clk_sel();
36}
37
38static void __init imx6sx_init_machine(void)
39{
40 of_platform_default_populate(NULL, NULL, NULL);
41
42 imx6sx_enet_init();
43 imx_anatop_init();
44 imx6sx_pm_init();
45}
46
47static void __init imx6sx_init_irq(void)
48{
49 imx_gpc_check_dt();
50 imx_init_revision_from_anatop();
51 imx_init_l2cache();
52 imx_src_init();
53 irqchip_init();
54 imx6_pm_ccm_init("fsl,imx6sx-ccm");
55}
56
57static void __init imx6sx_init_late(void)
58{
59 imx6sx_cpuidle_init();
60
61 if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
62 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
63}
64
65static const char * const imx6sx_dt_compat[] __initconst = {
66 "fsl,imx6sx",
67 NULL,
68};
69
70DT_MACHINE_START(IMX6SX, "Freescale i.MX6 SoloX (Device Tree)")
71 .l2c_aux_val = 0,
72 .l2c_aux_mask = ~0,
73 .init_irq = imx6sx_init_irq,
74 .init_machine = imx6sx_init_machine,
75 .dt_compat = imx6sx_dt_compat,
76 .init_late = imx6sx_init_late,
77MACHINE_END
78