LXR linux/arch/arm/mach-omap2/cm.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * OMAP2+ Clock Management prototypes
   4 *
   5 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
   6 * Copyright (C) 2007-2009 Nokia Corporation
   7 *
   8 * Written by Paul Walmsley
   9 */
  10#ifndef __ARCH_ASM_MACH_OMAP2_CM_H
  11#define __ARCH_ASM_MACH_OMAP2_CM_H
  12
  13/*
  14 * MAX_MODULE_READY_TIME: max duration in microseconds to wait for the
  15 * PRCM to request that a module exit the inactive state in the case of
  16 * OMAP2 & 3.
  17 * In the case of OMAP4 this is the max duration in microseconds for the
  18 * module to reach the functionnal state from an inactive state.
  19 */
  20#define MAX_MODULE_READY_TIME           2000
  21
  22# ifndef __ASSEMBLER__
  23#include <linux/clk/ti.h>
  24
  25#include "prcm-common.h"
  26
  27extern struct omap_domain_base cm_base;
  28extern struct omap_domain_base cm2_base;
  29# endif
  30
  31/*
  32 * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
  33 * the PRCM to request that a module enter the inactive state in the
  34 * case of OMAP2 & 3.  In the case of OMAP4 this is the max duration
  35 * in microseconds for the module to reach the inactive state from
  36 * a functional state.
  37 * XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during
  38 * kernel init.
  39 */
  40#define MAX_MODULE_DISABLE_TIME         5000
  41
  42# ifndef __ASSEMBLER__
  43
  44/**
  45 * struct cm_ll_data - fn ptrs to per-SoC CM function implementations
  46 * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
  47 * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
  48 * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
  49 * @module_enable: ptr to the SoC CM-specific module_enable impl
  50 * @module_disable: ptr to the SoC CM-specific module_disable impl
  51 * @xlate_clkctrl: ptr to the SoC CM-specific clkctrl xlate addr impl
  52 */
  53struct cm_ll_data {
  54        int (*split_idlest_reg)(struct clk_omap_reg *idlest_reg, s16 *prcm_inst,
  55                                u8 *idlest_reg_id);
  56        int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
  57                                 u8 idlest_shift);
  58        int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
  59                                u8 idlest_shift);
  60        void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
  61        void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs);
  62        u32 (*xlate_clkctrl)(u8 part, u16 inst, u16 clkctrl_offs);
  63};
  64
  65extern int cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, s16 *prcm_inst,
  66                               u8 *idlest_reg_id);
  67int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
  68                              u8 idlest_shift);
  69int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
  70                             u8 idlest_shift);
  71int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
  72int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
  73u32 omap_cm_xlate_clkctrl(u8 part, u16 inst, u16 clkctrl_offs);
  74extern int cm_register(const struct cm_ll_data *cld);
  75extern int cm_unregister(const struct cm_ll_data *cld);
  76int omap_cm_init(void);
  77int omap2_cm_base_init(void);
  78
  79# endif
  80
  81#endif
  82