linux/arch/arm64/mm/fault.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Based on arch/arm/mm/fault.c
   4 *
   5 * Copyright (C) 1995  Linus Torvalds
   6 * Copyright (C) 1995-2004 Russell King
   7 * Copyright (C) 2012 ARM Ltd.
   8 */
   9
  10#include <linux/acpi.h>
  11#include <linux/bitfield.h>
  12#include <linux/extable.h>
  13#include <linux/kfence.h>
  14#include <linux/signal.h>
  15#include <linux/mm.h>
  16#include <linux/hardirq.h>
  17#include <linux/init.h>
  18#include <linux/kasan.h>
  19#include <linux/kprobes.h>
  20#include <linux/uaccess.h>
  21#include <linux/page-flags.h>
  22#include <linux/sched/signal.h>
  23#include <linux/sched/debug.h>
  24#include <linux/highmem.h>
  25#include <linux/perf_event.h>
  26#include <linux/preempt.h>
  27#include <linux/hugetlb.h>
  28
  29#include <asm/acpi.h>
  30#include <asm/bug.h>
  31#include <asm/cmpxchg.h>
  32#include <asm/cpufeature.h>
  33#include <asm/exception.h>
  34#include <asm/daifflags.h>
  35#include <asm/debug-monitors.h>
  36#include <asm/esr.h>
  37#include <asm/kprobes.h>
  38#include <asm/mte.h>
  39#include <asm/processor.h>
  40#include <asm/sysreg.h>
  41#include <asm/system_misc.h>
  42#include <asm/tlbflush.h>
  43#include <asm/traps.h>
  44
  45struct fault_info {
  46        int     (*fn)(unsigned long far, unsigned int esr,
  47                      struct pt_regs *regs);
  48        int     sig;
  49        int     code;
  50        const char *name;
  51};
  52
  53static const struct fault_info fault_info[];
  54static struct fault_info debug_fault_info[];
  55
  56static inline const struct fault_info *esr_to_fault_info(unsigned int esr)
  57{
  58        return fault_info + (esr & ESR_ELx_FSC);
  59}
  60
  61static inline const struct fault_info *esr_to_debug_fault_info(unsigned int esr)
  62{
  63        return debug_fault_info + DBG_ESR_EVT(esr);
  64}
  65
  66static void data_abort_decode(unsigned int esr)
  67{
  68        pr_alert("Data abort info:\n");
  69
  70        if (esr & ESR_ELx_ISV) {
  71                pr_alert("  Access size = %u byte(s)\n",
  72                         1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
  73                pr_alert("  SSE = %lu, SRT = %lu\n",
  74                         (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
  75                         (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
  76                pr_alert("  SF = %lu, AR = %lu\n",
  77                         (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
  78                         (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
  79        } else {
  80                pr_alert("  ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK);
  81        }
  82
  83        pr_alert("  CM = %lu, WnR = %lu\n",
  84                 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
  85                 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT);
  86}
  87
  88static void mem_abort_decode(unsigned int esr)
  89{
  90        pr_alert("Mem abort info:\n");
  91
  92        pr_alert("  ESR = 0x%08x\n", esr);
  93        pr_alert("  EC = 0x%02lx: %s, IL = %u bits\n",
  94                 ESR_ELx_EC(esr), esr_get_class_string(esr),
  95                 (esr & ESR_ELx_IL) ? 32 : 16);
  96        pr_alert("  SET = %lu, FnV = %lu\n",
  97                 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
  98                 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
  99        pr_alert("  EA = %lu, S1PTW = %lu\n",
 100                 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
 101                 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
 102        pr_alert("  FSC = 0x%02x: %s\n", (esr & ESR_ELx_FSC),
 103                 esr_to_fault_info(esr)->name);
 104
 105        if (esr_is_data_abort(esr))
 106                data_abort_decode(esr);
 107}
 108
 109static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm)
 110{
 111        /* Either init_pg_dir or swapper_pg_dir */
 112        if (mm == &init_mm)
 113                return __pa_symbol(mm->pgd);
 114
 115        return (unsigned long)virt_to_phys(mm->pgd);
 116}
 117
 118/*
 119 * Dump out the page tables associated with 'addr' in the currently active mm.
 120 */
 121static void show_pte(unsigned long addr)
 122{
 123        struct mm_struct *mm;
 124        pgd_t *pgdp;
 125        pgd_t pgd;
 126
 127        if (is_ttbr0_addr(addr)) {
 128                /* TTBR0 */
 129                mm = current->active_mm;
 130                if (mm == &init_mm) {
 131                        pr_alert("[%016lx] user address but active_mm is swapper\n",
 132                                 addr);
 133                        return;
 134                }
 135        } else if (is_ttbr1_addr(addr)) {
 136                /* TTBR1 */
 137                mm = &init_mm;
 138        } else {
 139                pr_alert("[%016lx] address between user and kernel address ranges\n",
 140                         addr);
 141                return;
 142        }
 143
 144        pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n",
 145                 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
 146                 vabits_actual, mm_to_pgd_phys(mm));
 147        pgdp = pgd_offset(mm, addr);
 148        pgd = READ_ONCE(*pgdp);
 149        pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd));
 150
 151        do {
 152                p4d_t *p4dp, p4d;
 153                pud_t *pudp, pud;
 154                pmd_t *pmdp, pmd;
 155                pte_t *ptep, pte;
 156
 157                if (pgd_none(pgd) || pgd_bad(pgd))
 158                        break;
 159
 160                p4dp = p4d_offset(pgdp, addr);
 161                p4d = READ_ONCE(*p4dp);
 162                pr_cont(", p4d=%016llx", p4d_val(p4d));
 163                if (p4d_none(p4d) || p4d_bad(p4d))
 164                        break;
 165
 166                pudp = pud_offset(p4dp, addr);
 167                pud = READ_ONCE(*pudp);
 168                pr_cont(", pud=%016llx", pud_val(pud));
 169                if (pud_none(pud) || pud_bad(pud))
 170                        break;
 171
 172                pmdp = pmd_offset(pudp, addr);
 173                pmd = READ_ONCE(*pmdp);
 174                pr_cont(", pmd=%016llx", pmd_val(pmd));
 175                if (pmd_none(pmd) || pmd_bad(pmd))
 176                        break;
 177
 178                ptep = pte_offset_map(pmdp, addr);
 179                pte = READ_ONCE(*ptep);
 180                pr_cont(", pte=%016llx", pte_val(pte));
 181                pte_unmap(ptep);
 182        } while(0);
 183
 184        pr_cont("\n");
 185}
 186
 187/*
 188 * This function sets the access flags (dirty, accessed), as well as write
 189 * permission, and only to a more permissive setting.
 190 *
 191 * It needs to cope with hardware update of the accessed/dirty state by other
 192 * agents in the system and can safely skip the __sync_icache_dcache() call as,
 193 * like set_pte_at(), the PTE is never changed from no-exec to exec here.
 194 *
 195 * Returns whether or not the PTE actually changed.
 196 */
 197int ptep_set_access_flags(struct vm_area_struct *vma,
 198                          unsigned long address, pte_t *ptep,
 199                          pte_t entry, int dirty)
 200{
 201        pteval_t old_pteval, pteval;
 202        pte_t pte = READ_ONCE(*ptep);
 203
 204        if (pte_same(pte, entry))
 205                return 0;
 206
 207        /* only preserve the access flags and write permission */
 208        pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
 209
 210        /*
 211         * Setting the flags must be done atomically to avoid racing with the
 212         * hardware update of the access/dirty state. The PTE_RDONLY bit must
 213         * be set to the most permissive (lowest value) of *ptep and entry
 214         * (calculated as: a & b == ~(~a | ~b)).
 215         */
 216        pte_val(entry) ^= PTE_RDONLY;
 217        pteval = pte_val(pte);
 218        do {
 219                old_pteval = pteval;
 220                pteval ^= PTE_RDONLY;
 221                pteval |= pte_val(entry);
 222                pteval ^= PTE_RDONLY;
 223                pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
 224        } while (pteval != old_pteval);
 225
 226        /* Invalidate a stale read-only entry */
 227        if (dirty)
 228                flush_tlb_page(vma, address);
 229        return 1;
 230}
 231
 232static bool is_el1_instruction_abort(unsigned int esr)
 233{
 234        return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
 235}
 236
 237static bool is_el1_data_abort(unsigned int esr)
 238{
 239        return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR;
 240}
 241
 242static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr,
 243                                           struct pt_regs *regs)
 244{
 245        unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE;
 246
 247        if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr))
 248                return false;
 249
 250        if (fsc_type == ESR_ELx_FSC_PERM)
 251                return true;
 252
 253        if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
 254                return fsc_type == ESR_ELx_FSC_FAULT &&
 255                        (regs->pstate & PSR_PAN_BIT);
 256
 257        return false;
 258}
 259
 260static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
 261                                                        unsigned int esr,
 262                                                        struct pt_regs *regs)
 263{
 264        unsigned long flags;
 265        u64 par, dfsc;
 266
 267        if (!is_el1_data_abort(esr) ||
 268            (esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT)
 269                return false;
 270
 271        local_irq_save(flags);
 272        asm volatile("at s1e1r, %0" :: "r" (addr));
 273        isb();
 274        par = read_sysreg_par();
 275        local_irq_restore(flags);
 276
 277        /*
 278         * If we now have a valid translation, treat the translation fault as
 279         * spurious.
 280         */
 281        if (!(par & SYS_PAR_EL1_F))
 282                return true;
 283
 284        /*
 285         * If we got a different type of fault from the AT instruction,
 286         * treat the translation fault as spurious.
 287         */
 288        dfsc = FIELD_GET(SYS_PAR_EL1_FST, par);
 289        return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT;
 290}
 291
 292static void die_kernel_fault(const char *msg, unsigned long addr,
 293                             unsigned int esr, struct pt_regs *regs)
 294{
 295        bust_spinlocks(1);
 296
 297        pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg,
 298                 addr);
 299
 300        mem_abort_decode(esr);
 301
 302        show_pte(addr);
 303        die("Oops", regs, esr);
 304        bust_spinlocks(0);
 305        do_exit(SIGKILL);
 306}
 307
 308#ifdef CONFIG_KASAN_HW_TAGS
 309static void report_tag_fault(unsigned long addr, unsigned int esr,
 310                             struct pt_regs *regs)
 311{
 312        /*
 313         * SAS bits aren't set for all faults reported in EL1, so we can't
 314         * find out access size.
 315         */
 316        bool is_write = !!(esr & ESR_ELx_WNR);
 317        kasan_report(addr, 0, is_write, regs->pc);
 318}
 319#else
 320/* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */
 321static inline void report_tag_fault(unsigned long addr, unsigned int esr,
 322                                    struct pt_regs *regs) { }
 323#endif
 324
 325static void do_tag_recovery(unsigned long addr, unsigned int esr,
 326                           struct pt_regs *regs)
 327{
 328
 329        report_tag_fault(addr, esr, regs);
 330
 331        /*
 332         * Disable MTE Tag Checking on the local CPU for the current EL.
 333         * It will be done lazily on the other CPUs when they will hit a
 334         * tag fault.
 335         */
 336        sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_NONE);
 337        isb();
 338}
 339
 340static bool is_el1_mte_sync_tag_check_fault(unsigned int esr)
 341{
 342        unsigned int fsc = esr & ESR_ELx_FSC;
 343
 344        if (!is_el1_data_abort(esr))
 345                return false;
 346
 347        if (fsc == ESR_ELx_FSC_MTE)
 348                return true;
 349
 350        return false;
 351}
 352
 353static void __do_kernel_fault(unsigned long addr, unsigned int esr,
 354                              struct pt_regs *regs)
 355{
 356        const char *msg;
 357
 358        /*
 359         * Are we prepared to handle this kernel fault?
 360         * We are almost certainly not prepared to handle instruction faults.
 361         */
 362        if (!is_el1_instruction_abort(esr) && fixup_exception(regs))
 363                return;
 364
 365        if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),
 366            "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr))
 367                return;
 368
 369        if (is_el1_mte_sync_tag_check_fault(esr)) {
 370                do_tag_recovery(addr, esr, regs);
 371
 372                return;
 373        }
 374
 375        if (is_el1_permission_fault(addr, esr, regs)) {
 376                if (esr & ESR_ELx_WNR)
 377                        msg = "write to read-only memory";
 378                else if (is_el1_instruction_abort(esr))
 379                        msg = "execute from non-executable memory";
 380                else
 381                        msg = "read from unreadable memory";
 382        } else if (addr < PAGE_SIZE) {
 383                msg = "NULL pointer dereference";
 384        } else {
 385                if (kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs))
 386                        return;
 387
 388                msg = "paging request";
 389        }
 390
 391        die_kernel_fault(msg, addr, esr, regs);
 392}
 393
 394static void set_thread_esr(unsigned long address, unsigned int esr)
 395{
 396        current->thread.fault_address = address;
 397
 398        /*
 399         * If the faulting address is in the kernel, we must sanitize the ESR.
 400         * From userspace's point of view, kernel-only mappings don't exist
 401         * at all, so we report them as level 0 translation faults.
 402         * (This is not quite the way that "no mapping there at all" behaves:
 403         * an alignment fault not caused by the memory type would take
 404         * precedence over translation fault for a real access to empty
 405         * space. Unfortunately we can't easily distinguish "alignment fault
 406         * not caused by memory type" from "alignment fault caused by memory
 407         * type", so we ignore this wrinkle and just return the translation
 408         * fault.)
 409         */
 410        if (!is_ttbr0_addr(current->thread.fault_address)) {
 411                switch (ESR_ELx_EC(esr)) {
 412                case ESR_ELx_EC_DABT_LOW:
 413                        /*
 414                         * These bits provide only information about the
 415                         * faulting instruction, which userspace knows already.
 416                         * We explicitly clear bits which are architecturally
 417                         * RES0 in case they are given meanings in future.
 418                         * We always report the ESR as if the fault was taken
 419                         * to EL1 and so ISV and the bits in ISS[23:14] are
 420                         * clear. (In fact it always will be a fault to EL1.)
 421                         */
 422                        esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |
 423                                ESR_ELx_CM | ESR_ELx_WNR;
 424                        esr |= ESR_ELx_FSC_FAULT;
 425                        break;
 426                case ESR_ELx_EC_IABT_LOW:
 427                        /*
 428                         * Claim a level 0 translation fault.
 429                         * All other bits are architecturally RES0 for faults
 430                         * reported with that DFSC value, so we clear them.
 431                         */
 432                        esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;
 433                        esr |= ESR_ELx_FSC_FAULT;
 434                        break;
 435                default:
 436                        /*
 437                         * This should never happen (entry.S only brings us
 438                         * into this code for insn and data aborts from a lower
 439                         * exception level). Fail safe by not providing an ESR
 440                         * context record at all.
 441                         */
 442                        WARN(1, "ESR 0x%x is not DABT or IABT from EL0\n", esr);
 443                        esr = 0;
 444                        break;
 445                }
 446        }
 447
 448        current->thread.fault_code = esr;
 449}
 450
 451static void do_bad_area(unsigned long far, unsigned int esr,
 452                        struct pt_regs *regs)
 453{
 454        unsigned long addr = untagged_addr(far);
 455
 456        /*
 457         * If we are in kernel mode at this point, we have no context to
 458         * handle this fault with.
 459         */
 460        if (user_mode(regs)) {
 461                const struct fault_info *inf = esr_to_fault_info(esr);
 462
 463                set_thread_esr(addr, esr);
 464                arm64_force_sig_fault(inf->sig, inf->code, far, inf->name);
 465        } else {
 466                __do_kernel_fault(addr, esr, regs);
 467        }
 468}
 469
 470#define VM_FAULT_BADMAP         0x010000
 471#define VM_FAULT_BADACCESS      0x020000
 472
 473static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr,
 474                                  unsigned int mm_flags, unsigned long vm_flags,
 475                                  struct pt_regs *regs)
 476{
 477        struct vm_area_struct *vma = find_vma(mm, addr);
 478
 479        if (unlikely(!vma))
 480                return VM_FAULT_BADMAP;
 481
 482        /*
 483         * Ok, we have a good vm_area for this memory access, so we can handle
 484         * it.
 485         */
 486        if (unlikely(vma->vm_start > addr)) {
 487                if (!(vma->vm_flags & VM_GROWSDOWN))
 488                        return VM_FAULT_BADMAP;
 489                if (expand_stack(vma, addr))
 490                        return VM_FAULT_BADMAP;
 491        }
 492
 493        /*
 494         * Check that the permissions on the VMA allow for the fault which
 495         * occurred.
 496         */
 497        if (!(vma->vm_flags & vm_flags))
 498                return VM_FAULT_BADACCESS;
 499        return handle_mm_fault(vma, addr, mm_flags, regs);
 500}
 501
 502static bool is_el0_instruction_abort(unsigned int esr)
 503{
 504        return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
 505}
 506
 507/*
 508 * Note: not valid for EL1 DC IVAC, but we never use that such that it
 509 * should fault. EL0 cannot issue DC IVAC (undef).
 510 */
 511static bool is_write_abort(unsigned int esr)
 512{
 513        return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM);
 514}
 515
 516static int __kprobes do_page_fault(unsigned long far, unsigned int esr,
 517                                   struct pt_regs *regs)
 518{
 519        const struct fault_info *inf;
 520        struct mm_struct *mm = current->mm;
 521        vm_fault_t fault;
 522        unsigned long vm_flags;
 523        unsigned int mm_flags = FAULT_FLAG_DEFAULT;
 524        unsigned long addr = untagged_addr(far);
 525
 526        if (kprobe_page_fault(regs, esr))
 527                return 0;
 528
 529        /*
 530         * If we're in an interrupt or have no user context, we must not take
 531         * the fault.
 532         */
 533        if (faulthandler_disabled() || !mm)
 534                goto no_context;
 535
 536        if (user_mode(regs))
 537                mm_flags |= FAULT_FLAG_USER;
 538
 539        /*
 540         * vm_flags tells us what bits we must have in vma->vm_flags
 541         * for the fault to be benign, __do_page_fault() would check
 542         * vma->vm_flags & vm_flags and returns an error if the
 543         * intersection is empty
 544         */
 545        if (is_el0_instruction_abort(esr)) {
 546                /* It was exec fault */
 547                vm_flags = VM_EXEC;
 548                mm_flags |= FAULT_FLAG_INSTRUCTION;
 549        } else if (is_write_abort(esr)) {
 550                /* It was write fault */
 551                vm_flags = VM_WRITE;
 552                mm_flags |= FAULT_FLAG_WRITE;
 553        } else {
 554                /* It was read fault */
 555                vm_flags = VM_READ;
 556                /* Write implies read */
 557                vm_flags |= VM_WRITE;
 558                /* If EPAN is absent then exec implies read */
 559                if (!cpus_have_const_cap(ARM64_HAS_EPAN))
 560                        vm_flags |= VM_EXEC;
 561        }
 562
 563        if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
 564                if (is_el1_instruction_abort(esr))
 565                        die_kernel_fault("execution of user memory",
 566                                         addr, esr, regs);
 567
 568                if (!search_exception_tables(regs->pc))
 569                        die_kernel_fault("access to user memory outside uaccess routines",
 570                                         addr, esr, regs);
 571        }
 572
 573        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
 574
 575        /*
 576         * As per x86, we may deadlock here. However, since the kernel only
 577         * validly references user space from well defined areas of the code,
 578         * we can bug out early if this is from code which shouldn't.
 579         */
 580        if (!mmap_read_trylock(mm)) {
 581                if (!user_mode(regs) && !search_exception_tables(regs->pc))
 582                        goto no_context;
 583retry:
 584                mmap_read_lock(mm);
 585        } else {
 586                /*
 587                 * The above mmap_read_trylock() might have succeeded in which
 588                 * case, we'll have missed the might_sleep() from down_read().
 589                 */
 590                might_sleep();
 591#ifdef CONFIG_DEBUG_VM
 592                if (!user_mode(regs) && !search_exception_tables(regs->pc)) {
 593                        mmap_read_unlock(mm);
 594                        goto no_context;
 595                }
 596#endif
 597        }
 598
 599        fault = __do_page_fault(mm, addr, mm_flags, vm_flags, regs);
 600
 601        /* Quick path to respond to signals */
 602        if (fault_signal_pending(fault, regs)) {
 603                if (!user_mode(regs))
 604                        goto no_context;
 605                return 0;
 606        }
 607
 608        if (fault & VM_FAULT_RETRY) {
 609                if (mm_flags & FAULT_FLAG_ALLOW_RETRY) {
 610                        mm_flags |= FAULT_FLAG_TRIED;
 611                        goto retry;
 612                }
 613        }
 614        mmap_read_unlock(mm);
 615
 616        /*
 617         * Handle the "normal" (no error) case first.
 618         */
 619        if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP |
 620                              VM_FAULT_BADACCESS))))
 621                return 0;
 622
 623        /*
 624         * If we are in kernel mode at this point, we have no context to
 625         * handle this fault with.
 626         */
 627        if (!user_mode(regs))
 628                goto no_context;
 629
 630        if (fault & VM_FAULT_OOM) {
 631                /*
 632                 * We ran out of memory, call the OOM killer, and return to
 633                 * userspace (which will retry the fault, or kill us if we got
 634                 * oom-killed).
 635                 */
 636                pagefault_out_of_memory();
 637                return 0;
 638        }
 639
 640        inf = esr_to_fault_info(esr);
 641        set_thread_esr(addr, esr);
 642        if (fault & VM_FAULT_SIGBUS) {
 643                /*
 644                 * We had some memory, but were unable to successfully fix up
 645                 * this page fault.
 646                 */
 647                arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name);
 648        } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) {
 649                unsigned int lsb;
 650
 651                lsb = PAGE_SHIFT;
 652                if (fault & VM_FAULT_HWPOISON_LARGE)
 653                        lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
 654
 655                arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name);
 656        } else {
 657                /*
 658                 * Something tried to access memory that isn't in our memory
 659                 * map.
 660                 */
 661                arm64_force_sig_fault(SIGSEGV,
 662                                      fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR,
 663                                      far, inf->name);
 664        }
 665
 666        return 0;
 667
 668no_context:
 669        __do_kernel_fault(addr, esr, regs);
 670        return 0;
 671}
 672
 673static int __kprobes do_translation_fault(unsigned long far,
 674                                          unsigned int esr,
 675                                          struct pt_regs *regs)
 676{
 677        unsigned long addr = untagged_addr(far);
 678
 679        if (is_ttbr0_addr(addr))
 680                return do_page_fault(far, esr, regs);
 681
 682        do_bad_area(far, esr, regs);
 683        return 0;
 684}
 685
 686static int do_alignment_fault(unsigned long far, unsigned int esr,
 687                              struct pt_regs *regs)
 688{
 689        do_bad_area(far, esr, regs);
 690        return 0;
 691}
 692
 693static int do_bad(unsigned long far, unsigned int esr, struct pt_regs *regs)
 694{
 695        return 1; /* "fault" */
 696}
 697
 698static int do_sea(unsigned long far, unsigned int esr, struct pt_regs *regs)
 699{
 700        const struct fault_info *inf;
 701        unsigned long siaddr;
 702
 703        inf = esr_to_fault_info(esr);
 704
 705        if (user_mode(regs) && apei_claim_sea(regs) == 0) {
 706                /*
 707                 * APEI claimed this as a firmware-first notification.
 708                 * Some processing deferred to task_work before ret_to_user().
 709                 */
 710                return 0;
 711        }
 712
 713        if (esr & ESR_ELx_FnV) {
 714                siaddr = 0;
 715        } else {
 716                /*
 717                 * The architecture specifies that the tag bits of FAR_EL1 are
 718                 * UNKNOWN for synchronous external aborts. Mask them out now
 719                 * so that userspace doesn't see them.
 720                 */
 721                siaddr  = untagged_addr(far);
 722        }
 723        arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr);
 724
 725        return 0;
 726}
 727
 728static int do_tag_check_fault(unsigned long far, unsigned int esr,
 729                              struct pt_regs *regs)
 730{
 731        /*
 732         * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
 733         * for tag check faults. Set them to corresponding bits in the untagged
 734         * address.
 735         */
 736        far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
 737        do_bad_area(far, esr, regs);
 738        return 0;
 739}
 740
 741static const struct fault_info fault_info[] = {
 742        { do_bad,               SIGKILL, SI_KERNEL,     "ttbr address size fault"       },
 743        { do_bad,               SIGKILL, SI_KERNEL,     "level 1 address size fault"    },
 744        { do_bad,               SIGKILL, SI_KERNEL,     "level 2 address size fault"    },
 745        { do_bad,               SIGKILL, SI_KERNEL,     "level 3 address size fault"    },
 746        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "level 0 translation fault"     },
 747        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "level 1 translation fault"     },
 748        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "level 2 translation fault"     },
 749        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "level 3 translation fault"     },
 750        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 8"                     },
 751        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "level 1 access flag fault"     },
 752        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "level 2 access flag fault"     },
 753        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "level 3 access flag fault"     },
 754        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 12"                    },
 755        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "level 1 permission fault"      },
 756        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "level 2 permission fault"      },
 757        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "level 3 permission fault"      },
 758        { do_sea,               SIGBUS,  BUS_OBJERR,    "synchronous external abort"    },
 759        { do_tag_check_fault,   SIGSEGV, SEGV_MTESERR,  "synchronous tag check fault"   },
 760        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 18"                    },
 761        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 19"                    },
 762        { do_sea,               SIGKILL, SI_KERNEL,     "level 0 (translation table walk)"      },
 763        { do_sea,               SIGKILL, SI_KERNEL,     "level 1 (translation table walk)"      },
 764        { do_sea,               SIGKILL, SI_KERNEL,     "level 2 (translation table walk)"      },
 765        { do_sea,               SIGKILL, SI_KERNEL,     "level 3 (translation table walk)"      },
 766        { do_sea,               SIGBUS,  BUS_OBJERR,    "synchronous parity or ECC error" },    // Reserved when RAS is implemented
 767        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 25"                    },
 768        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 26"                    },
 769        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 27"                    },
 770        { do_sea,               SIGKILL, SI_KERNEL,     "level 0 synchronous parity error (translation table walk)"     },      // Reserved when RAS is implemented
 771        { do_sea,               SIGKILL, SI_KERNEL,     "level 1 synchronous parity error (translation table walk)"     },      // Reserved when RAS is implemented
 772        { do_sea,               SIGKILL, SI_KERNEL,     "level 2 synchronous parity error (translation table walk)"     },      // Reserved when RAS is implemented
 773        { do_sea,               SIGKILL, SI_KERNEL,     "level 3 synchronous parity error (translation table walk)"     },      // Reserved when RAS is implemented
 774        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 32"                    },
 775        { do_alignment_fault,   SIGBUS,  BUS_ADRALN,    "alignment fault"               },
 776        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 34"                    },
 777        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 35"                    },
 778        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 36"                    },
 779        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 37"                    },
 780        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 38"                    },
 781        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 39"                    },
 782        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 40"                    },
 783        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 41"                    },
 784        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 42"                    },
 785        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 43"                    },
 786        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 44"                    },
 787        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 45"                    },
 788        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 46"                    },
 789        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 47"                    },
 790        { do_bad,               SIGKILL, SI_KERNEL,     "TLB conflict abort"            },
 791        { do_bad,               SIGKILL, SI_KERNEL,     "Unsupported atomic hardware update fault"      },
 792        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 50"                    },
 793        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 51"                    },
 794        { do_bad,               SIGKILL, SI_KERNEL,     "implementation fault (lockdown abort)" },
 795        { do_bad,               SIGBUS,  BUS_OBJERR,    "implementation fault (unsupported exclusive)" },
 796        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 54"                    },
 797        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 55"                    },
 798        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 56"                    },
 799        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 57"                    },
 800        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 58"                    },
 801        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 59"                    },
 802        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 60"                    },
 803        { do_bad,               SIGKILL, SI_KERNEL,     "section domain fault"          },
 804        { do_bad,               SIGKILL, SI_KERNEL,     "page domain fault"             },
 805        { do_bad,               SIGKILL, SI_KERNEL,     "unknown 63"                    },
 806};
 807
 808void do_mem_abort(unsigned long far, unsigned int esr, struct pt_regs *regs)
 809{
 810        const struct fault_info *inf = esr_to_fault_info(esr);
 811        unsigned long addr = untagged_addr(far);
 812
 813        if (!inf->fn(far, esr, regs))
 814                return;
 815
 816        if (!user_mode(regs)) {
 817                pr_alert("Unhandled fault at 0x%016lx\n", addr);
 818                mem_abort_decode(esr);
 819                show_pte(addr);
 820        }
 821
 822        /*
 823         * At this point we have an unrecognized fault type whose tag bits may
 824         * have been defined as UNKNOWN. Therefore we only expose the untagged
 825         * address to the signal handler.
 826         */
 827        arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr);
 828}
 829NOKPROBE_SYMBOL(do_mem_abort);
 830
 831void do_sp_pc_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs)
 832{
 833        arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN,
 834                         addr, esr);
 835}
 836NOKPROBE_SYMBOL(do_sp_pc_abort);
 837
 838int __init early_brk64(unsigned long addr, unsigned int esr,
 839                       struct pt_regs *regs);
 840
 841/*
 842 * __refdata because early_brk64 is __init, but the reference to it is
 843 * clobbered at arch_initcall time.
 844 * See traps.c and debug-monitors.c:debug_traps_init().
 845 */
 846static struct fault_info __refdata debug_fault_info[] = {
 847        { do_bad,       SIGTRAP,        TRAP_HWBKPT,    "hardware breakpoint"   },
 848        { do_bad,       SIGTRAP,        TRAP_HWBKPT,    "hardware single-step"  },
 849        { do_bad,       SIGTRAP,        TRAP_HWBKPT,    "hardware watchpoint"   },
 850        { do_bad,       SIGKILL,        SI_KERNEL,      "unknown 3"             },
 851        { do_bad,       SIGTRAP,        TRAP_BRKPT,     "aarch32 BKPT"          },
 852        { do_bad,       SIGKILL,        SI_KERNEL,      "aarch32 vector catch"  },
 853        { early_brk64,  SIGTRAP,        TRAP_BRKPT,     "aarch64 BRK"           },
 854        { do_bad,       SIGKILL,        SI_KERNEL,      "unknown 7"             },
 855};
 856
 857void __init hook_debug_fault_code(int nr,
 858                                  int (*fn)(unsigned long, unsigned int, struct pt_regs *),
 859                                  int sig, int code, const char *name)
 860{
 861        BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
 862
 863        debug_fault_info[nr].fn         = fn;
 864        debug_fault_info[nr].sig        = sig;
 865        debug_fault_info[nr].code       = code;
 866        debug_fault_info[nr].name       = name;
 867}
 868
 869/*
 870 * In debug exception context, we explicitly disable preemption despite
 871 * having interrupts disabled.
 872 * This serves two purposes: it makes it much less likely that we would
 873 * accidentally schedule in exception context and it will force a warning
 874 * if we somehow manage to schedule by accident.
 875 */
 876static void debug_exception_enter(struct pt_regs *regs)
 877{
 878        preempt_disable();
 879
 880        /* This code is a bit fragile.  Test it. */
 881        RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");
 882}
 883NOKPROBE_SYMBOL(debug_exception_enter);
 884
 885static void debug_exception_exit(struct pt_regs *regs)
 886{
 887        preempt_enable_no_resched();
 888}
 889NOKPROBE_SYMBOL(debug_exception_exit);
 890
 891void do_debug_exception(unsigned long addr_if_watchpoint, unsigned int esr,
 892                        struct pt_regs *regs)
 893{
 894        const struct fault_info *inf = esr_to_debug_fault_info(esr);
 895        unsigned long pc = instruction_pointer(regs);
 896
 897        debug_exception_enter(regs);
 898
 899        if (user_mode(regs) && !is_ttbr0_addr(pc))
 900                arm64_apply_bp_hardening();
 901
 902        if (inf->fn(addr_if_watchpoint, esr, regs)) {
 903                arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr);
 904        }
 905
 906        debug_exception_exit(regs);
 907}
 908NOKPROBE_SYMBOL(do_debug_exception);
 909
 910/*
 911 * Used during anonymous page fault handling.
 912 */
 913struct page *alloc_zeroed_user_highpage_movable(struct vm_area_struct *vma,
 914                                                unsigned long vaddr)
 915{
 916        gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO;
 917
 918        /*
 919         * If the page is mapped with PROT_MTE, initialise the tags at the
 920         * point of allocation and page zeroing as this is usually faster than
 921         * separate DC ZVA and STGM.
 922         */
 923        if (vma->vm_flags & VM_MTE)
 924                flags |= __GFP_ZEROTAGS;
 925
 926        return alloc_page_vma(flags, vma, vaddr);
 927}
 928
 929void tag_clear_highpage(struct page *page)
 930{
 931        mte_zero_clear_page_tags(page_address(page));
 932        page_kasan_tag_reset(page);
 933        set_bit(PG_mte_tagged, &page->flags);
 934}
 935