LXR linux/arch/mips/include/asm/addrspace.h

   1/*
   2 * This file is subject to the terms and conditions of the GNU General Public
   3 * License.  See the file "COPYING" in the main directory of this archive
   4 * for more details.
   5 *
   6 * Copyright (C) 1996, 99 Ralf Baechle
   7 * Copyright (C) 2000, 2002  Maciej W. Rozycki
   8 * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
   9 */
  10#ifndef _ASM_ADDRSPACE_H
  11#define _ASM_ADDRSPACE_H
  12
  13#include <spaces.h>
  14
  15/*
  16 *  Configure language
  17 */
  18#ifdef __ASSEMBLY__
  19#define _ATYPE_
  20#define _ATYPE32_
  21#define _ATYPE64_
  22#define _CONST64_(x)    x
  23#else
  24#define _ATYPE_         __PTRDIFF_TYPE__
  25#define _ATYPE32_       int
  26#define _ATYPE64_       __s64
  27#ifdef CONFIG_64BIT
  28#define _CONST64_(x)    x ## L
  29#else
  30#define _CONST64_(x)    x ## LL
  31#endif
  32#endif
  33
  34/*
  35 *  32-bit MIPS address spaces
  36 */
  37#ifdef __ASSEMBLY__
  38#define _ACAST32_
  39#define _ACAST64_
  40#else
  41#define _ACAST32_               (_ATYPE_)(_ATYPE32_)    /* widen if necessary */
  42#define _ACAST64_               (_ATYPE64_)             /* do _not_ narrow */
  43#endif
  44
  45/*
  46 * Returns the kernel segment base of a given address
  47 */
  48#define KSEGX(a)                ((_ACAST32_(a)) & _ACAST32_(0xe0000000))
  49
  50/*
  51 * Returns the physical address of a CKSEGx / XKPHYS address
  52 */
  53#define CPHYSADDR(a)            ((_ACAST32_(a)) & 0x1fffffff)
  54#define XPHYSADDR(a)            ((_ACAST64_(a)) &                       \
  55                                 _CONST64_(0x0000ffffffffffff))
  56
  57#ifdef CONFIG_64BIT
  58
  59/*
  60 * Memory segments (64bit kernel mode addresses)
  61 * The compatibility segments use the full 64-bit sign extended value.  Note
  62 * the R8000 doesn't have them so don't reference these in generic MIPS code.
  63 */
  64#define XKUSEG                  _CONST64_(0x0000000000000000)
  65#define XKSSEG                  _CONST64_(0x4000000000000000)
  66#define XKPHYS                  _CONST64_(0x8000000000000000)
  67#define XKSEG                   _CONST64_(0xc000000000000000)
  68#define CKSEG0                  _CONST64_(0xffffffff80000000)
  69#define CKSEG1                  _CONST64_(0xffffffffa0000000)
  70#define CKSSEG                  _CONST64_(0xffffffffc0000000)
  71#define CKSEG3                  _CONST64_(0xffffffffe0000000)
  72
  73#define CKSEG0ADDR(a)           (CPHYSADDR(a) | CKSEG0)
  74#define CKSEG1ADDR(a)           (CPHYSADDR(a) | CKSEG1)
  75#define CKSEG2ADDR(a)           (CPHYSADDR(a) | CKSEG2)
  76#define CKSEG3ADDR(a)           (CPHYSADDR(a) | CKSEG3)
  77
  78#else
  79
  80#define CKSEG0ADDR(a)           (CPHYSADDR(a) | KSEG0)
  81#define CKSEG1ADDR(a)           (CPHYSADDR(a) | KSEG1)
  82#define CKSEG2ADDR(a)           (CPHYSADDR(a) | KSEG2)
  83#define CKSEG3ADDR(a)           (CPHYSADDR(a) | KSEG3)
  84
  85/*
  86 * Map an address to a certain kernel segment
  87 */
  88#define KSEG0ADDR(a)            (CPHYSADDR(a) | KSEG0)
  89#define KSEG1ADDR(a)            (CPHYSADDR(a) | KSEG1)
  90#define KSEG2ADDR(a)            (CPHYSADDR(a) | KSEG2)
  91#define KSEG3ADDR(a)            (CPHYSADDR(a) | KSEG3)
  92
  93/*
  94 * Memory segments (32bit kernel mode addresses)
  95 * These are the traditional names used in the 32-bit universe.
  96 */
  97#define KUSEG                   0x00000000
  98#define KSEG0                   0x80000000
  99#define KSEG1                   0xa0000000
 100#define KSEG2                   0xc0000000
 101#define KSEG3                   0xe0000000
 102
 103#define CKUSEG                  0x00000000
 104#define CKSEG0                  0x80000000
 105#define CKSEG1                  0xa0000000
 106#define CKSEG2                  0xc0000000
 107#define CKSEG3                  0xe0000000
 108
 109#endif
 110
 111/*
 112 * Cache modes for XKPHYS address conversion macros
 113 */
 114#define K_CALG_COH_EXCL1_NOL2   0
 115#define K_CALG_COH_SHRL1_NOL2   1
 116#define K_CALG_UNCACHED         2
 117#define K_CALG_NONCOHERENT      3
 118#define K_CALG_COH_EXCL         4
 119#define K_CALG_COH_SHAREABLE    5
 120#define K_CALG_NOTUSED          6
 121#define K_CALG_UNCACHED_ACCEL   7
 122
 123/*
 124 * 64-bit address conversions
 125 */
 126#define PHYS_TO_XKSEG_UNCACHED(p)       PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
 127#define PHYS_TO_XKSEG_CACHED(p)         PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
 128#define XKPHYS_TO_PHYS(p)               ((p) & TO_PHYS_MASK)
 129#define PHYS_TO_XKPHYS(cm, a)           (XKPHYS | (_ACAST64_(cm) << 59) | (a))
 130
 131/*
 132 * The ultimate limited of the 64-bit MIPS architecture:  2 bits for selecting
 133 * the region, 3 bits for the CCA mode.  This leaves 59 bits of which the
 134 * R8000 implements most with its 48-bit physical address space.
 135 */
 136#define TO_PHYS_MASK    _CONST64_(0x07ffffffffffffff)   /* 2^^59 - 1 */
 137
 138#define COMPAT_K1BASE32         _CONST64_(0xffffffffa0000000)
 139#define PHYS_TO_COMPATK1(x)     ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
 140
 141#define KDM_TO_PHYS(x)          (_ACAST64_ (x) & TO_PHYS_MASK)
 142#define PHYS_TO_K0(x)           (_ACAST64_ (x) | CAC_BASE)
 143
 144#endif /* _ASM_ADDRSPACE_H */
 145