LXR linux/arch/mips/include/asm/jazzdma.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Helpfile for jazzdma.c -- Mips Jazz R4030 DMA controller support
   4 */
   5#ifndef _ASM_JAZZDMA_H
   6#define _ASM_JAZZDMA_H
   7
   8/*
   9 * Prototypes and macros
  10 */
  11extern unsigned long vdma_alloc(unsigned long paddr, unsigned long size);
  12extern int vdma_free(unsigned long laddr);
  13extern unsigned long vdma_phys2log(unsigned long paddr);
  14extern unsigned long vdma_log2phys(unsigned long laddr);
  15extern void vdma_stats(void);           /* for debugging only */
  16
  17extern void vdma_enable(int channel);
  18extern void vdma_disable(int channel);
  19extern void vdma_set_mode(int channel, int mode);
  20extern void vdma_set_addr(int channel, long addr);
  21extern void vdma_set_count(int channel, int count);
  22extern int vdma_get_residue(int channel);
  23extern int vdma_get_enable(int channel);
  24
  25/*
  26 * some definitions used by the driver functions
  27 */
  28#define VDMA_PAGESIZE           4096
  29#define VDMA_PGTBL_ENTRIES      4096
  30#define VDMA_PGTBL_SIZE         (sizeof(VDMA_PGTBL_ENTRY) * VDMA_PGTBL_ENTRIES)
  31#define VDMA_PAGE_EMPTY         0xff000000
  32
  33/*
  34 * Macros to get page no. and offset of a given address
  35 * Note that VDMA_PAGE() works for physical addresses only
  36 */
  37#define VDMA_PAGE(a)            ((unsigned int)(a) >> 12)
  38#define VDMA_OFFSET(a)          ((unsigned int)(a) & (VDMA_PAGESIZE-1))
  39
  40/*
  41 * VDMA pagetable entry description
  42 */
  43typedef volatile struct VDMA_PGTBL_ENTRY {
  44        unsigned int frame;             /* physical frame no. */
  45        unsigned int owner;             /* owner of this entry (0=free) */
  46} VDMA_PGTBL_ENTRY;
  47
  48
  49/*
  50 * DMA channel control registers
  51 * in the R4030 MCT_ADR chip
  52 */
  53#define JAZZ_R4030_CHNL_MODE    0xE0000100      /* 8 DMA Channel Mode Registers, */
  54                                                /* 0xE0000100,120,140... */
  55#define JAZZ_R4030_CHNL_ENABLE  0xE0000108      /* 8 DMA Channel Enable Regs, */
  56                                                /* 0xE0000108,128,148... */
  57#define JAZZ_R4030_CHNL_COUNT   0xE0000110      /* 8 DMA Channel Byte Cnt Regs, */
  58                                                /* 0xE0000110,130,150... */
  59#define JAZZ_R4030_CHNL_ADDR    0xE0000118      /* 8 DMA Channel Address Regs, */
  60                                                /* 0xE0000118,138,158... */
  61
  62/* channel enable register bits */
  63
  64#define R4030_CHNL_ENABLE        (1<<0)
  65#define R4030_CHNL_WRITE         (1<<1)
  66#define R4030_TC_INTR            (1<<8)
  67#define R4030_MEM_INTR           (1<<9)
  68#define R4030_ADDR_INTR          (1<<10)
  69
  70/*
  71 * Channel mode register bits
  72 */
  73#define R4030_MODE_ATIME_40      (0) /* device access time on remote bus */
  74#define R4030_MODE_ATIME_80      (1)
  75#define R4030_MODE_ATIME_120     (2)
  76#define R4030_MODE_ATIME_160     (3)
  77#define R4030_MODE_ATIME_200     (4)
  78#define R4030_MODE_ATIME_240     (5)
  79#define R4030_MODE_ATIME_280     (6)
  80#define R4030_MODE_ATIME_320     (7)
  81#define R4030_MODE_WIDTH_8       (1<<3) /* device data bus width */
  82#define R4030_MODE_WIDTH_16      (2<<3)
  83#define R4030_MODE_WIDTH_32      (3<<3)
  84#define R4030_MODE_INTR_EN       (1<<5)
  85#define R4030_MODE_BURST         (1<<6) /* Rev. 2 only */
  86#define R4030_MODE_FAST_ACK      (1<<7) /* Rev. 2 only */
  87
  88#endif /* _ASM_JAZZDMA_H */
  89