1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle 7 * Copyright (C) 2007 Maciej W. Rozycki 8 */ 9#ifndef _ASM_WAR_H 10#define _ASM_WAR_H 11 12/* 13 * Work around certain R4000 CPU errata (as implemented by GCC): 14 * 15 * - A double-word or a variable shift may give an incorrect result 16 * if executed immediately after starting an integer division: 17 * "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", 18 * erratum #28 19 * "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum 20 * #19 21 * 22 * - A double-word or a variable shift may give an incorrect result 23 * if executed while an integer multiplication is in progress: 24 * "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", 25 * errata #16 & #28 26 * 27 * - An integer division may give an incorrect result if started in 28 * a delay slot of a taken branch or a jump: 29 * "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", 30 * erratum #52 31 */ 32#ifdef CONFIG_CPU_R4000_WORKAROUNDS 33#define R4000_WAR 1 34#else 35#define R4000_WAR 0 36#endif 37 38/* 39 * Work around certain R4400 CPU errata (as implemented by GCC): 40 * 41 * - A double-word or a variable shift may give an incorrect result 42 * if executed immediately after starting an integer division: 43 * "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10 44 * "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4 45 */ 46#ifdef CONFIG_CPU_R4400_WORKAROUNDS 47#define R4400_WAR 1 48#else 49#define R4400_WAR 0 50#endif 51 52/* 53 * Work around the "daddi" and "daddiu" CPU errata: 54 * 55 * - The `daddi' instruction fails to trap on overflow. 56 * "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", 57 * erratum #23 58 * 59 * - The `daddiu' instruction can produce an incorrect result. 60 * "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", 61 * erratum #41 62 * "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum 63 * #15 64 * "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7 65 * "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5 66 */ 67#ifdef CONFIG_CPU_DADDI_WORKAROUNDS 68#define DADDI_WAR 1 69#else 70#define DADDI_WAR 0 71#endif 72 73#endif /* _ASM_WAR_H */ 74