1/* SPDX-License-Identifier: GPL-2.0 */ 2// Copyright (C) 2012 ARM Limited 3// Copyright (C) 2005-2017 Andes Technology Corporation 4#ifndef __ASM_VDSO_DATAPAGE_H 5#define __ASM_VDSO_DATAPAGE_H 6 7#ifdef __KERNEL__ 8 9#ifndef __ASSEMBLY__ 10 11struct vdso_data { 12 bool cycle_count_down; /* timer cyclye counter is decrease with time */ 13 u32 cycle_count_offset; /* offset of timer cycle counter register */ 14 u32 seq_count; /* sequence count - odd during updates */ 15 u32 xtime_coarse_sec; /* coarse time */ 16 u32 xtime_coarse_nsec; 17 18 u32 wtm_clock_sec; /* wall to monotonic offset */ 19 u32 wtm_clock_nsec; 20 u32 xtime_clock_sec; /* CLOCK_REALTIME - seconds */ 21 u32 cs_mult; /* clocksource multiplier */ 22 u32 cs_shift; /* Cycle to nanosecond divisor (power of two) */ 23 u32 hrtimer_res; /* hrtimer resolution */ 24 25 u64 cs_cycle_last; /* last cycle value */ 26 u64 cs_mask; /* clocksource mask */ 27 28 u64 xtime_clock_nsec; /* CLOCK_REALTIME sub-ns base */ 29 u32 tz_minuteswest; /* timezone info for gettimeofday(2) */ 30 u32 tz_dsttime; 31}; 32 33#endif /* !__ASSEMBLY__ */ 34 35#endif /* __KERNEL__ */ 36 37#endif /* __ASM_VDSO_DATAPAGE_H */ 38