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14#include <linux/sched.h>
15#include <linux/sched/debug.h>
16#include <linux/kernel.h>
17#include <linux/string.h>
18#include <linux/errno.h>
19#include <linux/ptrace.h>
20#include <linux/timer.h>
21#include <linux/delay.h>
22#include <linux/mm.h>
23#include <linux/module.h>
24#include <linux/smp.h>
25#include <linux/spinlock.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/console.h>
29#include <linux/bug.h>
30#include <linux/ratelimit.h>
31#include <linux/uaccess.h>
32#include <linux/kdebug.h>
33
34#include <asm/assembly.h>
35#include <asm/io.h>
36#include <asm/irq.h>
37#include <asm/traps.h>
38#include <asm/unaligned.h>
39#include <linux/atomic.h>
40#include <asm/smp.h>
41#include <asm/pdc.h>
42#include <asm/pdc_chassis.h>
43#include <asm/unwind.h>
44#include <asm/tlbflush.h>
45#include <asm/cacheflush.h>
46#include <linux/kgdb.h>
47#include <linux/kprobes.h>
48
49#include "../math-emu/math-emu.h"
50
51static void parisc_show_stack(struct task_struct *task,
52 struct pt_regs *regs, const char *loglvl);
53
54static int printbinary(char *buf, unsigned long x, int nbits)
55{
56 unsigned long mask = 1UL << (nbits - 1);
57 while (mask != 0) {
58 *buf++ = (mask & x ? '1' : '0');
59 mask >>= 1;
60 }
61 *buf = '\0';
62
63 return nbits;
64}
65
66#ifdef CONFIG_64BIT
67#define RFMT "%016lx"
68#else
69#define RFMT "%08lx"
70#endif
71#define FFMT "%016llx"
72
73#define PRINTREGS(lvl,r,f,fmt,x) \
74 printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \
75 lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \
76 (r)[(x)+2], (r)[(x)+3])
77
78static void print_gr(const char *level, struct pt_regs *regs)
79{
80 int i;
81 char buf[64];
82
83 printk("%s\n", level);
84 printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level);
85 printbinary(buf, regs->gr[0], 32);
86 printk("%sPSW: %s %s\n", level, buf, print_tainted());
87
88 for (i = 0; i < 32; i += 4)
89 PRINTREGS(level, regs->gr, "r", RFMT, i);
90}
91
92static void print_fr(const char *level, struct pt_regs *regs)
93{
94 int i;
95 char buf[64];
96 struct { u32 sw[2]; } s;
97
98
99
100
101
102
103
104 asm volatile ("fstd %%fr0,0(%1) \n\t"
105 "fldd 0(%1),%%fr0 \n\t"
106 : "=m" (s) : "r" (&s) : "r0");
107
108 printk("%s\n", level);
109 printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level);
110 printbinary(buf, s.sw[0], 32);
111 printk("%sFPSR: %s\n", level, buf);
112 printk("%sFPER1: %08x\n", level, s.sw[1]);
113
114
115 for (i = 0; i < 32; i += 4)
116 PRINTREGS(level, regs->fr, "fr", FFMT, i);
117}
118
119void show_regs(struct pt_regs *regs)
120{
121 int i, user;
122 const char *level;
123 unsigned long cr30, cr31;
124
125 user = user_mode(regs);
126 level = user ? KERN_DEBUG : KERN_CRIT;
127
128 show_regs_print_info(level);
129
130 print_gr(level, regs);
131
132 for (i = 0; i < 8; i += 4)
133 PRINTREGS(level, regs->sr, "sr", RFMT, i);
134
135 if (user)
136 print_fr(level, regs);
137
138 cr30 = mfctl(30);
139 cr31 = mfctl(31);
140 printk("%s\n", level);
141 printk("%sIASQ: " RFMT " " RFMT " IAOQ: " RFMT " " RFMT "\n",
142 level, regs->iasq[0], regs->iasq[1], regs->iaoq[0], regs->iaoq[1]);
143 printk("%s IIR: %08lx ISR: " RFMT " IOR: " RFMT "\n",
144 level, regs->iir, regs->isr, regs->ior);
145 printk("%s CPU: %8d CR30: " RFMT " CR31: " RFMT "\n",
146 level, current_thread_info()->cpu, cr30, cr31);
147 printk("%s ORIG_R28: " RFMT "\n", level, regs->orig_r28);
148
149 if (user) {
150 printk("%s IAOQ[0]: " RFMT "\n", level, regs->iaoq[0]);
151 printk("%s IAOQ[1]: " RFMT "\n", level, regs->iaoq[1]);
152 printk("%s RP(r2): " RFMT "\n", level, regs->gr[2]);
153 } else {
154 printk("%s IAOQ[0]: %pS\n", level, (void *) regs->iaoq[0]);
155 printk("%s IAOQ[1]: %pS\n", level, (void *) regs->iaoq[1]);
156 printk("%s RP(r2): %pS\n", level, (void *) regs->gr[2]);
157
158 parisc_show_stack(current, regs, KERN_DEFAULT);
159 }
160}
161
162static DEFINE_RATELIMIT_STATE(_hppa_rs,
163 DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST);
164
165#define parisc_printk_ratelimited(critical, regs, fmt, ...) { \
166 if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \
167 printk(fmt, ##__VA_ARGS__); \
168 show_regs(regs); \
169 } \
170}
171
172
173static void do_show_stack(struct unwind_frame_info *info, const char *loglvl)
174{
175 int i = 1;
176
177 printk("%sBacktrace:\n", loglvl);
178 while (i <= MAX_UNWIND_ENTRIES) {
179 if (unwind_once(info) < 0 || info->ip == 0)
180 break;
181
182 if (__kernel_text_address(info->ip)) {
183 printk("%s [<" RFMT ">] %pS\n",
184 loglvl, info->ip, (void *) info->ip);
185 i++;
186 }
187 }
188 printk("%s\n", loglvl);
189}
190
191static void parisc_show_stack(struct task_struct *task,
192 struct pt_regs *regs, const char *loglvl)
193{
194 struct unwind_frame_info info;
195
196 unwind_frame_init_task(&info, task, regs);
197
198 do_show_stack(&info, loglvl);
199}
200
201void show_stack(struct task_struct *t, unsigned long *sp, const char *loglvl)
202{
203 parisc_show_stack(t, NULL, loglvl);
204}
205
206int is_valid_bugaddr(unsigned long iaoq)
207{
208 return 1;
209}
210
211void die_if_kernel(char *str, struct pt_regs *regs, long err)
212{
213 if (user_mode(regs)) {
214 if (err == 0)
215 return;
216
217 parisc_printk_ratelimited(1, regs,
218 KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n",
219 current->comm, task_pid_nr(current), str, err, regs->iaoq[0]);
220
221 return;
222 }
223
224 bust_spinlocks(1);
225
226 oops_enter();
227
228
229 if (err) printk(KERN_CRIT
230 " _______________________________ \n"
231 " < Your System ate a SPARC! Gah! >\n"
232 " ------------------------------- \n"
233 " \\ ^__^\n"
234 " (__)\\ )\\/\\\n"
235 " U ||----w |\n"
236 " || ||\n");
237
238
239 pdc_emergency_unlock();
240
241
242
243
244
245 if (!console_drivers)
246 pdc_console_restart();
247
248 if (err)
249 printk(KERN_CRIT "%s (pid %d): %s (code %ld)\n",
250 current->comm, task_pid_nr(current), str, err);
251
252
253 if (current->thread.flags & PARISC_KERNEL_DEATH) {
254 printk(KERN_CRIT "%s() recursion detected.\n", __func__);
255 local_irq_enable();
256 while (1);
257 }
258 current->thread.flags |= PARISC_KERNEL_DEATH;
259
260 show_regs(regs);
261 dump_stack();
262 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
263
264 if (in_interrupt())
265 panic("Fatal exception in interrupt");
266
267 if (panic_on_oops)
268 panic("Fatal exception");
269
270 oops_exit();
271 do_exit(SIGSEGV);
272}
273
274
275#define GDB_BREAK_INSN 0x10004
276static void handle_gdb_break(struct pt_regs *regs, int wot)
277{
278 force_sig_fault(SIGTRAP, wot,
279 (void __user *) (regs->iaoq[0] & ~3));
280}
281
282static void handle_break(struct pt_regs *regs)
283{
284 unsigned iir = regs->iir;
285
286 if (unlikely(iir == PARISC_BUG_BREAK_INSN && !user_mode(regs))) {
287
288 enum bug_trap_type tt;
289 tt = report_bug(regs->iaoq[0] & ~3, regs);
290 if (tt == BUG_TRAP_TYPE_WARN) {
291 regs->iaoq[0] += 4;
292 regs->iaoq[1] += 4;
293 return;
294 }
295 die_if_kernel("Unknown kernel breakpoint", regs,
296 (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0);
297 }
298
299#ifdef CONFIG_KPROBES
300 if (unlikely(iir == PARISC_KPROBES_BREAK_INSN)) {
301 parisc_kprobe_break_handler(regs);
302 return;
303 }
304
305#endif
306
307#ifdef CONFIG_KGDB
308 if (unlikely(iir == PARISC_KGDB_COMPILED_BREAK_INSN ||
309 iir == PARISC_KGDB_BREAK_INSN)) {
310 kgdb_handle_exception(9, SIGTRAP, 0, regs);
311 return;
312 }
313#endif
314
315 if (unlikely(iir != GDB_BREAK_INSN))
316 parisc_printk_ratelimited(0, regs,
317 KERN_DEBUG "break %d,%d: pid=%d command='%s'\n",
318 iir & 31, (iir>>13) & ((1<<13)-1),
319 task_pid_nr(current), current->comm);
320
321
322 handle_gdb_break(regs, TRAP_BRKPT);
323}
324
325static void default_trap(int code, struct pt_regs *regs)
326{
327 printk(KERN_ERR "Trap %d on CPU %d\n", code, smp_processor_id());
328 show_regs(regs);
329}
330
331void (*cpu_lpmc) (int code, struct pt_regs *regs) __read_mostly = default_trap;
332
333
334void transfer_pim_to_trap_frame(struct pt_regs *regs)
335{
336 register int i;
337 extern unsigned int hpmc_pim_data[];
338 struct pdc_hpmc_pim_11 *pim_narrow;
339 struct pdc_hpmc_pim_20 *pim_wide;
340
341 if (boot_cpu_data.cpu_type >= pcxu) {
342
343 pim_wide = (struct pdc_hpmc_pim_20 *)hpmc_pim_data;
344
345
346
347
348
349
350
351
352 regs->gr[0] = pim_wide->cr[22];
353
354 for (i = 1; i < 32; i++)
355 regs->gr[i] = pim_wide->gr[i];
356
357 for (i = 0; i < 32; i++)
358 regs->fr[i] = pim_wide->fr[i];
359
360 for (i = 0; i < 8; i++)
361 regs->sr[i] = pim_wide->sr[i];
362
363 regs->iasq[0] = pim_wide->cr[17];
364 regs->iasq[1] = pim_wide->iasq_back;
365 regs->iaoq[0] = pim_wide->cr[18];
366 regs->iaoq[1] = pim_wide->iaoq_back;
367
368 regs->sar = pim_wide->cr[11];
369 regs->iir = pim_wide->cr[19];
370 regs->isr = pim_wide->cr[20];
371 regs->ior = pim_wide->cr[21];
372 }
373 else {
374 pim_narrow = (struct pdc_hpmc_pim_11 *)hpmc_pim_data;
375
376 regs->gr[0] = pim_narrow->cr[22];
377
378 for (i = 1; i < 32; i++)
379 regs->gr[i] = pim_narrow->gr[i];
380
381 for (i = 0; i < 32; i++)
382 regs->fr[i] = pim_narrow->fr[i];
383
384 for (i = 0; i < 8; i++)
385 regs->sr[i] = pim_narrow->sr[i];
386
387 regs->iasq[0] = pim_narrow->cr[17];
388 regs->iasq[1] = pim_narrow->iasq_back;
389 regs->iaoq[0] = pim_narrow->cr[18];
390 regs->iaoq[1] = pim_narrow->iaoq_back;
391
392 regs->sar = pim_narrow->cr[11];
393 regs->iir = pim_narrow->cr[19];
394 regs->isr = pim_narrow->cr[20];
395 regs->ior = pim_narrow->cr[21];
396 }
397
398
399
400
401
402
403 regs->ksp = 0;
404 regs->kpc = 0;
405 regs->orig_r28 = 0;
406}
407
408
409
410
411
412
413
414void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long offset)
415{
416 static DEFINE_SPINLOCK(terminate_lock);
417
418 (void)notify_die(DIE_OOPS, msg, regs, 0, code, SIGTRAP);
419 bust_spinlocks(1);
420
421 set_eiem(0);
422 local_irq_disable();
423 spin_lock(&terminate_lock);
424
425
426 pdc_emergency_unlock();
427
428
429 if (!console_drivers)
430 pdc_console_restart();
431
432
433 switch(code){
434
435 case 1:
436 transfer_pim_to_trap_frame(regs);
437 break;
438
439 default:
440 break;
441
442 }
443
444 {
445
446 struct unwind_frame_info info;
447 unwind_frame_init(&info, current, regs);
448 do_show_stack(&info, KERN_CRIT);
449 }
450
451 printk("\n");
452 pr_crit("%s: Code=%d (%s) at addr " RFMT "\n",
453 msg, code, trap_name(code), offset);
454 show_regs(regs);
455
456 spin_unlock(&terminate_lock);
457
458
459
460
461 pdc_soft_power_button(0);
462
463
464
465
466
467
468
469
470
471
472 panic(msg);
473}
474
475void notrace handle_interruption(int code, struct pt_regs *regs)
476{
477 unsigned long fault_address = 0;
478 unsigned long fault_space = 0;
479 int si_code;
480
481 if (code == 1)
482 pdc_console_restart();
483 else
484 local_irq_enable();
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506 if (((unsigned long)regs->iaoq[0] & 3) &&
507 ((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) {
508
509 regs->iaoq[0] = 0 | 3;
510 regs->iaoq[1] = regs->iaoq[0] + 4;
511 regs->iasq[0] = regs->iasq[1] = regs->sr[7];
512 regs->gr[0] &= ~PSW_B;
513 return;
514 }
515
516#if 0
517 printk(KERN_CRIT "Interruption # %d\n", code);
518#endif
519
520 switch(code) {
521
522 case 1:
523
524
525
526 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC);
527
528 parisc_terminate("High Priority Machine Check (HPMC)",
529 regs, code, 0);
530
531
532 case 2:
533
534 printk(KERN_CRIT "Power failure interrupt !\n");
535 return;
536
537 case 3:
538
539 regs->gr[0] &= ~PSW_R;
540
541#ifdef CONFIG_KPROBES
542 if (parisc_kprobe_ss_handler(regs))
543 return;
544#endif
545
546#ifdef CONFIG_KGDB
547 if (kgdb_single_step) {
548 kgdb_handle_exception(0, SIGTRAP, 0, regs);
549 return;
550 }
551#endif
552
553 if (user_space(regs))
554 handle_gdb_break(regs, TRAP_TRACE);
555
556 return;
557
558 case 5:
559
560 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC);
561
562 flush_cache_all();
563 flush_tlb_all();
564 cpu_lpmc(5, regs);
565 return;
566
567 case PARISC_ITLB_TRAP:
568
569 fault_address = regs->iaoq[0];
570 fault_space = regs->iasq[0];
571 break;
572
573 case 8:
574
575 die_if_kernel("Illegal instruction", regs, code);
576 si_code = ILL_ILLOPC;
577 goto give_sigill;
578
579 case 9:
580
581 handle_break(regs);
582 return;
583
584 case 10:
585
586 die_if_kernel("Privileged operation", regs, code);
587 si_code = ILL_PRVOPC;
588 goto give_sigill;
589
590 case 11:
591
592 if ((regs->iir & 0xffdfffe0) == 0x034008a0) {
593
594
595
596
597
598 if (regs->iir & 0x00200000)
599 regs->gr[regs->iir & 0x1f] = mfctl(27);
600 else
601 regs->gr[regs->iir & 0x1f] = mfctl(26);
602
603 regs->iaoq[0] = regs->iaoq[1];
604 regs->iaoq[1] += 4;
605 regs->iasq[0] = regs->iasq[1];
606 return;
607 }
608
609 die_if_kernel("Privileged register usage", regs, code);
610 si_code = ILL_PRVREG;
611 give_sigill:
612 force_sig_fault(SIGILL, si_code,
613 (void __user *) regs->iaoq[0]);
614 return;
615
616 case 12:
617
618 force_sig_fault(SIGFPE, FPE_INTOVF,
619 (void __user *) regs->iaoq[0]);
620 return;
621
622 case 13:
623
624
625
626 if(user_mode(regs)){
627
628
629
630 force_sig_fault(SIGFPE, FPE_CONDTRAP,
631 (void __user *) regs->iaoq[0]);
632 return;
633 }
634
635 break;
636
637 case 14:
638
639 die_if_kernel("Floating point exception", regs, 0);
640 __inc_irq_stat(irq_fpassist_count);
641 handle_fpe(regs);
642 return;
643
644 case 15:
645
646 fallthrough;
647 case 16:
648
649
650
651 fallthrough;
652 case 17:
653
654
655
656
657
658
659
660
661
662
663
664 fault_address = regs->ior;
665 fault_space = regs->isr;
666 break;
667
668 case 18:
669
670
671 if (check_unaligned(regs)) {
672 handle_unaligned(regs);
673 return;
674 }
675 fallthrough;
676 case 26:
677
678 fault_address = regs->ior;
679 fault_space = regs->isr;
680 break;
681
682 case 19:
683
684 regs->gr[0] |= PSW_X;
685 fallthrough;
686 case 21:
687
688 handle_gdb_break(regs, TRAP_HWBKPT);
689 return;
690
691 case 25:
692
693 regs->gr[0] &= ~PSW_T;
694 if (user_space(regs))
695 handle_gdb_break(regs, TRAP_BRANCH);
696
697
698
699 return;
700
701 case 7:
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716 if (user_mode(regs)) {
717 struct vm_area_struct *vma;
718
719 mmap_read_lock(current->mm);
720 vma = find_vma(current->mm,regs->iaoq[0]);
721 if (vma && (regs->iaoq[0] >= vma->vm_start)
722 && (vma->vm_flags & VM_EXEC)) {
723
724 fault_address = regs->iaoq[0];
725 fault_space = regs->iasq[0];
726
727 mmap_read_unlock(current->mm);
728 break;
729 }
730 mmap_read_unlock(current->mm);
731 }
732 fallthrough;
733 case 27:
734
735 if (code == 27 && !user_mode(regs) &&
736 fixup_exception(regs))
737 return;
738
739 die_if_kernel("Protection id trap", regs, code);
740 force_sig_fault(SIGSEGV, SEGV_MAPERR,
741 (code == 7)?
742 ((void __user *) regs->iaoq[0]) :
743 ((void __user *) regs->ior));
744 return;
745
746 case 28:
747
748 handle_unaligned(regs);
749 return;
750
751 default:
752 if (user_mode(regs)) {
753 parisc_printk_ratelimited(0, regs, KERN_DEBUG
754 "handle_interruption() pid=%d command='%s'\n",
755 task_pid_nr(current), current->comm);
756
757 force_sig_fault(SIGBUS, BUS_OBJERR,
758 (void __user *)regs->ior);
759 return;
760 }
761 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
762
763 parisc_terminate("Unexpected interruption", regs, code, 0);
764
765 }
766
767 if (user_mode(regs)) {
768 if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) {
769 parisc_printk_ratelimited(0, regs, KERN_DEBUG
770 "User fault %d on space 0x%08lx, pid=%d command='%s'\n",
771 code, fault_space,
772 task_pid_nr(current), current->comm);
773 force_sig_fault(SIGSEGV, SEGV_MAPERR,
774 (void __user *)regs->ior);
775 return;
776 }
777 }
778 else {
779
780
781
782
783
784
785 if (fault_space == 0 && !faulthandler_disabled())
786 {
787
788 if (fixup_exception(regs))
789 return;
790 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
791 parisc_terminate("Kernel Fault", regs, code, fault_address);
792 }
793 }
794
795 do_page_fault(regs, code, fault_address);
796}
797
798
799void __init initialize_ivt(const void *iva)
800{
801 extern const u32 os_hpmc[];
802
803 int i;
804 u32 check = 0;
805 u32 *ivap;
806 u32 *hpmcp;
807 u32 instr;
808
809 if (strcmp((const char *)iva, "cows can fly"))
810 panic("IVT invalid");
811
812 ivap = (u32 *)iva;
813
814 for (i = 0; i < 8; i++)
815 *ivap++ = 0;
816
817
818
819
820
821
822 if (pdc_instr(&instr) == PDC_OK)
823 ivap[0] = instr;
824
825
826
827
828
829
830
831
832
833
834
835
836
837 ivap[6] = (u32)__pa(os_hpmc);
838
839 hpmcp = (u32 *)os_hpmc;
840
841 for (i=0; i<8; i++)
842 check += ivap[i];
843
844 ivap[5] = -check;
845 pr_debug("initialize_ivt: IVA[6] = 0x%08x\n", ivap[6]);
846}
847
848
849
850
851void __init early_trap_init(void)
852{
853 extern const void fault_vector_20;
854
855#ifndef CONFIG_64BIT
856 extern const void fault_vector_11;
857 initialize_ivt(&fault_vector_11);
858#endif
859
860 initialize_ivt(&fault_vector_20);
861}
862