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12#include <asm/ppc_asm.h>
13#include <asm/kvm_asm.h>
14#include <asm/reg.h>
15#include <asm/page.h>
16#include <asm/asm-offsets.h>
17#include <asm/exception-64s.h>
18#include <asm/ppc-opcode.h>
19#include <asm/asm-compat.h>
20#include <asm/feature-fixups.h>
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31_GLOBAL(__kvmppc_vcore_entry)
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34 mflr r0
35 std r0,PPC_LR_STKOFF(r1)
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38 stdu r1, -SWITCH_FRAME_SIZE(r1)
39
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41 SAVE_NVGPRS(r1)
42 mfcr r3
43 std r3, _CCR(r1)
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45
46 mfspr r3, SPRN_DSCR
47 std r3, HSTATE_DSCR(r13)
48
49BEGIN_FTR_SECTION
50
51 mfspr r3, SPRN_DABR
52 std r3, HSTATE_DABR(r13)
53END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
54
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56 bl kvmhv_save_host_pmu
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64 ld r5, HSTATE_KVM_VCORE(r13)
65 ld r6, VCORE_KVM(r5)
66 ld r9, KVM_HOST_LPCR(r6)
67 ori r8, r9, LPCR_HDICE
68 mtspr SPRN_LPCR, r8
69 isync
70 mfspr r8,SPRN_DEC
71 mftb r7
72 extsw r8,r8
73 mtspr SPRN_HDEC,r8
74 add r8,r8,r7
75 std r8,HSTATE_DECEXP(r13)
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78 bl kvmppc_hv_entry_trampoline
79 nop
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98 REST_NVGPRS(r1)
99 ld r4, _CCR(r1)
100 mtcr r4
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102 addi r1, r1, SWITCH_FRAME_SIZE
103 ld r0, PPC_LR_STKOFF(r1)
104 mtlr r0
105 blr
106
107_GLOBAL(kvmhv_save_host_pmu)
108BEGIN_FTR_SECTION
109
110 li r3, -1
111 clrrdi r3, r3, 10
112 mfspr r8, SPRN_MMCR2
113 mtspr SPRN_MMCR2, r3
114 isync
115END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
116 li r3, 1
117 sldi r3, r3, 31
118 mfspr r7, SPRN_MMCR0
119 mtspr SPRN_MMCR0, r3
120 mfspr r6, SPRN_MMCRA
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122 li r5, 0
123 mtspr SPRN_MMCRA, r5
124 isync
125 lbz r5, PACA_PMCINUSE(r13)
126 cmpwi r5, 0
127 beq 31f
128 mfspr r5, SPRN_MMCR1
129 mfspr r9, SPRN_SIAR
130 mfspr r10, SPRN_SDAR
131 std r7, HSTATE_MMCR0(r13)
132 std r5, HSTATE_MMCR1(r13)
133 std r6, HSTATE_MMCRA(r13)
134 std r9, HSTATE_SIAR(r13)
135 std r10, HSTATE_SDAR(r13)
136BEGIN_FTR_SECTION
137 mfspr r9, SPRN_SIER
138 std r8, HSTATE_MMCR2(r13)
139 std r9, HSTATE_SIER(r13)
140END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
141BEGIN_FTR_SECTION
142 mfspr r5, SPRN_MMCR3
143 mfspr r6, SPRN_SIER2
144 mfspr r7, SPRN_SIER3
145 std r5, HSTATE_MMCR3(r13)
146 std r6, HSTATE_SIER2(r13)
147 std r7, HSTATE_SIER3(r13)
148END_FTR_SECTION_IFSET(CPU_FTR_ARCH_31)
149 mfspr r3, SPRN_PMC1
150 mfspr r5, SPRN_PMC2
151 mfspr r6, SPRN_PMC3
152 mfspr r7, SPRN_PMC4
153 mfspr r8, SPRN_PMC5
154 mfspr r9, SPRN_PMC6
155 stw r3, HSTATE_PMC1(r13)
156 stw r5, HSTATE_PMC2(r13)
157 stw r6, HSTATE_PMC3(r13)
158 stw r7, HSTATE_PMC4(r13)
159 stw r8, HSTATE_PMC5(r13)
160 stw r9, HSTATE_PMC6(r13)
16131: blr
162