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13#include <linux/errno.h>
14#include <linux/err.h>
15#include <linux/kvm_host.h>
16#include <linux/gfp.h>
17#include <linux/module.h>
18#include <linux/vmalloc.h>
19#include <linux/fs.h>
20
21#include <asm/cputable.h>
22#include <linux/uaccess.h>
23#include <asm/interrupt.h>
24#include <asm/kvm_ppc.h>
25#include <asm/cacheflush.h>
26#include <asm/dbell.h>
27#include <asm/hw_irq.h>
28#include <asm/irq.h>
29#include <asm/time.h>
30
31#include "timing.h"
32#include "booke.h"
33
34#define CREATE_TRACE_POINTS
35#include "trace_booke.h"
36
37unsigned long kvmppc_booke_handlers;
38
39const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
40 KVM_GENERIC_VM_STATS(),
41 STATS_DESC_ICOUNTER(VM, num_2M_pages),
42 STATS_DESC_ICOUNTER(VM, num_1G_pages)
43};
44
45const struct kvm_stats_header kvm_vm_stats_header = {
46 .name_size = KVM_STATS_NAME_SIZE,
47 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
48 .id_offset = sizeof(struct kvm_stats_header),
49 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
50 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
51 sizeof(kvm_vm_stats_desc),
52};
53
54const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
55 KVM_GENERIC_VCPU_STATS(),
56 STATS_DESC_COUNTER(VCPU, sum_exits),
57 STATS_DESC_COUNTER(VCPU, mmio_exits),
58 STATS_DESC_COUNTER(VCPU, signal_exits),
59 STATS_DESC_COUNTER(VCPU, light_exits),
60 STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits),
61 STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits),
62 STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits),
63 STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits),
64 STATS_DESC_COUNTER(VCPU, syscall_exits),
65 STATS_DESC_COUNTER(VCPU, isi_exits),
66 STATS_DESC_COUNTER(VCPU, dsi_exits),
67 STATS_DESC_COUNTER(VCPU, emulated_inst_exits),
68 STATS_DESC_COUNTER(VCPU, dec_exits),
69 STATS_DESC_COUNTER(VCPU, ext_intr_exits),
70 STATS_DESC_COUNTER(VCPU, halt_successful_wait),
71 STATS_DESC_COUNTER(VCPU, dbell_exits),
72 STATS_DESC_COUNTER(VCPU, gdbell_exits),
73 STATS_DESC_COUNTER(VCPU, ld),
74 STATS_DESC_COUNTER(VCPU, st),
75 STATS_DESC_COUNTER(VCPU, pthru_all),
76 STATS_DESC_COUNTER(VCPU, pthru_host),
77 STATS_DESC_COUNTER(VCPU, pthru_bad_aff)
78};
79
80const struct kvm_stats_header kvm_vcpu_stats_header = {
81 .name_size = KVM_STATS_NAME_SIZE,
82 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
83 .id_offset = sizeof(struct kvm_stats_header),
84 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
85 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
86 sizeof(kvm_vcpu_stats_desc),
87};
88
89
90void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
91{
92 int i;
93
94 printk("pc: %08lx msr: %08llx\n", vcpu->arch.regs.nip,
95 vcpu->arch.shared->msr);
96 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.regs.link,
97 vcpu->arch.regs.ctr);
98 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
99 vcpu->arch.shared->srr1);
100
101 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
102
103 for (i = 0; i < 32; i += 4) {
104 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
105 kvmppc_get_gpr(vcpu, i),
106 kvmppc_get_gpr(vcpu, i+1),
107 kvmppc_get_gpr(vcpu, i+2),
108 kvmppc_get_gpr(vcpu, i+3));
109 }
110}
111
112#ifdef CONFIG_SPE
113void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
114{
115 preempt_disable();
116 enable_kernel_spe();
117 kvmppc_save_guest_spe(vcpu);
118 disable_kernel_spe();
119 vcpu->arch.shadow_msr &= ~MSR_SPE;
120 preempt_enable();
121}
122
123static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
124{
125 preempt_disable();
126 enable_kernel_spe();
127 kvmppc_load_guest_spe(vcpu);
128 disable_kernel_spe();
129 vcpu->arch.shadow_msr |= MSR_SPE;
130 preempt_enable();
131}
132
133static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
134{
135 if (vcpu->arch.shared->msr & MSR_SPE) {
136 if (!(vcpu->arch.shadow_msr & MSR_SPE))
137 kvmppc_vcpu_enable_spe(vcpu);
138 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
139 kvmppc_vcpu_disable_spe(vcpu);
140 }
141}
142#else
143static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
144{
145}
146#endif
147
148
149
150
151
152
153
154
155
156
157static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu)
158{
159#ifdef CONFIG_PPC_FPU
160 if (!(current->thread.regs->msr & MSR_FP)) {
161 enable_kernel_fp();
162 load_fp_state(&vcpu->arch.fp);
163 disable_kernel_fp();
164 current->thread.fp_save_area = &vcpu->arch.fp;
165 current->thread.regs->msr |= MSR_FP;
166 }
167#endif
168}
169
170
171
172
173
174static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu)
175{
176#ifdef CONFIG_PPC_FPU
177 if (current->thread.regs->msr & MSR_FP)
178 giveup_fpu(current);
179 current->thread.fp_save_area = NULL;
180#endif
181}
182
183static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
184{
185#if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
186
187
188 vcpu->arch.shadow_msr &= ~MSR_FP;
189 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
190#endif
191}
192
193
194
195
196
197
198static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu)
199{
200#ifdef CONFIG_ALTIVEC
201 if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
202 if (!(current->thread.regs->msr & MSR_VEC)) {
203 enable_kernel_altivec();
204 load_vr_state(&vcpu->arch.vr);
205 disable_kernel_altivec();
206 current->thread.vr_save_area = &vcpu->arch.vr;
207 current->thread.regs->msr |= MSR_VEC;
208 }
209 }
210#endif
211}
212
213
214
215
216
217static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu)
218{
219#ifdef CONFIG_ALTIVEC
220 if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
221 if (current->thread.regs->msr & MSR_VEC)
222 giveup_altivec(current);
223 current->thread.vr_save_area = NULL;
224 }
225#endif
226}
227
228static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
229{
230
231#ifndef CONFIG_KVM_BOOKE_HV
232 vcpu->arch.shadow_msr &= ~MSR_DE;
233 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
234#endif
235
236
237 if (vcpu->guest_debug) {
238#ifdef CONFIG_KVM_BOOKE_HV
239
240
241
242
243 vcpu->arch.shared->msr |= MSR_DE;
244#else
245 vcpu->arch.shadow_msr |= MSR_DE;
246 vcpu->arch.shared->msr &= ~MSR_DE;
247#endif
248 }
249}
250
251
252
253
254
255void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
256{
257 u32 old_msr = vcpu->arch.shared->msr;
258
259#ifdef CONFIG_KVM_BOOKE_HV
260 new_msr |= MSR_GS;
261#endif
262
263 vcpu->arch.shared->msr = new_msr;
264
265 kvmppc_mmu_msr_notify(vcpu, old_msr);
266 kvmppc_vcpu_sync_spe(vcpu);
267 kvmppc_vcpu_sync_fpu(vcpu);
268 kvmppc_vcpu_sync_debug(vcpu);
269}
270
271static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
272 unsigned int priority)
273{
274 trace_kvm_booke_queue_irqprio(vcpu, priority);
275 set_bit(priority, &vcpu->arch.pending_exceptions);
276}
277
278void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
279 ulong dear_flags, ulong esr_flags)
280{
281 vcpu->arch.queued_dear = dear_flags;
282 vcpu->arch.queued_esr = esr_flags;
283 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
284}
285
286void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
287 ulong dear_flags, ulong esr_flags)
288{
289 vcpu->arch.queued_dear = dear_flags;
290 vcpu->arch.queued_esr = esr_flags;
291 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
292}
293
294void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu)
295{
296 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
297}
298
299void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags)
300{
301 vcpu->arch.queued_esr = esr_flags;
302 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
303}
304
305static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
306 ulong esr_flags)
307{
308 vcpu->arch.queued_dear = dear_flags;
309 vcpu->arch.queued_esr = esr_flags;
310 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
311}
312
313void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
314{
315 vcpu->arch.queued_esr = esr_flags;
316 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
317}
318
319void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
320{
321 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
322}
323
324#ifdef CONFIG_ALTIVEC
325void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
326{
327 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
328}
329#endif
330
331void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
332{
333 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
334}
335
336int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
337{
338 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
339}
340
341void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
342{
343 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
344}
345
346void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
347 struct kvm_interrupt *irq)
348{
349 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
350
351 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
352 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
353
354 kvmppc_booke_queue_irqprio(vcpu, prio);
355}
356
357void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
358{
359 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
360 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
361}
362
363static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
364{
365 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
366}
367
368static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
369{
370 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
371}
372
373void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu)
374{
375 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG);
376}
377
378void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu)
379{
380 clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions);
381}
382
383static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
384{
385 kvmppc_set_srr0(vcpu, srr0);
386 kvmppc_set_srr1(vcpu, srr1);
387}
388
389static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
390{
391 vcpu->arch.csrr0 = srr0;
392 vcpu->arch.csrr1 = srr1;
393}
394
395static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
396{
397 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
398 vcpu->arch.dsrr0 = srr0;
399 vcpu->arch.dsrr1 = srr1;
400 } else {
401 set_guest_csrr(vcpu, srr0, srr1);
402 }
403}
404
405static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
406{
407 vcpu->arch.mcsrr0 = srr0;
408 vcpu->arch.mcsrr1 = srr1;
409}
410
411
412static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
413 unsigned int priority)
414{
415 int allowed = 0;
416 ulong msr_mask = 0;
417 bool update_esr = false, update_dear = false, update_epr = false;
418 ulong crit_raw = vcpu->arch.shared->critical;
419 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
420 bool crit;
421 bool keep_irq = false;
422 enum int_class int_class;
423 ulong new_msr = vcpu->arch.shared->msr;
424
425
426 if (!(vcpu->arch.shared->msr & MSR_SF)) {
427 crit_raw &= 0xffffffff;
428 crit_r1 &= 0xffffffff;
429 }
430
431
432 crit = (crit_raw == crit_r1);
433
434 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
435
436 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
437 priority = BOOKE_IRQPRIO_EXTERNAL;
438 keep_irq = true;
439 }
440
441 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
442 update_epr = true;
443
444 switch (priority) {
445 case BOOKE_IRQPRIO_DTLB_MISS:
446 case BOOKE_IRQPRIO_DATA_STORAGE:
447 case BOOKE_IRQPRIO_ALIGNMENT:
448 update_dear = true;
449 fallthrough;
450 case BOOKE_IRQPRIO_INST_STORAGE:
451 case BOOKE_IRQPRIO_PROGRAM:
452 update_esr = true;
453 fallthrough;
454 case BOOKE_IRQPRIO_ITLB_MISS:
455 case BOOKE_IRQPRIO_SYSCALL:
456 case BOOKE_IRQPRIO_FP_UNAVAIL:
457#ifdef CONFIG_SPE_POSSIBLE
458 case BOOKE_IRQPRIO_SPE_UNAVAIL:
459 case BOOKE_IRQPRIO_SPE_FP_DATA:
460 case BOOKE_IRQPRIO_SPE_FP_ROUND:
461#endif
462#ifdef CONFIG_ALTIVEC
463 case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL:
464 case BOOKE_IRQPRIO_ALTIVEC_ASSIST:
465#endif
466 case BOOKE_IRQPRIO_AP_UNAVAIL:
467 allowed = 1;
468 msr_mask = MSR_CE | MSR_ME | MSR_DE;
469 int_class = INT_CLASS_NONCRIT;
470 break;
471 case BOOKE_IRQPRIO_WATCHDOG:
472 case BOOKE_IRQPRIO_CRITICAL:
473 case BOOKE_IRQPRIO_DBELL_CRIT:
474 allowed = vcpu->arch.shared->msr & MSR_CE;
475 allowed = allowed && !crit;
476 msr_mask = MSR_ME;
477 int_class = INT_CLASS_CRIT;
478 break;
479 case BOOKE_IRQPRIO_MACHINE_CHECK:
480 allowed = vcpu->arch.shared->msr & MSR_ME;
481 allowed = allowed && !crit;
482 int_class = INT_CLASS_MC;
483 break;
484 case BOOKE_IRQPRIO_DECREMENTER:
485 case BOOKE_IRQPRIO_FIT:
486 keep_irq = true;
487 fallthrough;
488 case BOOKE_IRQPRIO_EXTERNAL:
489 case BOOKE_IRQPRIO_DBELL:
490 allowed = vcpu->arch.shared->msr & MSR_EE;
491 allowed = allowed && !crit;
492 msr_mask = MSR_CE | MSR_ME | MSR_DE;
493 int_class = INT_CLASS_NONCRIT;
494 break;
495 case BOOKE_IRQPRIO_DEBUG:
496 allowed = vcpu->arch.shared->msr & MSR_DE;
497 allowed = allowed && !crit;
498 msr_mask = MSR_ME;
499 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
500 int_class = INT_CLASS_DBG;
501 else
502 int_class = INT_CLASS_CRIT;
503
504 break;
505 }
506
507 if (allowed) {
508 switch (int_class) {
509 case INT_CLASS_NONCRIT:
510 set_guest_srr(vcpu, vcpu->arch.regs.nip,
511 vcpu->arch.shared->msr);
512 break;
513 case INT_CLASS_CRIT:
514 set_guest_csrr(vcpu, vcpu->arch.regs.nip,
515 vcpu->arch.shared->msr);
516 break;
517 case INT_CLASS_DBG:
518 set_guest_dsrr(vcpu, vcpu->arch.regs.nip,
519 vcpu->arch.shared->msr);
520 break;
521 case INT_CLASS_MC:
522 set_guest_mcsrr(vcpu, vcpu->arch.regs.nip,
523 vcpu->arch.shared->msr);
524 break;
525 }
526
527 vcpu->arch.regs.nip = vcpu->arch.ivpr |
528 vcpu->arch.ivor[priority];
529 if (update_esr)
530 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr);
531 if (update_dear)
532 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear);
533 if (update_epr) {
534 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
535 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
536 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
537 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
538 kvmppc_mpic_set_epr(vcpu);
539 }
540 }
541
542 new_msr &= msr_mask;
543#if defined(CONFIG_64BIT)
544 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
545 new_msr |= MSR_CM;
546#endif
547 kvmppc_set_msr(vcpu, new_msr);
548
549 if (!keep_irq)
550 clear_bit(priority, &vcpu->arch.pending_exceptions);
551 }
552
553#ifdef CONFIG_KVM_BOOKE_HV
554
555
556
557
558
559 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
560 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
561 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
562 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
563 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
564 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
565#endif
566
567 return allowed;
568}
569
570
571
572
573
574
575static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
576{
577 u64 tb, wdt_tb, wdt_ticks = 0;
578 u64 nr_jiffies = 0;
579 u32 period = TCR_GET_WP(vcpu->arch.tcr);
580
581 wdt_tb = 1ULL << (63 - period);
582 tb = get_tb();
583
584
585
586
587 if (tb & wdt_tb)
588 wdt_ticks = wdt_tb;
589
590 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
591
592
593 nr_jiffies = wdt_ticks;
594
595 if (do_div(nr_jiffies, tb_ticks_per_jiffy))
596 nr_jiffies++;
597
598 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
599}
600
601static void arm_next_watchdog(struct kvm_vcpu *vcpu)
602{
603 unsigned long nr_jiffies;
604 unsigned long flags;
605
606
607
608
609
610 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
611 kvm_clear_request(KVM_REQ_WATCHDOG, vcpu);
612
613 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
614 nr_jiffies = watchdog_next_timeout(vcpu);
615
616
617
618
619 if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
620 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
621 else
622 del_timer(&vcpu->arch.wdt_timer);
623 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
624}
625
626void kvmppc_watchdog_func(struct timer_list *t)
627{
628 struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer);
629 u32 tsr, new_tsr;
630 int final;
631
632 do {
633 new_tsr = tsr = vcpu->arch.tsr;
634 final = 0;
635
636
637 if (tsr & TSR_ENW) {
638 if (tsr & TSR_WIS)
639 final = 1;
640 else
641 new_tsr = tsr | TSR_WIS;
642 } else {
643 new_tsr = tsr | TSR_ENW;
644 }
645 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
646
647 if (new_tsr & TSR_WIS) {
648 smp_wmb();
649 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
650 kvm_vcpu_kick(vcpu);
651 }
652
653
654
655
656
657 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
658 vcpu->arch.watchdog_enabled) {
659 smp_wmb();
660 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
661 kvm_vcpu_kick(vcpu);
662 }
663
664
665
666
667
668
669
670 if (!final)
671 arm_next_watchdog(vcpu);
672}
673
674static void update_timer_ints(struct kvm_vcpu *vcpu)
675{
676 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
677 kvmppc_core_queue_dec(vcpu);
678 else
679 kvmppc_core_dequeue_dec(vcpu);
680
681 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
682 kvmppc_core_queue_watchdog(vcpu);
683 else
684 kvmppc_core_dequeue_watchdog(vcpu);
685}
686
687static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
688{
689 unsigned long *pending = &vcpu->arch.pending_exceptions;
690 unsigned int priority;
691
692 priority = __ffs(*pending);
693 while (priority < BOOKE_IRQPRIO_MAX) {
694 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
695 break;
696
697 priority = find_next_bit(pending,
698 BITS_PER_BYTE * sizeof(*pending),
699 priority + 1);
700 }
701
702
703 vcpu->arch.shared->int_pending = !!*pending;
704}
705
706
707int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
708{
709 int r = 0;
710 WARN_ON_ONCE(!irqs_disabled());
711
712 kvmppc_core_check_exceptions(vcpu);
713
714 if (kvm_request_pending(vcpu)) {
715
716 return 1;
717 }
718
719 if (vcpu->arch.shared->msr & MSR_WE) {
720 local_irq_enable();
721 kvm_vcpu_block(vcpu);
722 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
723 hard_irq_disable();
724
725 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
726 r = 1;
727 }
728
729 return r;
730}
731
732int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
733{
734 int r = 1;
735
736 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
737 update_timer_ints(vcpu);
738#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
739 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
740 kvmppc_core_flush_tlb(vcpu);
741#endif
742
743 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
744 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
745 r = 0;
746 }
747
748 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
749 vcpu->run->epr.epr = 0;
750 vcpu->arch.epr_needed = true;
751 vcpu->run->exit_reason = KVM_EXIT_EPR;
752 r = 0;
753 }
754
755 return r;
756}
757
758int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
759{
760 int ret, s;
761 struct debug_reg debug;
762
763 if (!vcpu->arch.sane) {
764 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
765 return -EINVAL;
766 }
767
768 s = kvmppc_prepare_to_enter(vcpu);
769 if (s <= 0) {
770 ret = s;
771 goto out;
772 }
773
774
775#ifdef CONFIG_PPC_FPU
776
777 enable_kernel_fp();
778
779
780
781
782
783 kvmppc_load_guest_fp(vcpu);
784#endif
785
786#ifdef CONFIG_ALTIVEC
787
788 if (cpu_has_feature(CPU_FTR_ALTIVEC))
789 enable_kernel_altivec();
790
791
792
793
794 kvmppc_load_guest_altivec(vcpu);
795#endif
796
797
798 debug = vcpu->arch.dbg_reg;
799 switch_booke_debug_regs(&debug);
800 debug = current->thread.debug;
801 current->thread.debug = vcpu->arch.dbg_reg;
802
803 vcpu->arch.pgdir = vcpu->kvm->mm->pgd;
804 kvmppc_fix_ee_before_entry();
805
806 ret = __kvmppc_vcpu_run(vcpu);
807
808
809
810
811
812 switch_booke_debug_regs(&debug);
813 current->thread.debug = debug;
814
815#ifdef CONFIG_PPC_FPU
816 kvmppc_save_guest_fp(vcpu);
817#endif
818
819#ifdef CONFIG_ALTIVEC
820 kvmppc_save_guest_altivec(vcpu);
821#endif
822
823out:
824 vcpu->mode = OUTSIDE_GUEST_MODE;
825 return ret;
826}
827
828static int emulation_exit(struct kvm_vcpu *vcpu)
829{
830 enum emulation_result er;
831
832 er = kvmppc_emulate_instruction(vcpu);
833 switch (er) {
834 case EMULATE_DONE:
835
836 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
837
838
839 return RESUME_GUEST_NV;
840
841 case EMULATE_AGAIN:
842 return RESUME_GUEST;
843
844 case EMULATE_FAIL:
845 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
846 __func__, vcpu->arch.regs.nip, vcpu->arch.last_inst);
847
848
849 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32;
850 vcpu->run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
851 kvmppc_core_queue_program(vcpu, ESR_PIL);
852 return RESUME_HOST;
853
854 case EMULATE_EXIT_USER:
855 return RESUME_HOST;
856
857 default:
858 BUG();
859 }
860}
861
862static int kvmppc_handle_debug(struct kvm_vcpu *vcpu)
863{
864 struct kvm_run *run = vcpu->run;
865 struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
866 u32 dbsr = vcpu->arch.dbsr;
867
868 if (vcpu->guest_debug == 0) {
869
870
871
872
873 if (dbsr & DBSR_IDE) {
874 dbsr &= ~DBSR_IDE;
875 if (!dbsr)
876 return RESUME_GUEST;
877 }
878
879 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&
880 (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM))
881 kvmppc_core_queue_debug(vcpu);
882
883
884 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))
885 kvmppc_core_queue_program(vcpu, ESR_PTR);
886
887 return RESUME_GUEST;
888 }
889
890
891
892
893
894 vcpu->arch.dbsr = 0;
895 run->debug.arch.status = 0;
896 run->debug.arch.address = vcpu->arch.regs.nip;
897
898 if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
899 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
900 } else {
901 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
902 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
903 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
904 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
905 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
906 run->debug.arch.address = dbg_reg->dac1;
907 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
908 run->debug.arch.address = dbg_reg->dac2;
909 }
910
911 return RESUME_HOST;
912}
913
914static void kvmppc_fill_pt_regs(struct pt_regs *regs)
915{
916 ulong r1, ip, msr, lr;
917
918 asm("mr %0, 1" : "=r"(r1));
919 asm("mflr %0" : "=r"(lr));
920 asm("mfmsr %0" : "=r"(msr));
921 asm("bl 1f; 1: mflr %0" : "=r"(ip));
922
923 memset(regs, 0, sizeof(*regs));
924 regs->gpr[1] = r1;
925 regs->nip = ip;
926 regs->msr = msr;
927 regs->link = lr;
928}
929
930
931
932
933
934
935
936static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
937 unsigned int exit_nr)
938{
939 struct pt_regs regs;
940
941 switch (exit_nr) {
942 case BOOKE_INTERRUPT_EXTERNAL:
943 kvmppc_fill_pt_regs(®s);
944 do_IRQ(®s);
945 break;
946 case BOOKE_INTERRUPT_DECREMENTER:
947 kvmppc_fill_pt_regs(®s);
948 timer_interrupt(®s);
949 break;
950#if defined(CONFIG_PPC_DOORBELL)
951 case BOOKE_INTERRUPT_DOORBELL:
952 kvmppc_fill_pt_regs(®s);
953 doorbell_exception(®s);
954 break;
955#endif
956 case BOOKE_INTERRUPT_MACHINE_CHECK:
957
958 break;
959 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
960 kvmppc_fill_pt_regs(®s);
961 performance_monitor_exception(®s);
962 break;
963 case BOOKE_INTERRUPT_WATCHDOG:
964 kvmppc_fill_pt_regs(®s);
965#ifdef CONFIG_BOOKE_WDT
966 WatchdogException(®s);
967#else
968 unknown_exception(®s);
969#endif
970 break;
971 case BOOKE_INTERRUPT_CRITICAL:
972 kvmppc_fill_pt_regs(®s);
973 unknown_exception(®s);
974 break;
975 case BOOKE_INTERRUPT_DEBUG:
976
977 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
978 kvmppc_clear_dbsr();
979 break;
980 }
981}
982
983static int kvmppc_resume_inst_load(struct kvm_vcpu *vcpu,
984 enum emulation_result emulated, u32 last_inst)
985{
986 switch (emulated) {
987 case EMULATE_AGAIN:
988 return RESUME_GUEST;
989
990 case EMULATE_FAIL:
991 pr_debug("%s: load instruction from guest address %lx failed\n",
992 __func__, vcpu->arch.regs.nip);
993
994
995 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32;
996 vcpu->run->hw.hardware_exit_reason |= last_inst;
997 kvmppc_core_queue_program(vcpu, ESR_PIL);
998 return RESUME_HOST;
999
1000 default:
1001 BUG();
1002 }
1003}
1004
1005
1006
1007
1008
1009
1010int kvmppc_handle_exit(struct kvm_vcpu *vcpu, unsigned int exit_nr)
1011{
1012 struct kvm_run *run = vcpu->run;
1013 int r = RESUME_HOST;
1014 int s;
1015 int idx;
1016 u32 last_inst = KVM_INST_FETCH_FAILED;
1017 enum emulation_result emulated = EMULATE_DONE;
1018
1019
1020 kvmppc_update_timing_stats(vcpu);
1021
1022
1023 kvmppc_restart_interrupt(vcpu, exit_nr);
1024
1025
1026
1027
1028
1029 switch (exit_nr) {
1030 case BOOKE_INTERRUPT_DATA_STORAGE:
1031 case BOOKE_INTERRUPT_DTLB_MISS:
1032 case BOOKE_INTERRUPT_HV_PRIV:
1033 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1034 break;
1035 case BOOKE_INTERRUPT_PROGRAM:
1036
1037 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
1038 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1039 break;
1040 default:
1041 break;
1042 }
1043
1044 trace_kvm_exit(exit_nr, vcpu);
1045 guest_exit_irqoff();
1046
1047 local_irq_enable();
1048
1049 run->exit_reason = KVM_EXIT_UNKNOWN;
1050 run->ready_for_interrupt_injection = 1;
1051
1052 if (emulated != EMULATE_DONE) {
1053 r = kvmppc_resume_inst_load(vcpu, emulated, last_inst);
1054 goto out;
1055 }
1056
1057 switch (exit_nr) {
1058 case BOOKE_INTERRUPT_MACHINE_CHECK:
1059 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
1060 kvmppc_dump_vcpu(vcpu);
1061
1062 run->hw.hardware_exit_reason = ~1ULL << 32;
1063 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
1064 r = RESUME_HOST;
1065 break;
1066
1067 case BOOKE_INTERRUPT_EXTERNAL:
1068 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1069 r = RESUME_GUEST;
1070 break;
1071
1072 case BOOKE_INTERRUPT_DECREMENTER:
1073 kvmppc_account_exit(vcpu, DEC_EXITS);
1074 r = RESUME_GUEST;
1075 break;
1076
1077 case BOOKE_INTERRUPT_WATCHDOG:
1078 r = RESUME_GUEST;
1079 break;
1080
1081 case BOOKE_INTERRUPT_DOORBELL:
1082 kvmppc_account_exit(vcpu, DBELL_EXITS);
1083 r = RESUME_GUEST;
1084 break;
1085
1086 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
1087 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1088
1089
1090
1091
1092
1093
1094 r = RESUME_GUEST;
1095 break;
1096
1097 case BOOKE_INTERRUPT_GUEST_DBELL:
1098 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1099
1100
1101
1102
1103
1104
1105 r = RESUME_GUEST;
1106 break;
1107
1108 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
1109 r = RESUME_GUEST;
1110 break;
1111
1112 case BOOKE_INTERRUPT_HV_PRIV:
1113 r = emulation_exit(vcpu);
1114 break;
1115
1116 case BOOKE_INTERRUPT_PROGRAM:
1117 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) &&
1118 (last_inst == KVMPPC_INST_SW_BREAKPOINT)) {
1119
1120
1121
1122
1123 r = kvmppc_handle_debug(vcpu);
1124 run->exit_reason = KVM_EXIT_DEBUG;
1125 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1126 break;
1127 }
1128
1129 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
1130
1131
1132
1133
1134
1135
1136
1137
1138 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
1139 r = RESUME_GUEST;
1140 kvmppc_account_exit(vcpu, USR_PR_INST);
1141 break;
1142 }
1143
1144 r = emulation_exit(vcpu);
1145 break;
1146
1147 case BOOKE_INTERRUPT_FP_UNAVAIL:
1148 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
1149 kvmppc_account_exit(vcpu, FP_UNAVAIL);
1150 r = RESUME_GUEST;
1151 break;
1152
1153#ifdef CONFIG_SPE
1154 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
1155 if (vcpu->arch.shared->msr & MSR_SPE)
1156 kvmppc_vcpu_enable_spe(vcpu);
1157 else
1158 kvmppc_booke_queue_irqprio(vcpu,
1159 BOOKE_IRQPRIO_SPE_UNAVAIL);
1160 r = RESUME_GUEST;
1161 break;
1162 }
1163
1164 case BOOKE_INTERRUPT_SPE_FP_DATA:
1165 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
1166 r = RESUME_GUEST;
1167 break;
1168
1169 case BOOKE_INTERRUPT_SPE_FP_ROUND:
1170 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
1171 r = RESUME_GUEST;
1172 break;
1173#elif defined(CONFIG_SPE_POSSIBLE)
1174 case BOOKE_INTERRUPT_SPE_UNAVAIL:
1175
1176
1177
1178
1179 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1180 r = RESUME_GUEST;
1181 break;
1182
1183
1184
1185
1186
1187 case BOOKE_INTERRUPT_SPE_FP_DATA:
1188 case BOOKE_INTERRUPT_SPE_FP_ROUND:
1189 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1190 __func__, exit_nr, vcpu->arch.regs.nip);
1191 run->hw.hardware_exit_reason = exit_nr;
1192 r = RESUME_HOST;
1193 break;
1194#endif
1195
1196
1197
1198
1199
1200#ifdef CONFIG_ALTIVEC
1201 case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL:
1202 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
1203 r = RESUME_GUEST;
1204 break;
1205
1206 case BOOKE_INTERRUPT_ALTIVEC_ASSIST:
1207 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST);
1208 r = RESUME_GUEST;
1209 break;
1210#endif
1211
1212 case BOOKE_INTERRUPT_DATA_STORAGE:
1213 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1214 vcpu->arch.fault_esr);
1215 kvmppc_account_exit(vcpu, DSI_EXITS);
1216 r = RESUME_GUEST;
1217 break;
1218
1219 case BOOKE_INTERRUPT_INST_STORAGE:
1220 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1221 kvmppc_account_exit(vcpu, ISI_EXITS);
1222 r = RESUME_GUEST;
1223 break;
1224
1225 case BOOKE_INTERRUPT_ALIGNMENT:
1226 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1227 vcpu->arch.fault_esr);
1228 r = RESUME_GUEST;
1229 break;
1230
1231#ifdef CONFIG_KVM_BOOKE_HV
1232 case BOOKE_INTERRUPT_HV_SYSCALL:
1233 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1234 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1235 } else {
1236
1237
1238
1239
1240 kvmppc_core_queue_program(vcpu, ESR_PPR);
1241 }
1242
1243 r = RESUME_GUEST;
1244 break;
1245#else
1246 case BOOKE_INTERRUPT_SYSCALL:
1247 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1248 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1249
1250 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1251 r = RESUME_GUEST;
1252 } else {
1253
1254 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1255 }
1256 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1257 r = RESUME_GUEST;
1258 break;
1259#endif
1260
1261 case BOOKE_INTERRUPT_DTLB_MISS: {
1262 unsigned long eaddr = vcpu->arch.fault_dear;
1263 int gtlb_index;
1264 gpa_t gpaddr;
1265 gfn_t gfn;
1266
1267#ifdef CONFIG_KVM_E500V2
1268 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1269 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1270 kvmppc_map_magic(vcpu);
1271 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1272 r = RESUME_GUEST;
1273
1274 break;
1275 }
1276#endif
1277
1278
1279 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1280 if (gtlb_index < 0) {
1281
1282 kvmppc_core_queue_dtlb_miss(vcpu,
1283 vcpu->arch.fault_dear,
1284 vcpu->arch.fault_esr);
1285 kvmppc_mmu_dtlb_miss(vcpu);
1286 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1287 r = RESUME_GUEST;
1288 break;
1289 }
1290
1291 idx = srcu_read_lock(&vcpu->kvm->srcu);
1292
1293 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1294 gfn = gpaddr >> PAGE_SHIFT;
1295
1296 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1297
1298
1299
1300
1301
1302
1303 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1304 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1305 r = RESUME_GUEST;
1306 } else {
1307
1308
1309 vcpu->arch.paddr_accessed = gpaddr;
1310 vcpu->arch.vaddr_accessed = eaddr;
1311 r = kvmppc_emulate_mmio(vcpu);
1312 kvmppc_account_exit(vcpu, MMIO_EXITS);
1313 }
1314
1315 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1316 break;
1317 }
1318
1319 case BOOKE_INTERRUPT_ITLB_MISS: {
1320 unsigned long eaddr = vcpu->arch.regs.nip;
1321 gpa_t gpaddr;
1322 gfn_t gfn;
1323 int gtlb_index;
1324
1325 r = RESUME_GUEST;
1326
1327
1328 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1329 if (gtlb_index < 0) {
1330
1331 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1332 kvmppc_mmu_itlb_miss(vcpu);
1333 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1334 break;
1335 }
1336
1337 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1338
1339 idx = srcu_read_lock(&vcpu->kvm->srcu);
1340
1341 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1342 gfn = gpaddr >> PAGE_SHIFT;
1343
1344 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1345
1346
1347
1348
1349
1350
1351 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1352 } else {
1353
1354 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1355 }
1356
1357 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1358 break;
1359 }
1360
1361 case BOOKE_INTERRUPT_DEBUG: {
1362 r = kvmppc_handle_debug(vcpu);
1363 if (r == RESUME_HOST)
1364 run->exit_reason = KVM_EXIT_DEBUG;
1365 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1366 break;
1367 }
1368
1369 default:
1370 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1371 BUG();
1372 }
1373
1374out:
1375
1376
1377
1378
1379 if (!(r & RESUME_HOST)) {
1380 s = kvmppc_prepare_to_enter(vcpu);
1381 if (s <= 0)
1382 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1383 else {
1384
1385 kvmppc_fix_ee_before_entry();
1386 kvmppc_load_guest_fp(vcpu);
1387 kvmppc_load_guest_altivec(vcpu);
1388 }
1389 }
1390
1391 return r;
1392}
1393
1394static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1395{
1396 u32 old_tsr = vcpu->arch.tsr;
1397
1398 vcpu->arch.tsr = new_tsr;
1399
1400 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1401 arm_next_watchdog(vcpu);
1402
1403 update_timer_ints(vcpu);
1404}
1405
1406int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1407{
1408
1409 spin_lock_init(&vcpu->arch.wdt_lock);
1410 timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0);
1411
1412
1413
1414
1415
1416 mtspr(SPRN_DBSR, DBSR_MRR);
1417 return 0;
1418}
1419
1420void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1421{
1422 del_timer_sync(&vcpu->arch.wdt_timer);
1423}
1424
1425int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1426{
1427 int i;
1428
1429 vcpu_load(vcpu);
1430
1431 regs->pc = vcpu->arch.regs.nip;
1432 regs->cr = kvmppc_get_cr(vcpu);
1433 regs->ctr = vcpu->arch.regs.ctr;
1434 regs->lr = vcpu->arch.regs.link;
1435 regs->xer = kvmppc_get_xer(vcpu);
1436 regs->msr = vcpu->arch.shared->msr;
1437 regs->srr0 = kvmppc_get_srr0(vcpu);
1438 regs->srr1 = kvmppc_get_srr1(vcpu);
1439 regs->pid = vcpu->arch.pid;
1440 regs->sprg0 = kvmppc_get_sprg0(vcpu);
1441 regs->sprg1 = kvmppc_get_sprg1(vcpu);
1442 regs->sprg2 = kvmppc_get_sprg2(vcpu);
1443 regs->sprg3 = kvmppc_get_sprg3(vcpu);
1444 regs->sprg4 = kvmppc_get_sprg4(vcpu);
1445 regs->sprg5 = kvmppc_get_sprg5(vcpu);
1446 regs->sprg6 = kvmppc_get_sprg6(vcpu);
1447 regs->sprg7 = kvmppc_get_sprg7(vcpu);
1448
1449 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1450 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1451
1452 vcpu_put(vcpu);
1453 return 0;
1454}
1455
1456int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1457{
1458 int i;
1459
1460 vcpu_load(vcpu);
1461
1462 vcpu->arch.regs.nip = regs->pc;
1463 kvmppc_set_cr(vcpu, regs->cr);
1464 vcpu->arch.regs.ctr = regs->ctr;
1465 vcpu->arch.regs.link = regs->lr;
1466 kvmppc_set_xer(vcpu, regs->xer);
1467 kvmppc_set_msr(vcpu, regs->msr);
1468 kvmppc_set_srr0(vcpu, regs->srr0);
1469 kvmppc_set_srr1(vcpu, regs->srr1);
1470 kvmppc_set_pid(vcpu, regs->pid);
1471 kvmppc_set_sprg0(vcpu, regs->sprg0);
1472 kvmppc_set_sprg1(vcpu, regs->sprg1);
1473 kvmppc_set_sprg2(vcpu, regs->sprg2);
1474 kvmppc_set_sprg3(vcpu, regs->sprg3);
1475 kvmppc_set_sprg4(vcpu, regs->sprg4);
1476 kvmppc_set_sprg5(vcpu, regs->sprg5);
1477 kvmppc_set_sprg6(vcpu, regs->sprg6);
1478 kvmppc_set_sprg7(vcpu, regs->sprg7);
1479
1480 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1481 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1482
1483 vcpu_put(vcpu);
1484 return 0;
1485}
1486
1487static void get_sregs_base(struct kvm_vcpu *vcpu,
1488 struct kvm_sregs *sregs)
1489{
1490 u64 tb = get_tb();
1491
1492 sregs->u.e.features |= KVM_SREGS_E_BASE;
1493
1494 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1495 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1496 sregs->u.e.mcsr = vcpu->arch.mcsr;
1497 sregs->u.e.esr = kvmppc_get_esr(vcpu);
1498 sregs->u.e.dear = kvmppc_get_dar(vcpu);
1499 sregs->u.e.tsr = vcpu->arch.tsr;
1500 sregs->u.e.tcr = vcpu->arch.tcr;
1501 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1502 sregs->u.e.tb = tb;
1503 sregs->u.e.vrsave = vcpu->arch.vrsave;
1504}
1505
1506static int set_sregs_base(struct kvm_vcpu *vcpu,
1507 struct kvm_sregs *sregs)
1508{
1509 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1510 return 0;
1511
1512 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1513 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1514 vcpu->arch.mcsr = sregs->u.e.mcsr;
1515 kvmppc_set_esr(vcpu, sregs->u.e.esr);
1516 kvmppc_set_dar(vcpu, sregs->u.e.dear);
1517 vcpu->arch.vrsave = sregs->u.e.vrsave;
1518 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1519
1520 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1521 vcpu->arch.dec = sregs->u.e.dec;
1522 kvmppc_emulate_dec(vcpu);
1523 }
1524
1525 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1526 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1527
1528 return 0;
1529}
1530
1531static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1532 struct kvm_sregs *sregs)
1533{
1534 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1535
1536 sregs->u.e.pir = vcpu->vcpu_id;
1537 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1538 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1539 sregs->u.e.decar = vcpu->arch.decar;
1540 sregs->u.e.ivpr = vcpu->arch.ivpr;
1541}
1542
1543static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1544 struct kvm_sregs *sregs)
1545{
1546 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1547 return 0;
1548
1549 if (sregs->u.e.pir != vcpu->vcpu_id)
1550 return -EINVAL;
1551
1552 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1553 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1554 vcpu->arch.decar = sregs->u.e.decar;
1555 vcpu->arch.ivpr = sregs->u.e.ivpr;
1556
1557 return 0;
1558}
1559
1560int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1561{
1562 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1563
1564 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1565 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1566 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1567 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1568 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1569 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1570 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1571 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1572 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1573 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1574 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1575 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1576 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1577 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1578 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1579 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1580 return 0;
1581}
1582
1583int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1584{
1585 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1586 return 0;
1587
1588 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1589 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1590 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1591 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1592 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1593 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1594 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1595 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1596 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1597 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1598 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1599 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1600 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1601 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1602 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1603 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1604
1605 return 0;
1606}
1607
1608int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1609 struct kvm_sregs *sregs)
1610{
1611 int ret;
1612
1613 vcpu_load(vcpu);
1614
1615 sregs->pvr = vcpu->arch.pvr;
1616
1617 get_sregs_base(vcpu, sregs);
1618 get_sregs_arch206(vcpu, sregs);
1619 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1620
1621 vcpu_put(vcpu);
1622 return ret;
1623}
1624
1625int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1626 struct kvm_sregs *sregs)
1627{
1628 int ret = -EINVAL;
1629
1630 vcpu_load(vcpu);
1631 if (vcpu->arch.pvr != sregs->pvr)
1632 goto out;
1633
1634 ret = set_sregs_base(vcpu, sregs);
1635 if (ret < 0)
1636 goto out;
1637
1638 ret = set_sregs_arch206(vcpu, sregs);
1639 if (ret < 0)
1640 goto out;
1641
1642 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1643
1644out:
1645 vcpu_put(vcpu);
1646 return ret;
1647}
1648
1649int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
1650 union kvmppc_one_reg *val)
1651{
1652 int r = 0;
1653
1654 switch (id) {
1655 case KVM_REG_PPC_IAC1:
1656 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1);
1657 break;
1658 case KVM_REG_PPC_IAC2:
1659 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2);
1660 break;
1661#if CONFIG_PPC_ADV_DEBUG_IACS > 2
1662 case KVM_REG_PPC_IAC3:
1663 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3);
1664 break;
1665 case KVM_REG_PPC_IAC4:
1666 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4);
1667 break;
1668#endif
1669 case KVM_REG_PPC_DAC1:
1670 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1);
1671 break;
1672 case KVM_REG_PPC_DAC2:
1673 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2);
1674 break;
1675 case KVM_REG_PPC_EPR: {
1676 u32 epr = kvmppc_get_epr(vcpu);
1677 *val = get_reg_val(id, epr);
1678 break;
1679 }
1680#if defined(CONFIG_64BIT)
1681 case KVM_REG_PPC_EPCR:
1682 *val = get_reg_val(id, vcpu->arch.epcr);
1683 break;
1684#endif
1685 case KVM_REG_PPC_TCR:
1686 *val = get_reg_val(id, vcpu->arch.tcr);
1687 break;
1688 case KVM_REG_PPC_TSR:
1689 *val = get_reg_val(id, vcpu->arch.tsr);
1690 break;
1691 case KVM_REG_PPC_DEBUG_INST:
1692 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1693 break;
1694 case KVM_REG_PPC_VRSAVE:
1695 *val = get_reg_val(id, vcpu->arch.vrsave);
1696 break;
1697 default:
1698 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
1699 break;
1700 }
1701
1702 return r;
1703}
1704
1705int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
1706 union kvmppc_one_reg *val)
1707{
1708 int r = 0;
1709
1710 switch (id) {
1711 case KVM_REG_PPC_IAC1:
1712 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val);
1713 break;
1714 case KVM_REG_PPC_IAC2:
1715 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val);
1716 break;
1717#if CONFIG_PPC_ADV_DEBUG_IACS > 2
1718 case KVM_REG_PPC_IAC3:
1719 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val);
1720 break;
1721 case KVM_REG_PPC_IAC4:
1722 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val);
1723 break;
1724#endif
1725 case KVM_REG_PPC_DAC1:
1726 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val);
1727 break;
1728 case KVM_REG_PPC_DAC2:
1729 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val);
1730 break;
1731 case KVM_REG_PPC_EPR: {
1732 u32 new_epr = set_reg_val(id, *val);
1733 kvmppc_set_epr(vcpu, new_epr);
1734 break;
1735 }
1736#if defined(CONFIG_64BIT)
1737 case KVM_REG_PPC_EPCR: {
1738 u32 new_epcr = set_reg_val(id, *val);
1739 kvmppc_set_epcr(vcpu, new_epcr);
1740 break;
1741 }
1742#endif
1743 case KVM_REG_PPC_OR_TSR: {
1744 u32 tsr_bits = set_reg_val(id, *val);
1745 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1746 break;
1747 }
1748 case KVM_REG_PPC_CLEAR_TSR: {
1749 u32 tsr_bits = set_reg_val(id, *val);
1750 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1751 break;
1752 }
1753 case KVM_REG_PPC_TSR: {
1754 u32 tsr = set_reg_val(id, *val);
1755 kvmppc_set_tsr(vcpu, tsr);
1756 break;
1757 }
1758 case KVM_REG_PPC_TCR: {
1759 u32 tcr = set_reg_val(id, *val);
1760 kvmppc_set_tcr(vcpu, tcr);
1761 break;
1762 }
1763 case KVM_REG_PPC_VRSAVE:
1764 vcpu->arch.vrsave = set_reg_val(id, *val);
1765 break;
1766 default:
1767 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
1768 break;
1769 }
1770
1771 return r;
1772}
1773
1774int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1775{
1776 return -EOPNOTSUPP;
1777}
1778
1779int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1780{
1781 return -EOPNOTSUPP;
1782}
1783
1784int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1785 struct kvm_translation *tr)
1786{
1787 int r;
1788
1789 vcpu_load(vcpu);
1790 r = kvmppc_core_vcpu_translate(vcpu, tr);
1791 vcpu_put(vcpu);
1792 return r;
1793}
1794
1795void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
1796{
1797
1798}
1799
1800int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1801{
1802 return -EOPNOTSUPP;
1803}
1804
1805void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
1806{
1807}
1808
1809int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1810 struct kvm_memory_slot *memslot,
1811 const struct kvm_userspace_memory_region *mem,
1812 enum kvm_mr_change change)
1813{
1814 return 0;
1815}
1816
1817void kvmppc_core_commit_memory_region(struct kvm *kvm,
1818 const struct kvm_userspace_memory_region *mem,
1819 const struct kvm_memory_slot *old,
1820 const struct kvm_memory_slot *new,
1821 enum kvm_mr_change change)
1822{
1823}
1824
1825void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1826{
1827}
1828
1829void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1830{
1831#if defined(CONFIG_64BIT)
1832 vcpu->arch.epcr = new_epcr;
1833#ifdef CONFIG_KVM_BOOKE_HV
1834 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1835 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
1836 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1837#endif
1838#endif
1839}
1840
1841void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1842{
1843 vcpu->arch.tcr = new_tcr;
1844 arm_next_watchdog(vcpu);
1845 update_timer_ints(vcpu);
1846}
1847
1848void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1849{
1850 set_bits(tsr_bits, &vcpu->arch.tsr);
1851 smp_wmb();
1852 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1853 kvm_vcpu_kick(vcpu);
1854}
1855
1856void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1857{
1858 clear_bits(tsr_bits, &vcpu->arch.tsr);
1859
1860
1861
1862
1863
1864 if (tsr_bits & (TSR_ENW | TSR_WIS))
1865 arm_next_watchdog(vcpu);
1866
1867 update_timer_ints(vcpu);
1868}
1869
1870void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
1871{
1872 if (vcpu->arch.tcr & TCR_ARE) {
1873 vcpu->arch.dec = vcpu->arch.decar;
1874 kvmppc_emulate_dec(vcpu);
1875 }
1876
1877 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1878}
1879
1880static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1881 uint64_t addr, int index)
1882{
1883 switch (index) {
1884 case 0:
1885 dbg_reg->dbcr0 |= DBCR0_IAC1;
1886 dbg_reg->iac1 = addr;
1887 break;
1888 case 1:
1889 dbg_reg->dbcr0 |= DBCR0_IAC2;
1890 dbg_reg->iac2 = addr;
1891 break;
1892#if CONFIG_PPC_ADV_DEBUG_IACS > 2
1893 case 2:
1894 dbg_reg->dbcr0 |= DBCR0_IAC3;
1895 dbg_reg->iac3 = addr;
1896 break;
1897 case 3:
1898 dbg_reg->dbcr0 |= DBCR0_IAC4;
1899 dbg_reg->iac4 = addr;
1900 break;
1901#endif
1902 default:
1903 return -EINVAL;
1904 }
1905
1906 dbg_reg->dbcr0 |= DBCR0_IDM;
1907 return 0;
1908}
1909
1910static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1911 int type, int index)
1912{
1913 switch (index) {
1914 case 0:
1915 if (type & KVMPPC_DEBUG_WATCH_READ)
1916 dbg_reg->dbcr0 |= DBCR0_DAC1R;
1917 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1918 dbg_reg->dbcr0 |= DBCR0_DAC1W;
1919 dbg_reg->dac1 = addr;
1920 break;
1921 case 1:
1922 if (type & KVMPPC_DEBUG_WATCH_READ)
1923 dbg_reg->dbcr0 |= DBCR0_DAC2R;
1924 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1925 dbg_reg->dbcr0 |= DBCR0_DAC2W;
1926 dbg_reg->dac2 = addr;
1927 break;
1928 default:
1929 return -EINVAL;
1930 }
1931
1932 dbg_reg->dbcr0 |= DBCR0_IDM;
1933 return 0;
1934}
1935void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1936{
1937
1938#ifdef CONFIG_KVM_BOOKE_HV
1939 BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1940 if (set) {
1941 if (prot_bitmap & MSR_UCLE)
1942 vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1943 if (prot_bitmap & MSR_DE)
1944 vcpu->arch.shadow_msrp |= MSRP_DEP;
1945 if (prot_bitmap & MSR_PMM)
1946 vcpu->arch.shadow_msrp |= MSRP_PMMP;
1947 } else {
1948 if (prot_bitmap & MSR_UCLE)
1949 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1950 if (prot_bitmap & MSR_DE)
1951 vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1952 if (prot_bitmap & MSR_PMM)
1953 vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1954 }
1955#endif
1956}
1957
1958int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
1959 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
1960{
1961 int gtlb_index;
1962 gpa_t gpaddr;
1963
1964#ifdef CONFIG_KVM_E500V2
1965 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1966 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1967 pte->eaddr = eaddr;
1968 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) |
1969 (eaddr & ~PAGE_MASK);
1970 pte->vpage = eaddr >> PAGE_SHIFT;
1971 pte->may_read = true;
1972 pte->may_write = true;
1973 pte->may_execute = true;
1974
1975 return 0;
1976 }
1977#endif
1978
1979
1980 switch (xlid) {
1981 case XLATE_INST:
1982 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1983 break;
1984 case XLATE_DATA:
1985 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1986 break;
1987 default:
1988 BUG();
1989 }
1990
1991
1992 if (gtlb_index < 0)
1993 return -ENOENT;
1994
1995 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1996
1997 pte->eaddr = eaddr;
1998 pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK);
1999 pte->vpage = eaddr >> PAGE_SHIFT;
2000
2001
2002 pte->may_read = true;
2003 pte->may_write = true;
2004 pte->may_execute = true;
2005
2006 return 0;
2007}
2008
2009int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
2010 struct kvm_guest_debug *dbg)
2011{
2012 struct debug_reg *dbg_reg;
2013 int n, b = 0, w = 0;
2014 int ret = 0;
2015
2016 vcpu_load(vcpu);
2017
2018 if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
2019 vcpu->arch.dbg_reg.dbcr0 = 0;
2020 vcpu->guest_debug = 0;
2021 kvm_guest_protect_msr(vcpu, MSR_DE, false);
2022 goto out;
2023 }
2024
2025 kvm_guest_protect_msr(vcpu, MSR_DE, true);
2026 vcpu->guest_debug = dbg->control;
2027 vcpu->arch.dbg_reg.dbcr0 = 0;
2028
2029 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
2030 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2031
2032
2033 dbg_reg = &(vcpu->arch.dbg_reg);
2034
2035#ifdef CONFIG_KVM_BOOKE_HV
2036
2037
2038
2039
2040 dbg_reg->dbcr1 = 0;
2041 dbg_reg->dbcr2 = 0;
2042#else
2043
2044
2045
2046
2047
2048 dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
2049 DBCR1_IAC4US;
2050 dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
2051#endif
2052
2053 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
2054 goto out;
2055
2056 ret = -EINVAL;
2057 for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
2058 uint64_t addr = dbg->arch.bp[n].addr;
2059 uint32_t type = dbg->arch.bp[n].type;
2060
2061 if (type == KVMPPC_DEBUG_NONE)
2062 continue;
2063
2064 if (type & ~(KVMPPC_DEBUG_WATCH_READ |
2065 KVMPPC_DEBUG_WATCH_WRITE |
2066 KVMPPC_DEBUG_BREAKPOINT))
2067 goto out;
2068
2069 if (type & KVMPPC_DEBUG_BREAKPOINT) {
2070
2071 if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
2072 goto out;
2073 } else {
2074
2075 if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
2076 type, w++))
2077 goto out;
2078 }
2079 }
2080
2081 ret = 0;
2082out:
2083 vcpu_put(vcpu);
2084 return ret;
2085}
2086
2087void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2088{
2089 vcpu->cpu = smp_processor_id();
2090 current->thread.kvm_vcpu = vcpu;
2091}
2092
2093void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
2094{
2095 current->thread.kvm_vcpu = NULL;
2096 vcpu->cpu = -1;
2097
2098
2099 kvmppc_clear_dbsr();
2100}
2101
2102int kvmppc_core_init_vm(struct kvm *kvm)
2103{
2104 return kvm->arch.kvm_ops->init_vm(kvm);
2105}
2106
2107int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
2108{
2109 int i;
2110 int r;
2111
2112 r = vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
2113 if (r)
2114 return r;
2115
2116
2117 vcpu->arch.regs.nip = 0;
2118 vcpu->arch.shared->pir = vcpu->vcpu_id;
2119 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8);
2120 kvmppc_set_msr(vcpu, 0);
2121
2122#ifndef CONFIG_KVM_BOOKE_HV
2123 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
2124 vcpu->arch.shadow_pid = 1;
2125 vcpu->arch.shared->msr = 0;
2126#endif
2127
2128
2129
2130 vcpu->arch.ivpr = 0x55550000;
2131 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
2132 vcpu->arch.ivor[i] = 0x7700 | i * 4;
2133
2134 kvmppc_init_timing_stats(vcpu);
2135
2136 r = kvmppc_core_vcpu_setup(vcpu);
2137 if (r)
2138 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2139 kvmppc_sanity_check(vcpu);
2140 return r;
2141}
2142
2143void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
2144{
2145 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2146}
2147
2148void kvmppc_core_destroy_vm(struct kvm *kvm)
2149{
2150 kvm->arch.kvm_ops->destroy_vm(kvm);
2151}
2152
2153void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2154{
2155 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
2156}
2157
2158void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
2159{
2160 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
2161}
2162
2163int __init kvmppc_booke_init(void)
2164{
2165#ifndef CONFIG_KVM_BOOKE_HV
2166 unsigned long ivor[16];
2167 unsigned long *handler = kvmppc_booke_handler_addr;
2168 unsigned long max_ivor = 0;
2169 unsigned long handler_len;
2170 int i;
2171
2172
2173
2174 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
2175 VCPU_SIZE_ORDER);
2176 if (!kvmppc_booke_handlers)
2177 return -ENOMEM;
2178
2179
2180
2181
2182
2183 ivor[0] = mfspr(SPRN_IVOR0);
2184 ivor[1] = mfspr(SPRN_IVOR1);
2185 ivor[2] = mfspr(SPRN_IVOR2);
2186 ivor[3] = mfspr(SPRN_IVOR3);
2187 ivor[4] = mfspr(SPRN_IVOR4);
2188 ivor[5] = mfspr(SPRN_IVOR5);
2189 ivor[6] = mfspr(SPRN_IVOR6);
2190 ivor[7] = mfspr(SPRN_IVOR7);
2191 ivor[8] = mfspr(SPRN_IVOR8);
2192 ivor[9] = mfspr(SPRN_IVOR9);
2193 ivor[10] = mfspr(SPRN_IVOR10);
2194 ivor[11] = mfspr(SPRN_IVOR11);
2195 ivor[12] = mfspr(SPRN_IVOR12);
2196 ivor[13] = mfspr(SPRN_IVOR13);
2197 ivor[14] = mfspr(SPRN_IVOR14);
2198 ivor[15] = mfspr(SPRN_IVOR15);
2199
2200 for (i = 0; i < 16; i++) {
2201 if (ivor[i] > max_ivor)
2202 max_ivor = i;
2203
2204 handler_len = handler[i + 1] - handler[i];
2205 memcpy((void *)kvmppc_booke_handlers + ivor[i],
2206 (void *)handler[i], handler_len);
2207 }
2208
2209 handler_len = handler[max_ivor + 1] - handler[max_ivor];
2210 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
2211 ivor[max_ivor] + handler_len);
2212#endif
2213 return 0;
2214}
2215
2216void __exit kvmppc_booke_exit(void)
2217{
2218 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
2219 kvm_exit();
2220}
2221