LXR linux/arch/powerpc/mm/book3s32/mmu

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * This file contains the routines for handling the MMU on those
   4 * PowerPC implementations where the MMU substantially follows the
   5 * architecture specification.  This includes the 6xx, 7xx, 7xxx,
   6 * and 8260 implementations but excludes the 8xx and 4xx.
   7 *  -- paulus
   8 *
   9 *  Derived from arch/ppc/mm/init.c:
  10 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  11 *
  12 *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  13 *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
  14 *    Copyright (C) 1996 Paul Mackerras
  15 *
  16 *  Derived from "arch/i386/mm/init.c"
  17 *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
  18 */
  19
  20#include <linux/mm.h>
  21#include <linux/init.h>
  22#include <linux/export.h>
  23
  24#include <asm/mmu_context.h>
  25
  26/*
  27 * Room for two PTE pointers, usually the kernel and current user pointers
  28 * to their respective root page table.
  29 */
  30void *abatron_pteptrs[2];
  31
  32/*
  33 * On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs
  34 * (virtual segment identifiers) for each context.  Although the
  35 * hardware supports 24-bit VSIDs, and thus >1 million contexts,
  36 * we only use 32,768 of them.  That is ample, since there can be
  37 * at most around 30,000 tasks in the system anyway, and it means
  38 * that we can use a bitmap to indicate which contexts are in use.
  39 * Using a bitmap means that we entirely avoid all of the problems
  40 * that we used to have when the context number overflowed,
  41 * particularly on SMP systems.
  42 *  -- paulus.
  43 */
  44#define NO_CONTEXT              ((unsigned long) -1)
  45#define LAST_CONTEXT            32767
  46#define FIRST_CONTEXT           1
  47
  48static unsigned long next_mmu_context;
  49static unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
  50
  51unsigned long __init_new_context(void)
  52{
  53        unsigned long ctx = next_mmu_context;
  54
  55        while (test_and_set_bit(ctx, context_map)) {
  56                ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
  57                if (ctx > LAST_CONTEXT)
  58                        ctx = 0;
  59        }
  60        next_mmu_context = (ctx + 1) & LAST_CONTEXT;
  61
  62        return ctx;
  63}
  64EXPORT_SYMBOL_GPL(__init_new_context);
  65
  66/*
  67 * Set up the context for a new address space.
  68 */
  69int init_new_context(struct task_struct *t, struct mm_struct *mm)
  70{
  71        mm->context.id = __init_new_context();
  72
  73        return 0;
  74}
  75
  76/*
  77 * Free a context ID. Make sure to call this with preempt disabled!
  78 */
  79void __destroy_context(unsigned long ctx)
  80{
  81        clear_bit(ctx, context_map);
  82}
  83EXPORT_SYMBOL_GPL(__destroy_context);
  84
  85/*
  86 * We're finished using the context for an address space.
  87 */
  88void destroy_context(struct mm_struct *mm)
  89{
  90        preempt_disable();
  91        if (mm->context.id != NO_CONTEXT) {
  92                __destroy_context(mm->context.id);
  93                mm->context.id = NO_CONTEXT;
  94        }
  95        preempt_enable();
  96}
  97
  98/*
  99 * Initialize the context management stuff.
 100 */
 101void __init mmu_context_init(void)
 102{
 103        /* Reserve context 0 for kernel use */
 104        context_map[0] = (1 << FIRST_CONTEXT) - 1;
 105        next_mmu_context = FIRST_CONTEXT;
 106}
 107
 108void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
 109{
 110        long id = next->context.id;
 111        unsigned long val;
 112
 113        if (id < 0)
 114                panic("mm_struct %p has no context ID", next);
 115
 116        isync();
 117
 118        val = CTX_TO_VSID(id, 0);
 119        if (!kuep_is_disabled())
 120                val |= SR_NX;
 121        if (!kuap_is_disabled())
 122                val |= SR_KS;
 123
 124        update_user_segments(val);
 125
 126        if (IS_ENABLED(CONFIG_BDI_SWITCH))
 127                abatron_pteptrs[1] = next->pgd;
 128
 129        if (!mmu_has_feature(MMU_FTR_HPTE_TABLE))
 130                mtspr(SPRN_SDR1, rol32(__pa(next->pgd), 4) & 0xffff01ff);
 131
 132        mb();   /* sync */
 133        isync();
 134}
 135EXPORT_SYMBOL(switch_mmu_context);
 136