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15#include <linux/cpu.h>
16#include <linux/errno.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/stddef.h>
21#include <linux/unistd.h>
22#include <linux/user.h>
23#include <linux/tty.h>
24#include <linux/major.h>
25#include <linux/interrupt.h>
26#include <linux/reboot.h>
27#include <linux/init.h>
28#include <linux/ioport.h>
29#include <linux/console.h>
30#include <linux/pci.h>
31#include <linux/utsname.h>
32#include <linux/adb.h>
33#include <linux/export.h>
34#include <linux/delay.h>
35#include <linux/irq.h>
36#include <linux/seq_file.h>
37#include <linux/root_dev.h>
38#include <linux/of.h>
39#include <linux/of_pci.h>
40#include <linux/memblock.h>
41#include <linux/swiotlb.h>
42
43#include <asm/mmu.h>
44#include <asm/processor.h>
45#include <asm/io.h>
46#include <asm/prom.h>
47#include <asm/rtas.h>
48#include <asm/pci-bridge.h>
49#include <asm/iommu.h>
50#include <asm/dma.h>
51#include <asm/machdep.h>
52#include <asm/irq.h>
53#include <asm/time.h>
54#include <asm/nvram.h>
55#include <asm/pmc.h>
56#include <asm/xics.h>
57#include <asm/xive.h>
58#include <asm/ppc-pci.h>
59#include <asm/i8259.h>
60#include <asm/udbg.h>
61#include <asm/smp.h>
62#include <asm/firmware.h>
63#include <asm/eeh.h>
64#include <asm/reg.h>
65#include <asm/plpar_wrappers.h>
66#include <asm/kexec.h>
67#include <asm/isa-bridge.h>
68#include <asm/security_features.h>
69#include <asm/asm-const.h>
70#include <asm/idle.h>
71#include <asm/swiotlb.h>
72#include <asm/svm.h>
73#include <asm/dtl.h>
74#include <asm/hvconsole.h>
75
76#include "pseries.h"
77#include "../../../../drivers/pci/pci.h"
78
79DEFINE_STATIC_KEY_FALSE(shared_processor);
80EXPORT_SYMBOL(shared_processor);
81
82int CMO_PrPSP = -1;
83int CMO_SecPSP = -1;
84unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
85EXPORT_SYMBOL(CMO_PageSize);
86
87int fwnmi_active;
88int ibm_nmi_interlock_token;
89u32 pseries_security_flavor;
90
91static void pSeries_show_cpuinfo(struct seq_file *m)
92{
93 struct device_node *root;
94 const char *model = "";
95
96 root = of_find_node_by_path("/");
97 if (root)
98 model = of_get_property(root, "model", NULL);
99 seq_printf(m, "machine\t\t: CHRP %s\n", model);
100 of_node_put(root);
101 if (radix_enabled())
102 seq_printf(m, "MMU\t\t: Radix\n");
103 else
104 seq_printf(m, "MMU\t\t: Hash\n");
105}
106
107
108
109
110static void __init fwnmi_init(void)
111{
112 unsigned long system_reset_addr, machine_check_addr;
113 u8 *mce_data_buf;
114 unsigned int i;
115 int nr_cpus = num_possible_cpus();
116#ifdef CONFIG_PPC_BOOK3S_64
117 struct slb_entry *slb_ptr;
118 size_t size;
119#endif
120 int ibm_nmi_register_token;
121
122 ibm_nmi_register_token = rtas_token("ibm,nmi-register");
123 if (ibm_nmi_register_token == RTAS_UNKNOWN_SERVICE)
124 return;
125
126 ibm_nmi_interlock_token = rtas_token("ibm,nmi-interlock");
127 if (WARN_ON(ibm_nmi_interlock_token == RTAS_UNKNOWN_SERVICE))
128 return;
129
130
131
132 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
133 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
134
135 if (0 == rtas_call(ibm_nmi_register_token, 2, 1, NULL,
136 system_reset_addr, machine_check_addr))
137 fwnmi_active = 1;
138
139
140
141
142
143
144 mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus,
145 RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT,
146 ppc64_rma_size, NUMA_NO_NODE);
147 if (!mce_data_buf)
148 panic("Failed to allocate %d bytes below %pa for MCE buffer\n",
149 RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size);
150
151 for_each_possible_cpu(i) {
152 paca_ptrs[i]->mce_data_buf = mce_data_buf +
153 (RTAS_ERROR_LOG_MAX * i);
154 }
155
156#ifdef CONFIG_PPC_BOOK3S_64
157 if (!radix_enabled()) {
158
159 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus;
160 slb_ptr = memblock_alloc_try_nid_raw(size,
161 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT,
162 ppc64_rma_size, NUMA_NO_NODE);
163 if (!slb_ptr)
164 panic("Failed to allocate %zu bytes below %pa for slb area\n",
165 size, &ppc64_rma_size);
166
167 for_each_possible_cpu(i)
168 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i);
169 }
170#endif
171}
172
173static void pseries_8259_cascade(struct irq_desc *desc)
174{
175 struct irq_chip *chip = irq_desc_get_chip(desc);
176 unsigned int cascade_irq = i8259_irq();
177
178 if (cascade_irq)
179 generic_handle_irq(cascade_irq);
180
181 chip->irq_eoi(&desc->irq_data);
182}
183
184static void __init pseries_setup_i8259_cascade(void)
185{
186 struct device_node *np, *old, *found = NULL;
187 unsigned int cascade;
188 const u32 *addrp;
189 unsigned long intack = 0;
190 int naddr;
191
192 for_each_node_by_type(np, "interrupt-controller") {
193 if (of_device_is_compatible(np, "chrp,iic")) {
194 found = np;
195 break;
196 }
197 }
198
199 if (found == NULL) {
200 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
201 return;
202 }
203
204 cascade = irq_of_parse_and_map(found, 0);
205 if (!cascade) {
206 printk(KERN_ERR "pic: failed to map cascade interrupt");
207 return;
208 }
209 pr_debug("pic: cascade mapped to irq %d\n", cascade);
210
211 for (old = of_node_get(found); old != NULL ; old = np) {
212 np = of_get_parent(old);
213 of_node_put(old);
214 if (np == NULL)
215 break;
216 if (!of_node_name_eq(np, "pci"))
217 continue;
218 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
219 if (addrp == NULL)
220 continue;
221 naddr = of_n_addr_cells(np);
222 intack = addrp[naddr-1];
223 if (naddr > 1)
224 intack |= ((unsigned long)addrp[naddr-2]) << 32;
225 }
226 if (intack)
227 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
228 i8259_init(found, intack);
229 of_node_put(found);
230 irq_set_chained_handler(cascade, pseries_8259_cascade);
231}
232
233static void __init pseries_init_irq(void)
234{
235
236 if (!xive_spapr_init()) {
237 xics_init();
238 pseries_setup_i8259_cascade();
239 }
240}
241
242static void pseries_lpar_enable_pmcs(void)
243{
244 unsigned long set, reset;
245
246 set = 1UL << 63;
247 reset = 0;
248 plpar_hcall_norets(H_PERFMON, set, reset);
249}
250
251static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
252{
253 struct of_reconfig_data *rd = data;
254 struct device_node *parent, *np = rd->dn;
255 struct pci_dn *pdn;
256 int err = NOTIFY_OK;
257
258 switch (action) {
259 case OF_RECONFIG_ATTACH_NODE:
260 parent = of_get_parent(np);
261 pdn = parent ? PCI_DN(parent) : NULL;
262 if (pdn)
263 pci_add_device_node_info(pdn->phb, np);
264
265 of_node_put(parent);
266 break;
267 case OF_RECONFIG_DETACH_NODE:
268 pdn = PCI_DN(np);
269 if (pdn)
270 list_del(&pdn->list);
271 break;
272 default:
273 err = NOTIFY_DONE;
274 break;
275 }
276 return err;
277}
278
279static struct notifier_block pci_dn_reconfig_nb = {
280 .notifier_call = pci_dn_reconfig_notifier,
281};
282
283struct kmem_cache *dtl_cache;
284
285#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
286
287
288
289
290
291static int alloc_dispatch_logs(void)
292{
293 if (!firmware_has_feature(FW_FEATURE_SPLPAR))
294 return 0;
295
296 if (!dtl_cache)
297 return 0;
298
299 alloc_dtl_buffers(0);
300
301
302 register_dtl_buffer(smp_processor_id());
303
304 return 0;
305}
306#else
307static inline int alloc_dispatch_logs(void)
308{
309 return 0;
310}
311#endif
312
313static int alloc_dispatch_log_kmem_cache(void)
314{
315 void (*ctor)(void *) = get_dtl_cache_ctor();
316
317 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
318 DISPATCH_LOG_BYTES, 0, ctor);
319 if (!dtl_cache) {
320 pr_warn("Failed to create dispatch trace log buffer cache\n");
321 pr_warn("Stolen time statistics will be unreliable\n");
322 return 0;
323 }
324
325 return alloc_dispatch_logs();
326}
327machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
328
329DEFINE_PER_CPU(u64, idle_spurr_cycles);
330DEFINE_PER_CPU(u64, idle_entry_purr_snap);
331DEFINE_PER_CPU(u64, idle_entry_spurr_snap);
332static void pseries_lpar_idle(void)
333{
334
335
336
337
338
339 if (!prep_irq_for_idle())
340 return;
341
342
343 pseries_idle_prolog();
344
345
346
347
348
349
350
351
352 cede_processor();
353
354 pseries_idle_epilog();
355}
356
357
358
359
360
361
362
363
364bool pseries_enable_reloc_on_exc(void)
365{
366 long rc;
367 unsigned int delay, total_delay = 0;
368
369 while (1) {
370 rc = enable_reloc_on_exceptions();
371 if (!H_IS_LONG_BUSY(rc)) {
372 if (rc == H_P2) {
373 pr_info("Relocation on exceptions not"
374 " supported\n");
375 return false;
376 } else if (rc != H_SUCCESS) {
377 pr_warn("Unable to enable relocation"
378 " on exceptions: %ld\n", rc);
379 return false;
380 }
381 return true;
382 }
383
384 delay = get_longbusy_msecs(rc);
385 total_delay += delay;
386 if (total_delay > 1000) {
387 pr_warn("Warning: Giving up waiting to enable "
388 "relocation on exceptions (%u msec)!\n",
389 total_delay);
390 return false;
391 }
392
393 mdelay(delay);
394 }
395}
396EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
397
398void pseries_disable_reloc_on_exc(void)
399{
400 long rc;
401
402 while (1) {
403 rc = disable_reloc_on_exceptions();
404 if (!H_IS_LONG_BUSY(rc))
405 break;
406 mdelay(get_longbusy_msecs(rc));
407 }
408 if (rc != H_SUCCESS)
409 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n",
410 rc);
411}
412EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
413
414#ifdef CONFIG_KEXEC_CORE
415static void pSeries_machine_kexec(struct kimage *image)
416{
417 if (firmware_has_feature(FW_FEATURE_SET_MODE))
418 pseries_disable_reloc_on_exc();
419
420 default_machine_kexec(image);
421}
422#endif
423
424#ifdef __LITTLE_ENDIAN__
425void pseries_big_endian_exceptions(void)
426{
427 long rc;
428
429 while (1) {
430 rc = enable_big_endian_exceptions();
431 if (!H_IS_LONG_BUSY(rc))
432 break;
433 mdelay(get_longbusy_msecs(rc));
434 }
435
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444
445
446
447 if (rc && !kdump_in_progress())
448 panic("Could not enable big endian exceptions");
449}
450
451void pseries_little_endian_exceptions(void)
452{
453 long rc;
454
455 while (1) {
456 rc = enable_little_endian_exceptions();
457 if (!H_IS_LONG_BUSY(rc))
458 break;
459 mdelay(get_longbusy_msecs(rc));
460 }
461 if (rc) {
462 ppc_md.progress("H_SET_MODE LE exception fail", 0);
463 panic("Could not enable little endian exceptions");
464 }
465}
466#endif
467
468static void __init pSeries_discover_phbs(void)
469{
470 struct device_node *node;
471 struct pci_controller *phb;
472 struct device_node *root = of_find_node_by_path("/");
473
474 for_each_child_of_node(root, node) {
475 if (!of_node_is_type(node, "pci") &&
476 !of_node_is_type(node, "pciex"))
477 continue;
478
479 phb = pcibios_alloc_controller(node);
480 if (!phb)
481 continue;
482 rtas_setup_phb(phb);
483 pci_process_bridge_OF_ranges(phb, node, 0);
484 isa_bridge_find_early(phb);
485 phb->controller_ops = pseries_pci_controller_ops;
486
487
488 pci_devs_phb_init_dynamic(phb);
489
490 pseries_msi_allocate_domains(phb);
491 }
492
493 of_node_put(root);
494
495
496
497
498
499 of_pci_check_probe_only();
500}
501
502static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
503{
504
505
506
507
508 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
509 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
510
511 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
512 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
513
514 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
515 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
516
517 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
518 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
519
520 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
521 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
522
523 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
524 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
525
526 if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST)
527 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
528
529 if (result->character & H_CPU_CHAR_BCCTR_LINK_FLUSH_ASSIST)
530 security_ftr_set(SEC_FTR_BCCTR_LINK_FLUSH_ASSIST);
531
532 if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE)
533 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
534
535 if (result->behaviour & H_CPU_BEHAV_FLUSH_LINK_STACK)
536 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK);
537
538
539
540
541
542
543
544 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) {
545 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
546 pseries_security_flavor = 0;
547 } else if (result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY_H)
548 pseries_security_flavor = 1;
549 else
550 pseries_security_flavor = 2;
551
552 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
553 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
554
555 if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY)
556 security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY);
557
558 if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS)
559 security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS);
560
561 if (result->behaviour & H_CPU_BEHAV_NO_STF_BARRIER)
562 security_ftr_clear(SEC_FTR_STF_BARRIER);
563
564 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
565 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
566}
567
568void pseries_setup_security_mitigations(void)
569{
570 struct h_cpu_char_result result;
571 enum l1d_flush_type types;
572 bool enable;
573 long rc;
574
575
576
577
578
579
580 powerpc_security_features = SEC_FTR_DEFAULT;
581
582 rc = plpar_get_cpu_characteristics(&result);
583 if (rc == H_SUCCESS)
584 init_cpu_char_feature_flags(&result);
585
586
587
588
589
590 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
591
592 types = L1D_FLUSH_FALLBACK;
593
594 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
595 types |= L1D_FLUSH_MTTRIG;
596
597 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
598 types |= L1D_FLUSH_ORI;
599
600 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
601 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
602
603 setup_rfi_flush(types, enable);
604 setup_count_cache_flush();
605
606 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
607 security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY);
608 setup_entry_flush(enable);
609
610 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
611 security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
612 setup_uaccess_flush(enable);
613
614 setup_stf_barrier();
615}
616
617#ifdef CONFIG_PCI_IOV
618enum rtas_iov_fw_value_map {
619 NUM_RES_PROPERTY = 0,
620 LOW_INT = 1,
621 START_OF_ENTRIES = 2,
622 APERTURE_PROPERTY = 2,
623 WDW_SIZE_PROPERTY = 4,
624 NEXT_ENTRY = 7
625};
626
627enum get_iov_fw_value_index {
628 BAR_ADDRS = 1,
629 APERTURE_SIZE = 2,
630 WDW_SIZE = 3
631};
632
633static resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno,
634 enum get_iov_fw_value_index value)
635{
636 const int *indexes;
637 struct device_node *dn = pci_device_to_OF_node(dev);
638 int i, num_res, ret = 0;
639
640 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
641 if (!indexes)
642 return 0;
643
644
645
646
647
648
649 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
650 if (resno >= num_res)
651 return 0;
652
653 i = START_OF_ENTRIES + NEXT_ENTRY * resno;
654 switch (value) {
655 case BAR_ADDRS:
656 ret = of_read_number(&indexes[i], 2);
657 break;
658 case APERTURE_SIZE:
659 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
660 break;
661 case WDW_SIZE:
662 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
663 break;
664 }
665
666 return ret;
667}
668
669static void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes)
670{
671 struct resource *res;
672 resource_size_t base, size;
673 int i, r, num_res;
674
675 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
676 num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS);
677 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
678 i += NEXT_ENTRY, r++) {
679 res = &dev->resource[r + PCI_IOV_RESOURCES];
680 base = of_read_number(&indexes[i], 2);
681 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
682 res->flags = pci_parse_of_flags(of_read_number
683 (&indexes[i + LOW_INT], 1), 0);
684 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED);
685 res->name = pci_name(dev);
686 res->start = base;
687 res->end = base + size - 1;
688 }
689}
690
691static void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes)
692{
693 struct resource *res, *root, *conflict;
694 resource_size_t base, size;
695 int i, r, num_res;
696
697
698
699
700
701
702 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
703 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
704 i += NEXT_ENTRY, r++) {
705 res = &dev->resource[r + PCI_IOV_RESOURCES];
706 base = of_read_number(&indexes[i], 2);
707 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
708 res->name = pci_name(dev);
709 res->start = base;
710 res->end = base + size - 1;
711 root = &iomem_resource;
712 dev_dbg(&dev->dev,
713 "pSeries IOV BAR %d: trying firmware assignment %pR\n",
714 r + PCI_IOV_RESOURCES, res);
715 conflict = request_resource_conflict(root, res);
716 if (conflict) {
717 dev_info(&dev->dev,
718 "BAR %d: %pR conflicts with %s %pR\n",
719 r + PCI_IOV_RESOURCES, res,
720 conflict->name, conflict);
721 res->flags |= IORESOURCE_UNSET;
722 }
723 }
724}
725
726static void pseries_disable_sriov_resources(struct pci_dev *pdev)
727{
728 int i;
729
730 pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n");
731 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
732 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0;
733}
734
735static void pseries_pci_fixup_resources(struct pci_dev *pdev)
736{
737 const int *indexes;
738 struct device_node *dn = pci_device_to_OF_node(pdev);
739
740
741 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
742 if (indexes)
743 of_pci_set_vf_bar_size(pdev, indexes);
744 else
745 pseries_disable_sriov_resources(pdev);
746}
747
748static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev)
749{
750 const int *indexes;
751 struct device_node *dn = pci_device_to_OF_node(pdev);
752
753 if (!pdev->is_physfn || pci_dev_is_added(pdev))
754 return;
755
756 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
757 if (indexes)
758 of_pci_parse_iov_addrs(pdev, indexes);
759 else
760 pseries_disable_sriov_resources(pdev);
761}
762
763static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev,
764 int resno)
765{
766 const __be32 *reg;
767 struct device_node *dn = pci_device_to_OF_node(pdev);
768
769
770 reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL);
771 if (!reg)
772 return pci_iov_resource_size(pdev, resno);
773
774 if (!pdev->is_physfn)
775 return 0;
776 return pseries_get_iov_fw_value(pdev,
777 resno - PCI_IOV_RESOURCES,
778 APERTURE_SIZE);
779}
780#endif
781
782static void __init pSeries_setup_arch(void)
783{
784 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
785
786
787 smp_init_pseries();
788
789
790 if (radix_enabled() && !mmu_has_feature(MMU_FTR_GTSE))
791 if (!firmware_has_feature(FW_FEATURE_RPT_INVALIDATE))
792 panic("BUG: Radix support requires either GTSE or RPT_INVALIDATE\n");
793
794
795
796
797
798
799
800 loops_per_jiffy = 50000000;
801
802 fwnmi_init();
803
804 pseries_setup_security_mitigations();
805 pseries_lpar_read_hblkrm_characteristics();
806
807
808 pci_add_flags(PCI_PROBE_ONLY);
809
810
811 init_pci_config_tokens();
812 of_reconfig_notifier_register(&pci_dn_reconfig_nb);
813
814 pSeries_nvram_init();
815
816 if (firmware_has_feature(FW_FEATURE_LPAR)) {
817 vpa_init(boot_cpuid);
818
819 if (lppaca_shared_proc(get_lppaca())) {
820 static_branch_enable(&shared_processor);
821 pv_spinlocks_init();
822 }
823
824 ppc_md.power_save = pseries_lpar_idle;
825 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
826#ifdef CONFIG_PCI_IOV
827 ppc_md.pcibios_fixup_resources =
828 pseries_pci_fixup_resources;
829 ppc_md.pcibios_fixup_sriov =
830 pseries_pci_fixup_iov_resources;
831 ppc_md.pcibios_iov_resource_alignment =
832 pseries_pci_iov_resource_alignment;
833#endif
834 } else {
835
836 ppc_md.enable_pmcs = power4_enable_pmcs;
837 }
838
839 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
840
841 if (swiotlb_force == SWIOTLB_FORCE)
842 ppc_swiotlb_enable = 1;
843}
844
845static void pseries_panic(char *str)
846{
847 panic_flush_kmsg_end();
848 rtas_os_term(str);
849}
850
851static int __init pSeries_init_panel(void)
852{
853
854#ifdef __BIG_ENDIAN__
855 ppc_md.progress("Linux ppc64\n", 0);
856#else
857 ppc_md.progress("Linux ppc64le\n", 0);
858#endif
859 ppc_md.progress(init_utsname()->version, 0);
860
861 return 0;
862}
863machine_arch_initcall(pseries, pSeries_init_panel);
864
865static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
866{
867 return plpar_hcall_norets(H_SET_DABR, dabr);
868}
869
870static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
871{
872
873 if (dabrx == 0 && dabr == 0)
874 dabrx = DABRX_USER;
875
876 dabrx &= DABRX_KERNEL | DABRX_USER;
877
878 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
879}
880
881static int pseries_set_dawr(int nr, unsigned long dawr, unsigned long dawrx)
882{
883
884 dawrx &= ~DAWRX_HYP;
885
886 if (nr == 0)
887 return plpar_set_watchpoint0(dawr, dawrx);
888 else
889 return plpar_set_watchpoint1(dawr, dawrx);
890}
891
892#define CMO_CHARACTERISTICS_TOKEN 44
893#define CMO_MAXLENGTH 1026
894
895void pSeries_coalesce_init(void)
896{
897 struct hvcall_mpp_x_data mpp_x_data;
898
899 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
900 powerpc_firmware_features |= FW_FEATURE_XCMO;
901 else
902 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
903}
904
905
906
907
908
909static void pSeries_cmo_feature_init(void)
910{
911 char *ptr, *key, *value, *end;
912 int call_status;
913 int page_order = IOMMU_PAGE_SHIFT_4K;
914
915 pr_debug(" -> fw_cmo_feature_init()\n");
916 spin_lock(&rtas_data_buf_lock);
917 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
918 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
919 NULL,
920 CMO_CHARACTERISTICS_TOKEN,
921 __pa(rtas_data_buf),
922 RTAS_DATA_BUF_SIZE);
923
924 if (call_status != 0) {
925 spin_unlock(&rtas_data_buf_lock);
926 pr_debug("CMO not available\n");
927 pr_debug(" <- fw_cmo_feature_init()\n");
928 return;
929 }
930
931 end = rtas_data_buf + CMO_MAXLENGTH - 2;
932 ptr = rtas_data_buf + 2;
933 key = value = ptr;
934
935 while (*ptr && (ptr <= end)) {
936
937
938
939 if (ptr[0] == '=') {
940 ptr[0] = '\0';
941 value = ptr + 1;
942 } else if (ptr[0] == '\0' || ptr[0] == ',') {
943
944 ptr[0] = '\0';
945
946 if (key == value) {
947 pr_debug("Malformed key/value pair\n");
948
949 break;
950 }
951
952 if (0 == strcmp(key, "CMOPageSize"))
953 page_order = simple_strtol(value, NULL, 10);
954 else if (0 == strcmp(key, "PrPSP"))
955 CMO_PrPSP = simple_strtol(value, NULL, 10);
956 else if (0 == strcmp(key, "SecPSP"))
957 CMO_SecPSP = simple_strtol(value, NULL, 10);
958 value = key = ptr + 1;
959 }
960 ptr++;
961 }
962
963
964
965
966 CMO_PageSize = 1 << page_order;
967 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
968
969 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
970 pr_info("CMO enabled\n");
971 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
972 CMO_SecPSP);
973 powerpc_firmware_features |= FW_FEATURE_CMO;
974 pSeries_coalesce_init();
975 } else
976 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
977 CMO_SecPSP);
978 spin_unlock(&rtas_data_buf_lock);
979 pr_debug(" <- fw_cmo_feature_init()\n");
980}
981
982
983
984
985static void __init pseries_init(void)
986{
987 pr_debug(" -> pseries_init()\n");
988
989#ifdef CONFIG_HVC_CONSOLE
990 if (firmware_has_feature(FW_FEATURE_LPAR))
991 hvc_vio_init_early();
992#endif
993 if (firmware_has_feature(FW_FEATURE_XDABR))
994 ppc_md.set_dabr = pseries_set_xdabr;
995 else if (firmware_has_feature(FW_FEATURE_DABR))
996 ppc_md.set_dabr = pseries_set_dabr;
997
998 if (firmware_has_feature(FW_FEATURE_SET_MODE))
999 ppc_md.set_dawr = pseries_set_dawr;
1000
1001 pSeries_cmo_feature_init();
1002 iommu_init_early_pSeries();
1003
1004 pr_debug(" <- pseries_init()\n");
1005}
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016static void pseries_power_off(void)
1017{
1018 int rc;
1019 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
1020
1021 if (rtas_flash_term_hook)
1022 rtas_flash_term_hook(SYS_POWER_OFF);
1023
1024 if (rtas_poweron_auto == 0 ||
1025 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
1026 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
1027 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
1028 } else {
1029 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
1030 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
1031 }
1032 for (;;);
1033}
1034
1035static int __init pSeries_probe(void)
1036{
1037 if (!of_node_is_type(of_root, "chrp"))
1038 return 0;
1039
1040
1041
1042
1043 if (of_machine_is_compatible("IBM,CPBW-1.0") ||
1044 of_machine_is_compatible("IBM,CBEA"))
1045 return 0;
1046
1047 pm_power_off = pseries_power_off;
1048
1049 pr_debug("Machine is%s LPAR !\n",
1050 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
1051
1052 pseries_init();
1053
1054 return 1;
1055}
1056
1057static int pSeries_pci_probe_mode(struct pci_bus *bus)
1058{
1059 if (firmware_has_feature(FW_FEATURE_LPAR))
1060 return PCI_PROBE_DEVTREE;
1061 return PCI_PROBE_NORMAL;
1062}
1063
1064struct pci_controller_ops pseries_pci_controller_ops = {
1065 .probe_mode = pSeries_pci_probe_mode,
1066};
1067
1068define_machine(pseries) {
1069 .name = "pSeries",
1070 .probe = pSeries_probe,
1071 .setup_arch = pSeries_setup_arch,
1072 .init_IRQ = pseries_init_irq,
1073 .show_cpuinfo = pSeries_show_cpuinfo,
1074 .log_error = pSeries_log_error,
1075 .discover_phbs = pSeries_discover_phbs,
1076 .pcibios_fixup = pSeries_final_fixup,
1077 .restart = rtas_restart,
1078 .halt = rtas_halt,
1079 .panic = pseries_panic,
1080 .get_boot_time = rtas_get_boot_time,
1081 .get_rtc_time = rtas_get_rtc_time,
1082 .set_rtc_time = rtas_set_rtc_time,
1083 .calibrate_decr = generic_calibrate_decr,
1084 .progress = rtas_progress,
1085 .system_reset_exception = pSeries_system_reset_exception,
1086 .machine_check_early = pseries_machine_check_realmode,
1087 .machine_check_exception = pSeries_machine_check_exception,
1088#ifdef CONFIG_KEXEC_CORE
1089 .machine_kexec = pSeries_machine_kexec,
1090 .kexec_cpu_down = pseries_kexec_cpu_down,
1091#endif
1092#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
1093 .memory_block_size = pseries_memory_block_size,
1094#endif
1095};
1096