LXR linux/arch/s390/include/asm/cpu

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * CPU-measurement facilities
   4 *
   5 *  Copyright IBM Corp. 2012, 2018
   6 *  Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
   7 *             Jan Glauber <jang@linux.vnet.ibm.com>
   8 */
   9#ifndef _ASM_S390_CPU_MF_H
  10#define _ASM_S390_CPU_MF_H
  11
  12#include <linux/errno.h>
  13#include <asm/facility.h>
  14
  15asm(".include \"asm/cpu_mf-insn.h\"\n");
  16
  17#define CPU_MF_INT_SF_IAE       (1 << 31)       /* invalid entry address */
  18#define CPU_MF_INT_SF_ISE       (1 << 30)       /* incorrect SDBT entry */
  19#define CPU_MF_INT_SF_PRA       (1 << 29)       /* program request alert */
  20#define CPU_MF_INT_SF_SACA      (1 << 23)       /* sampler auth. change alert */
  21#define CPU_MF_INT_SF_LSDA      (1 << 22)       /* loss of sample data alert */
  22#define CPU_MF_INT_CF_MTDA      (1 << 15)       /* loss of MT ctr. data alert */
  23#define CPU_MF_INT_CF_CACA      (1 <<  7)       /* counter auth. change alert */
  24#define CPU_MF_INT_CF_LCDA      (1 <<  6)       /* loss of counter data alert */
  25#define CPU_MF_INT_CF_MASK      (CPU_MF_INT_CF_MTDA|CPU_MF_INT_CF_CACA| \
  26                                 CPU_MF_INT_CF_LCDA)
  27#define CPU_MF_INT_SF_MASK      (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE|   \
  28                                 CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA|  \
  29                                 CPU_MF_INT_SF_LSDA)
  30
  31#define CPU_MF_SF_RIBM_NOTAV    0x1             /* Sampling unavailable */
  32
  33/* CPU measurement facility support */
  34static inline int cpum_cf_avail(void)
  35{
  36        return test_facility(40) && test_facility(67);
  37}
  38
  39static inline int cpum_sf_avail(void)
  40{
  41        return test_facility(40) && test_facility(68);
  42}
  43
  44
  45struct cpumf_ctr_info {
  46        u16   cfvn;
  47        u16   auth_ctl;
  48        u16   enable_ctl;
  49        u16   act_ctl;
  50        u16   max_cpu;
  51        u16   csvn;
  52        u16   max_cg;
  53        u16   reserved1;
  54        u32   reserved2[12];
  55} __packed;
  56
  57/* QUERY SAMPLING INFORMATION block */
  58struct hws_qsi_info_block {         /* Bit(s) */
  59        unsigned int b0_13:14;      /* 0-13: zeros                       */
  60        unsigned int as:1;          /* 14: basic-sampling authorization  */
  61        unsigned int ad:1;          /* 15: diag-sampling authorization   */
  62        unsigned int b16_21:6;      /* 16-21: zeros                      */
  63        unsigned int es:1;          /* 22: basic-sampling enable control */
  64        unsigned int ed:1;          /* 23: diag-sampling enable control  */
  65        unsigned int b24_29:6;      /* 24-29: zeros                      */
  66        unsigned int cs:1;          /* 30: basic-sampling activation control */
  67        unsigned int cd:1;          /* 31: diag-sampling activation control */
  68        unsigned int bsdes:16;      /* 4-5: size of basic sampling entry */
  69        unsigned int dsdes:16;      /* 6-7: size of diagnostic sampling entry */
  70        unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
  71        unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
  72        unsigned long tear;         /* 24-31: TEAR contents              */
  73        unsigned long dear;         /* 32-39: DEAR contents              */
  74        unsigned int rsvrd0:24;     /* 40-42: reserved                   */
  75        unsigned int ribm:8;        /* 43: Reserved by IBM               */
  76        unsigned int cpu_speed;     /* 44-47: CPU speed                  */
  77        unsigned long long rsvrd1;  /* 48-55: reserved                   */
  78        unsigned long long rsvrd2;  /* 56-63: reserved                   */
  79} __packed;
  80
  81/* SET SAMPLING CONTROLS request block */
  82struct hws_lsctl_request_block {
  83        unsigned int s:1;           /* 0: maximum buffer indicator       */
  84        unsigned int h:1;           /* 1: part. level reserved for VM use*/
  85        unsigned long long b2_53:52;/* 2-53: zeros                       */
  86        unsigned int es:1;          /* 54: basic-sampling enable control */
  87        unsigned int ed:1;          /* 55: diag-sampling enable control  */
  88        unsigned int b56_61:6;      /* 56-61: - zeros                    */
  89        unsigned int cs:1;          /* 62: basic-sampling activation control */
  90        unsigned int cd:1;          /* 63: diag-sampling activation control  */
  91        unsigned long interval;     /* 8-15: sampling interval           */
  92        unsigned long tear;         /* 16-23: TEAR contents              */
  93        unsigned long dear;         /* 24-31: DEAR contents              */
  94        /* 32-63:                                                        */
  95        unsigned long rsvrd1;       /* reserved                          */
  96        unsigned long rsvrd2;       /* reserved                          */
  97        unsigned long rsvrd3;       /* reserved                          */
  98        unsigned long rsvrd4;       /* reserved                          */
  99} __packed;
 100
 101struct hws_basic_entry {
 102        unsigned int def:16;        /* 0-15  Data Entry Format           */
 103        unsigned int R:4;           /* 16-19 reserved                    */
 104        unsigned int U:4;           /* 20-23 Number of unique instruct.  */
 105        unsigned int z:2;           /* zeros                             */
 106        unsigned int T:1;           /* 26 PSW DAT mode                   */
 107        unsigned int W:1;           /* 27 PSW wait state                 */
 108        unsigned int P:1;           /* 28 PSW Problem state              */
 109        unsigned int AS:2;          /* 29-30 PSW address-space control   */
 110        unsigned int I:1;           /* 31 entry valid or invalid         */
 111        unsigned int CL:2;          /* 32-33 Configuration Level         */
 112        unsigned int:14;
 113        unsigned int prim_asn:16;   /* primary ASN                       */
 114        unsigned long long ia;      /* Instruction Address               */
 115        unsigned long long gpp;     /* Guest Program Parameter           */
 116        unsigned long long hpp;     /* Host Program Parameter            */
 117} __packed;
 118
 119struct hws_diag_entry {
 120        unsigned int def:16;        /* 0-15  Data Entry Format           */
 121        unsigned int R:15;          /* 16-19 and 20-30 reserved          */
 122        unsigned int I:1;           /* 31 entry valid or invalid         */
 123        u8           data[];        /* Machine-dependent sample data     */
 124} __packed;
 125
 126struct hws_combined_entry {
 127        struct hws_basic_entry  basic;  /* Basic-sampling data entry */
 128        struct hws_diag_entry   diag;   /* Diagnostic-sampling data entry */
 129} __packed;
 130
 131struct hws_trailer_entry {
 132        union {
 133                struct {
 134                        unsigned int f:1;       /* 0 - Block Full Indicator   */
 135                        unsigned int a:1;       /* 1 - Alert request control  */
 136                        unsigned int t:1;       /* 2 - Timestamp format       */
 137                        unsigned int :29;       /* 3 - 31: Reserved           */
 138                        unsigned int bsdes:16;  /* 32-47: size of basic SDE   */
 139                        unsigned int dsdes:16;  /* 48-63: size of diagnostic SDE */
 140                };
 141                unsigned long long flags;       /* 0 - 63: All indicators     */
 142        };
 143        unsigned long long overflow;     /* 64 - sample Overflow count        */
 144        unsigned char timestamp[16];     /* 16 - 31 timestamp                 */
 145        unsigned long long reserved1;    /* 32 -Reserved                      */
 146        unsigned long long reserved2;    /*                                   */
 147        union {                          /* 48 - reserved for programming use */
 148                struct {
 149                        unsigned int clock_base:1; /* in progusage2 */
 150                        unsigned long long progusage1:63;
 151                        unsigned long long progusage2;
 152                };
 153                unsigned long long progusage[2];
 154        };
 155} __packed;
 156
 157/* Load program parameter */
 158static inline void lpp(void *pp)
 159{
 160        asm volatile(".insn s,0xb2800000,0(%0)\n":: "a" (pp) : "memory");
 161}
 162
 163/* Query counter information */
 164static inline int qctri(struct cpumf_ctr_info *info)
 165{
 166        int rc = -EINVAL;
 167
 168        asm volatile (
 169                "0:     .insn   s,0xb28e0000,%1\n"
 170                "1:     lhi     %0,0\n"
 171                "2:\n"
 172                EX_TABLE(1b, 2b)
 173                : "+d" (rc), "=Q" (*info));
 174        return rc;
 175}
 176
 177/* Load CPU-counter-set controls */
 178static inline int lcctl(u64 ctl)
 179{
 180        int cc;
 181
 182        asm volatile (
 183                "       .insn   s,0xb2840000,%1\n"
 184                "       ipm     %0\n"
 185                "       srl     %0,28\n"
 186                : "=d" (cc) : "Q" (ctl) : "cc");
 187        return cc;
 188}
 189
 190/* Extract CPU counter */
 191static inline int __ecctr(u64 ctr, u64 *content)
 192{
 193        u64 _content;
 194        int cc;
 195
 196        asm volatile (
 197                "       .insn   rre,0xb2e40000,%0,%2\n"
 198                "       ipm     %1\n"
 199                "       srl     %1,28\n"
 200                : "=d" (_content), "=d" (cc) : "d" (ctr) : "cc");
 201        *content = _content;
 202        return cc;
 203}
 204
 205/* Extract CPU counter */
 206static inline int ecctr(u64 ctr, u64 *val)
 207{
 208        u64 content;
 209        int cc;
 210
 211        cc = __ecctr(ctr, &content);
 212        if (!cc)
 213                *val = content;
 214        return cc;
 215}
 216
 217/* Store CPU counter multiple for a particular counter set */
 218enum stcctm_ctr_set {
 219        EXTENDED = 0,
 220        BASIC = 1,
 221        PROBLEM_STATE = 2,
 222        CRYPTO_ACTIVITY = 3,
 223        MT_DIAG = 5,
 224        MT_DIAG_CLEARING = 9,   /* clears loss-of-MT-ctr-data alert */
 225};
 226
 227static __always_inline int stcctm(enum stcctm_ctr_set set, u64 range, u64 *dest)
 228{
 229        int cc;
 230
 231        asm volatile (
 232                "       STCCTM  %2,%3,%1\n"
 233                "       ipm     %0\n"
 234                "       srl     %0,28\n"
 235                : "=d" (cc)
 236                : "Q" (*dest), "d" (range), "i" (set)
 237                : "cc", "memory");
 238        return cc;
 239}
 240
 241/* Query sampling information */
 242static inline int qsi(struct hws_qsi_info_block *info)
 243{
 244        int cc = 1;
 245
 246        asm volatile(
 247                "0:     .insn   s,0xb2860000,%1\n"
 248                "1:     lhi     %0,0\n"
 249                "2:\n"
 250                EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
 251                : "+d" (cc), "+Q" (*info));
 252        return cc ? -EINVAL : 0;
 253}
 254
 255/* Load sampling controls */
 256static inline int lsctl(struct hws_lsctl_request_block *req)
 257{
 258        int cc;
 259
 260        cc = 1;
 261        asm volatile(
 262                "0:     .insn   s,0xb2870000,0(%1)\n"
 263                "1:     ipm     %0\n"
 264                "       srl     %0,28\n"
 265                "2:\n"
 266                EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
 267                : "+d" (cc), "+a" (req)
 268                : "m" (*req)
 269                : "cc", "memory");
 270
 271        return cc ? -EINVAL : 0;
 272}
 273
 274/* Sampling control helper functions */
 275
 276#include <linux/time.h>
 277
 278static inline unsigned long freq_to_sample_rate(struct hws_qsi_info_block *qsi,
 279                                                unsigned long freq)
 280{
 281        return (USEC_PER_SEC / freq) * qsi->cpu_speed;
 282}
 283
 284static inline unsigned long sample_rate_to_freq(struct hws_qsi_info_block *qsi,
 285                                                unsigned long rate)
 286{
 287        return USEC_PER_SEC * qsi->cpu_speed / rate;
 288}
 289
 290#define SDB_TE_ALERT_REQ_MASK   0x4000000000000000UL
 291#define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL
 292
 293/* Return TOD timestamp contained in an trailer entry */
 294static inline unsigned long long trailer_timestamp(struct hws_trailer_entry *te)
 295{
 296        /* TOD in STCKE format */
 297        if (te->t)
 298                return *((unsigned long long *) &te->timestamp[1]);
 299
 300        /* TOD in STCK format */
 301        return *((unsigned long long *) &te->timestamp[0]);
 302}
 303
 304/* Return pointer to trailer entry of an sample data block */
 305static inline unsigned long *trailer_entry_ptr(unsigned long v)
 306{
 307        void *ret;
 308
 309        ret = (void *) v;
 310        ret += PAGE_SIZE;
 311        ret -= sizeof(struct hws_trailer_entry);
 312
 313        return (unsigned long *) ret;
 314}
 315
 316/* Return true if the entry in the sample data block table (sdbt)
 317 * is a link to the next sdbt */
 318static inline int is_link_entry(unsigned long *s)
 319{
 320        return *s & 0x1ul ? 1 : 0;
 321}
 322
 323/* Return pointer to the linked sdbt */
 324static inline unsigned long *get_next_sdbt(unsigned long *s)
 325{
 326        return (unsigned long *) (*s & ~0x1ul);
 327}
 328#endif /* _ASM_S390_CPU_MF_H */
 329