LXR linux/arch/s390/pci/pci

   1// SPDX-License-Identifier: GPL-2.0
   2#define KMSG_COMPONENT "zpci"
   3#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
   4
   5#include <linux/kernel.h>
   6#include <linux/irq.h>
   7#include <linux/kernel_stat.h>
   8#include <linux/pci.h>
   9#include <linux/msi.h>
  10#include <linux/smp.h>
  11
  12#include <asm/isc.h>
  13#include <asm/airq.h>
  14
  15static enum {FLOATING, DIRECTED} irq_delivery;
  16
  17#define SIC_IRQ_MODE_ALL                0
  18#define SIC_IRQ_MODE_SINGLE             1
  19#define SIC_IRQ_MODE_DIRECT             4
  20#define SIC_IRQ_MODE_D_ALL              16
  21#define SIC_IRQ_MODE_D_SINGLE           17
  22#define SIC_IRQ_MODE_SET_CPU            18
  23
  24/*
  25 * summary bit vector
  26 * FLOATING - summary bit per function
  27 * DIRECTED - summary bit per cpu (only used in fallback path)
  28 */
  29static struct airq_iv *zpci_sbv;
  30
  31/*
  32 * interrupt bit vectors
  33 * FLOATING - interrupt bit vector per function
  34 * DIRECTED - interrupt bit vector per cpu
  35 */
  36static struct airq_iv **zpci_ibv;
  37
  38/* Modify PCI: Register floating adapter interruptions */
  39static int zpci_set_airq(struct zpci_dev *zdev)
  40{
  41        u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  42        struct zpci_fib fib = {0};
  43        u8 status;
  44
  45        fib.fmt0.isc = PCI_ISC;
  46        fib.fmt0.sum = 1;       /* enable summary notifications */
  47        fib.fmt0.noi = airq_iv_end(zdev->aibv);
  48        fib.fmt0.aibv = (unsigned long) zdev->aibv->vector;
  49        fib.fmt0.aibvo = 0;     /* each zdev has its own interrupt vector */
  50        fib.fmt0.aisb = (unsigned long) zpci_sbv->vector + (zdev->aisb/64)*8;
  51        fib.fmt0.aisbo = zdev->aisb & 63;
  52
  53        return zpci_mod_fc(req, &fib, &status) ? -EIO : 0;
  54}
  55
  56/* Modify PCI: Unregister floating adapter interruptions */
  57static int zpci_clear_airq(struct zpci_dev *zdev)
  58{
  59        u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_DEREG_INT);
  60        struct zpci_fib fib = {0};
  61        u8 cc, status;
  62
  63        cc = zpci_mod_fc(req, &fib, &status);
  64        if (cc == 3 || (cc == 1 && status == 24))
  65                /* Function already gone or IRQs already deregistered. */
  66                cc = 0;
  67
  68        return cc ? -EIO : 0;
  69}
  70
  71/* Modify PCI: Register CPU directed interruptions */
  72static int zpci_set_directed_irq(struct zpci_dev *zdev)
  73{
  74        u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT_D);
  75        struct zpci_fib fib = {0};
  76        u8 status;
  77
  78        fib.fmt = 1;
  79        fib.fmt1.noi = zdev->msi_nr_irqs;
  80        fib.fmt1.dibvo = zdev->msi_first_bit;
  81
  82        return zpci_mod_fc(req, &fib, &status) ? -EIO : 0;
  83}
  84
  85/* Modify PCI: Unregister CPU directed interruptions */
  86static int zpci_clear_directed_irq(struct zpci_dev *zdev)
  87{
  88        u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_DEREG_INT_D);
  89        struct zpci_fib fib = {0};
  90        u8 cc, status;
  91
  92        fib.fmt = 1;
  93        cc = zpci_mod_fc(req, &fib, &status);
  94        if (cc == 3 || (cc == 1 && status == 24))
  95                /* Function already gone or IRQs already deregistered. */
  96                cc = 0;
  97
  98        return cc ? -EIO : 0;
  99}
 100
 101/* Register adapter interruptions */
 102int zpci_set_irq(struct zpci_dev *zdev)
 103{
 104        int rc;
 105
 106        if (irq_delivery == DIRECTED)
 107                rc = zpci_set_directed_irq(zdev);
 108        else
 109                rc = zpci_set_airq(zdev);
 110
 111        if (!rc)
 112                zdev->irqs_registered = 1;
 113
 114        return rc;
 115}
 116
 117/* Clear adapter interruptions */
 118int zpci_clear_irq(struct zpci_dev *zdev)
 119{
 120        int rc;
 121
 122        if (irq_delivery == DIRECTED)
 123                rc = zpci_clear_directed_irq(zdev);
 124        else
 125                rc = zpci_clear_airq(zdev);
 126
 127        if (!rc)
 128                zdev->irqs_registered = 0;
 129
 130        return rc;
 131}
 132
 133static int zpci_set_irq_affinity(struct irq_data *data, const struct cpumask *dest,
 134                                 bool force)
 135{
 136        struct msi_desc *entry = irq_get_msi_desc(data->irq);
 137        struct msi_msg msg = entry->msg;
 138        int cpu_addr = smp_cpu_get_cpu_address(cpumask_first(dest));
 139
 140        msg.address_lo &= 0xff0000ff;
 141        msg.address_lo |= (cpu_addr << 8);
 142        pci_write_msi_msg(data->irq, &msg);
 143
 144        return IRQ_SET_MASK_OK;
 145}
 146
 147static struct irq_chip zpci_irq_chip = {
 148        .name = "PCI-MSI",
 149        .irq_unmask = pci_msi_unmask_irq,
 150        .irq_mask = pci_msi_mask_irq,
 151};
 152
 153static void zpci_handle_cpu_local_irq(bool rescan)
 154{
 155        struct airq_iv *dibv = zpci_ibv[smp_processor_id()];
 156        unsigned long bit;
 157        int irqs_on = 0;
 158
 159        for (bit = 0;;) {
 160                /* Scan the directed IRQ bit vector */
 161                bit = airq_iv_scan(dibv, bit, airq_iv_end(dibv));
 162                if (bit == -1UL) {
 163                        if (!rescan || irqs_on++)
 164                                /* End of second scan with interrupts on. */
 165                                break;
 166                        /* First scan complete, reenable interrupts. */
 167                        if (zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC))
 168                                break;
 169                        bit = 0;
 170                        continue;
 171                }
 172                inc_irq_stat(IRQIO_MSI);
 173                generic_handle_irq(airq_iv_get_data(dibv, bit));
 174        }
 175}
 176
 177struct cpu_irq_data {
 178        call_single_data_t csd;
 179        atomic_t scheduled;
 180};
 181static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_irq_data, irq_data);
 182
 183static void zpci_handle_remote_irq(void *data)
 184{
 185        atomic_t *scheduled = data;
 186
 187        do {
 188                zpci_handle_cpu_local_irq(false);
 189        } while (atomic_dec_return(scheduled));
 190}
 191
 192static void zpci_handle_fallback_irq(void)
 193{
 194        struct cpu_irq_data *cpu_data;
 195        unsigned long cpu;
 196        int irqs_on = 0;
 197
 198        for (cpu = 0;;) {
 199                cpu = airq_iv_scan(zpci_sbv, cpu, airq_iv_end(zpci_sbv));
 200                if (cpu == -1UL) {
 201                        if (irqs_on++)
 202                                /* End of second scan with interrupts on. */
 203                                break;
 204                        /* First scan complete, reenable interrupts. */
 205                        if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC))
 206                                break;
 207                        cpu = 0;
 208                        continue;
 209                }
 210                cpu_data = &per_cpu(irq_data, cpu);
 211                if (atomic_inc_return(&cpu_data->scheduled) > 1)
 212                        continue;
 213
 214                INIT_CSD(&cpu_data->csd, zpci_handle_remote_irq, &cpu_data->scheduled);
 215                smp_call_function_single_async(cpu, &cpu_data->csd);
 216        }
 217}
 218
 219static void zpci_directed_irq_handler(struct airq_struct *airq, bool floating)
 220{
 221        if (floating) {
 222                inc_irq_stat(IRQIO_PCF);
 223                zpci_handle_fallback_irq();
 224        } else {
 225                inc_irq_stat(IRQIO_PCD);
 226                zpci_handle_cpu_local_irq(true);
 227        }
 228}
 229
 230static void zpci_floating_irq_handler(struct airq_struct *airq, bool floating)
 231{
 232        unsigned long si, ai;
 233        struct airq_iv *aibv;
 234        int irqs_on = 0;
 235
 236        inc_irq_stat(IRQIO_PCF);
 237        for (si = 0;;) {
 238                /* Scan adapter summary indicator bit vector */
 239                si = airq_iv_scan(zpci_sbv, si, airq_iv_end(zpci_sbv));
 240                if (si == -1UL) {
 241                        if (irqs_on++)
 242                                /* End of second scan with interrupts on. */
 243                                break;
 244                        /* First scan complete, reenable interrupts. */
 245                        if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC))
 246                                break;
 247                        si = 0;
 248                        continue;
 249                }
 250
 251                /* Scan the adapter interrupt vector for this device. */
 252                aibv = zpci_ibv[si];
 253                for (ai = 0;;) {
 254                        ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
 255                        if (ai == -1UL)
 256                                break;
 257                        inc_irq_stat(IRQIO_MSI);
 258                        airq_iv_lock(aibv, ai);
 259                        generic_handle_irq(airq_iv_get_data(aibv, ai));
 260                        airq_iv_unlock(aibv, ai);
 261                }
 262        }
 263}
 264
 265int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
 266{
 267        struct zpci_dev *zdev = to_zpci(pdev);
 268        unsigned int hwirq, msi_vecs, cpu;
 269        unsigned long bit;
 270        struct msi_desc *msi;
 271        struct msi_msg msg;
 272        int cpu_addr;
 273        int rc, irq;
 274
 275        zdev->aisb = -1UL;
 276        zdev->msi_first_bit = -1U;
 277        if (type == PCI_CAP_ID_MSI && nvec > 1)
 278                return 1;
 279        msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
 280
 281        if (irq_delivery == DIRECTED) {
 282                /* Allocate cpu vector bits */
 283                bit = airq_iv_alloc(zpci_ibv[0], msi_vecs);
 284                if (bit == -1UL)
 285                        return -EIO;
 286        } else {
 287                /* Allocate adapter summary indicator bit */
 288                bit = airq_iv_alloc_bit(zpci_sbv);
 289                if (bit == -1UL)
 290                        return -EIO;
 291                zdev->aisb = bit;
 292
 293                /* Create adapter interrupt vector */
 294                zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
 295                if (!zdev->aibv)
 296                        return -ENOMEM;
 297
 298                /* Wire up shortcut pointer */
 299                zpci_ibv[bit] = zdev->aibv;
 300                /* Each function has its own interrupt vector */
 301                bit = 0;
 302        }
 303
 304        /* Request MSI interrupts */
 305        hwirq = bit;
 306        for_each_pci_msi_entry(msi, pdev) {
 307                rc = -EIO;
 308                if (hwirq - bit >= msi_vecs)
 309                        break;
 310                irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE,
 311                                (irq_delivery == DIRECTED) ?
 312                                msi->affinity : NULL);
 313                if (irq < 0)
 314                        return -ENOMEM;
 315                rc = irq_set_msi_desc(irq, msi);
 316                if (rc)
 317                        return rc;
 318                irq_set_chip_and_handler(irq, &zpci_irq_chip,
 319                                         handle_percpu_irq);
 320                msg.data = hwirq - bit;
 321                if (irq_delivery == DIRECTED) {
 322                        if (msi->affinity)
 323                                cpu = cpumask_first(&msi->affinity->mask);
 324                        else
 325                                cpu = 0;
 326                        cpu_addr = smp_cpu_get_cpu_address(cpu);
 327
 328                        msg.address_lo = zdev->msi_addr & 0xff0000ff;
 329                        msg.address_lo |= (cpu_addr << 8);
 330
 331                        for_each_possible_cpu(cpu) {
 332                                airq_iv_set_data(zpci_ibv[cpu], hwirq, irq);
 333                        }
 334                } else {
 335                        msg.address_lo = zdev->msi_addr & 0xffffffff;
 336                        airq_iv_set_data(zdev->aibv, hwirq, irq);
 337                }
 338                msg.address_hi = zdev->msi_addr >> 32;
 339                pci_write_msi_msg(irq, &msg);
 340                hwirq++;
 341        }
 342
 343        zdev->msi_first_bit = bit;
 344        zdev->msi_nr_irqs = msi_vecs;
 345
 346        rc = zpci_set_irq(zdev);
 347        if (rc)
 348                return rc;
 349
 350        return (msi_vecs == nvec) ? 0 : msi_vecs;
 351}
 352
 353void arch_teardown_msi_irqs(struct pci_dev *pdev)
 354{
 355        struct zpci_dev *zdev = to_zpci(pdev);
 356        struct msi_desc *msi;
 357        int rc;
 358
 359        /* Disable interrupts */
 360        rc = zpci_clear_irq(zdev);
 361        if (rc)
 362                return;
 363
 364        /* Release MSI interrupts */
 365        for_each_pci_msi_entry(msi, pdev) {
 366                if (!msi->irq)
 367                        continue;
 368                irq_set_msi_desc(msi->irq, NULL);
 369                irq_free_desc(msi->irq);
 370                msi->msg.address_lo = 0;
 371                msi->msg.address_hi = 0;
 372                msi->msg.data = 0;
 373                msi->irq = 0;
 374        }
 375
 376        if (zdev->aisb != -1UL) {
 377                zpci_ibv[zdev->aisb] = NULL;
 378                airq_iv_free_bit(zpci_sbv, zdev->aisb);
 379                zdev->aisb = -1UL;
 380        }
 381        if (zdev->aibv) {
 382                airq_iv_release(zdev->aibv);
 383                zdev->aibv = NULL;
 384        }
 385
 386        if ((irq_delivery == DIRECTED) && zdev->msi_first_bit != -1U)
 387                airq_iv_free(zpci_ibv[0], zdev->msi_first_bit, zdev->msi_nr_irqs);
 388}
 389
 390static struct airq_struct zpci_airq = {
 391        .handler = zpci_floating_irq_handler,
 392        .isc = PCI_ISC,
 393};
 394
 395static void __init cpu_enable_directed_irq(void *unused)
 396{
 397        union zpci_sic_iib iib = {{0}};
 398
 399        iib.cdiib.dibv_addr = (u64) zpci_ibv[smp_processor_id()]->vector;
 400
 401        __zpci_set_irq_ctrl(SIC_IRQ_MODE_SET_CPU, 0, &iib);
 402        zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC);
 403}
 404
 405static int __init zpci_directed_irq_init(void)
 406{
 407        union zpci_sic_iib iib = {{0}};
 408        unsigned int cpu;
 409
 410        zpci_sbv = airq_iv_create(num_possible_cpus(), 0);
 411        if (!zpci_sbv)
 412                return -ENOMEM;
 413
 414        iib.diib.isc = PCI_ISC;
 415        iib.diib.nr_cpus = num_possible_cpus();
 416        iib.diib.disb_addr = (u64) zpci_sbv->vector;
 417        __zpci_set_irq_ctrl(SIC_IRQ_MODE_DIRECT, 0, &iib);
 418
 419        zpci_ibv = kcalloc(num_possible_cpus(), sizeof(*zpci_ibv),
 420                           GFP_KERNEL);
 421        if (!zpci_ibv)
 422                return -ENOMEM;
 423
 424        for_each_possible_cpu(cpu) {
 425                /*
 426                 * Per CPU IRQ vectors look the same but bit-allocation
 427                 * is only done on the first vector.
 428                 */
 429                zpci_ibv[cpu] = airq_iv_create(cache_line_size() * BITS_PER_BYTE,
 430                                               AIRQ_IV_DATA |
 431                                               AIRQ_IV_CACHELINE |
 432                                               (!cpu ? AIRQ_IV_ALLOC : 0));
 433                if (!zpci_ibv[cpu])
 434                        return -ENOMEM;
 435        }
 436        on_each_cpu(cpu_enable_directed_irq, NULL, 1);
 437
 438        zpci_irq_chip.irq_set_affinity = zpci_set_irq_affinity;
 439
 440        return 0;
 441}
 442
 443static int __init zpci_floating_irq_init(void)
 444{
 445        zpci_ibv = kcalloc(ZPCI_NR_DEVICES, sizeof(*zpci_ibv), GFP_KERNEL);
 446        if (!zpci_ibv)
 447                return -ENOMEM;
 448
 449        zpci_sbv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC);
 450        if (!zpci_sbv)
 451                goto out_free;
 452
 453        return 0;
 454
 455out_free:
 456        kfree(zpci_ibv);
 457        return -ENOMEM;
 458}
 459
 460int __init zpci_irq_init(void)
 461{
 462        int rc;
 463
 464        irq_delivery = sclp.has_dirq ? DIRECTED : FLOATING;
 465        if (s390_pci_force_floating)
 466                irq_delivery = FLOATING;
 467
 468        if (irq_delivery == DIRECTED)
 469                zpci_airq.handler = zpci_directed_irq_handler;
 470
 471        rc = register_adapter_interrupt(&zpci_airq);
 472        if (rc)
 473                goto out;
 474        /* Set summary to 1 to be called every time for the ISC. */
 475        *zpci_airq.lsi_ptr = 1;
 476
 477        switch (irq_delivery) {
 478        case FLOATING:
 479                rc = zpci_floating_irq_init();
 480                break;
 481        case DIRECTED:
 482                rc = zpci_directed_irq_init();
 483                break;
 484        }
 485
 486        if (rc)
 487                goto out_airq;
 488
 489        /*
 490         * Enable floating IRQs (with suppression after one IRQ). When using
 491         * directed IRQs this enables the fallback path.
 492         */
 493        zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC);
 494
 495        return 0;
 496out_airq:
 497        unregister_adapter_interrupt(&zpci_airq);
 498out:
 499        return rc;
 500}
 501
 502void __init zpci_irq_exit(void)
 503{
 504        unsigned int cpu;
 505
 506        if (irq_delivery == DIRECTED) {
 507                for_each_possible_cpu(cpu) {
 508                        airq_iv_release(zpci_ibv[cpu]);
 509                }
 510        }
 511        kfree(zpci_ibv);
 512        if (zpci_sbv)
 513                airq_iv_release(zpci_sbv);
 514        unregister_adapter_interrupt(&zpci_airq);
 515}
 516