1
2#ifndef __ASM_SH_PCI_H
3#define __ASM_SH_PCI_H
4
5
6
7
8
9#define pcibios_assign_all_busses() 1
10
11
12
13
14
15struct pci_channel {
16 struct pci_channel *next;
17 struct pci_bus *bus;
18
19 struct pci_ops *pci_ops;
20
21 struct resource *resources;
22 unsigned int nr_resources;
23
24 unsigned long io_offset;
25 unsigned long mem_offset;
26
27 unsigned long reg_base;
28 unsigned long io_map_base;
29
30 unsigned int index;
31 unsigned int need_domain_info;
32
33
34 struct timer_list err_timer, serr_timer;
35 unsigned int err_irq, serr_irq;
36};
37
38
39extern raw_spinlock_t pci_config_lock;
40
41extern int register_pci_controller(struct pci_channel *hose);
42extern void pcibios_report_status(unsigned int status_mask, int warn);
43
44
45extern int early_read_config_byte(struct pci_channel *hose, int top_bus,
46 int bus, int devfn, int offset, u8 *value);
47extern int early_read_config_word(struct pci_channel *hose, int top_bus,
48 int bus, int devfn, int offset, u16 *value);
49extern int early_read_config_dword(struct pci_channel *hose, int top_bus,
50 int bus, int devfn, int offset, u32 *value);
51extern int early_write_config_byte(struct pci_channel *hose, int top_bus,
52 int bus, int devfn, int offset, u8 value);
53extern int early_write_config_word(struct pci_channel *hose, int top_bus,
54 int bus, int devfn, int offset, u16 value);
55extern int early_write_config_dword(struct pci_channel *hose, int top_bus,
56 int bus, int devfn, int offset, u32 value);
57extern void pcibios_enable_timers(struct pci_channel *hose);
58extern unsigned int pcibios_handle_status_errors(unsigned long addr,
59 unsigned int status, struct pci_channel *hose);
60extern int pci_is_66mhz_capable(struct pci_channel *hose,
61 int top_bus, int current_bus);
62
63extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;
64
65#define HAVE_PCI_MMAP
66#define ARCH_GENERIC_PCI_MMAP_RESOURCE
67
68
69
70
71
72#ifdef CONFIG_PCI
73
74
75
76
77#define PCI_DISABLE_MWI
78#endif
79
80
81int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin);
82
83#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
84
85static inline int pci_proc_domain(struct pci_bus *bus)
86{
87 struct pci_channel *hose = bus->sysdata;
88 return hose->need_domain_info;
89}
90
91
92static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
93{
94 return channel ? 15 : 14;
95}
96
97#endif
98