LXR linux/arch/sparc/include/asm/ns87303.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* ns87303.h: Configuration Register Description for the
   3 *            National Semiconductor PC87303 (SuperIO).
   4 *
   5 * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
   6 */
   7
   8#ifndef _SPARC_NS87303_H
   9#define _SPARC_NS87303_H 1
  10
  11/*
  12 * Control Register Index Values
  13 */
  14#define FER     0x00
  15#define FAR     0x01
  16#define PTR     0x02
  17#define FCR     0x03
  18#define PCR     0x04
  19#define KRR     0x05
  20#define PMC     0x06
  21#define TUP     0x07
  22#define SID     0x08
  23#define ASC     0x09
  24#define CS0CF0  0x0a
  25#define CS0CF1  0x0b
  26#define CS1CF0  0x0c
  27#define CS1CF1  0x0d
  28
  29/* Function Enable Register (FER) bits */
  30#define FER_EDM         0x10    /* Encoded Drive and Motor pin information   */
  31
  32/* Function Address Register (FAR) bits */
  33#define FAR_LPT_MASK    0x03
  34#define FAR_LPTB        0x00
  35#define FAR_LPTA        0x01
  36#define FAR_LPTC        0x02
  37
  38/* Power and Test Register (PTR) bits */
  39#define PTR_LPTB_IRQ7   0x08
  40#define PTR_LEVEL_IRQ   0x80    /* When not ECP/EPP: Use level IRQ           */
  41#define PTR_LPT_REG_DIR 0x80    /* When ECP/EPP: LPT CTR controls direction */
  42                                /*               of the parallel port        */
  43
  44/* Function Control Register (FCR) bits */
  45#define FCR_LDE         0x10    /* Logical Drive Exchange                    */
  46#define FCR_ZWS_ENA     0x20    /* Enable short host read/write in ECP/EPP   */
  47
  48/* Printer Control Register (PCR) bits */
  49#define PCR_EPP_ENABLE  0x01
  50#define PCR_EPP_IEEE    0x02    /* Enable EPP Version 1.9 (IEEE 1284)        */
  51#define PCR_ECP_ENABLE  0x04
  52#define PCR_ECP_CLK_ENA 0x08    /* If 0 ECP Clock is stopped on Power down   */
  53#define PCR_IRQ_POLAR   0x20    /* If 0 IRQ is level high or negative pulse, */
  54                                /* if 1 polarity is inverted                 */
  55#define PCR_IRQ_ODRAIN  0x40    /* If 1, IRQ is open drain                   */
  56
  57/* Tape UARTs and Parallel Port Config Register (TUP) bits */
  58#define TUP_EPP_TIMO    0x02    /* Enable EPP timeout IRQ                    */
  59
  60/* Advanced SuperIO Config Register (ASC) bits */
  61#define ASC_LPT_IRQ7    0x01    /* Always use IRQ7 for LPT                  */
  62#define ASC_DRV2_SEL    0x02    /* Logical Drive Exchange controlled by TDR  */
  63
  64#define FER_RESERVED    0x00
  65#define FAR_RESERVED    0x00
  66#define PTR_RESERVED    0x73
  67#define FCR_RESERVED    0xc4
  68#define PCR_RESERVED    0x10
  69#define KRR_RESERVED    0x00
  70#define PMC_RESERVED    0x98
  71#define TUP_RESERVED    0xfb
  72#define SIP_RESERVED    0x00
  73#define ASC_RESERVED    0x18
  74#define CS0CF0_RESERVED 0x00
  75#define CS0CF1_RESERVED 0x08
  76#define CS1CF0_RESERVED 0x00
  77#define CS1CF1_RESERVED 0x08
  78
  79#ifdef __KERNEL__
  80
  81#include <linux/spinlock.h>
  82
  83#include <asm/io.h>
  84
  85extern spinlock_t ns87303_lock;
  86
  87static inline int ns87303_modify(unsigned long port, unsigned int index,
  88                                     unsigned char clr, unsigned char set)
  89{
  90        static unsigned char reserved[] = {
  91                FER_RESERVED, FAR_RESERVED, PTR_RESERVED, FCR_RESERVED,
  92                PCR_RESERVED, KRR_RESERVED, PMC_RESERVED, TUP_RESERVED,
  93                SIP_RESERVED, ASC_RESERVED, CS0CF0_RESERVED, CS0CF1_RESERVED,
  94                CS1CF0_RESERVED, CS1CF1_RESERVED
  95        };
  96        unsigned long flags;
  97        unsigned char value;
  98
  99        if (index > 0x0d)
 100                return -EINVAL;
 101
 102        spin_lock_irqsave(&ns87303_lock, flags);
 103
 104        outb(index, port);
 105        value = inb(port + 1);
 106        value &= ~(reserved[index] | clr);
 107        value |= set;
 108        outb(value, port + 1);
 109        outb(value, port + 1);
 110
 111        spin_unlock_irqrestore(&ns87303_lock, flags);
 112
 113        return 0;
 114}
 115
 116#endif /* __KERNEL__ */
 117
 118#endif /* !(_SPARC_NS87303_H) */
 119