1
2#ifndef _ASM_X86_ACPI_H
3#define _ASM_X86_ACPI_H
4
5
6
7
8
9#include <acpi/pdc_intel.h>
10
11#include <asm/numa.h>
12#include <asm/fixmap.h>
13#include <asm/processor.h>
14#include <asm/mmu.h>
15#include <asm/mpspec.h>
16#include <asm/x86_init.h>
17
18#ifdef CONFIG_ACPI_APEI
19# include <asm/pgtable_types.h>
20#endif
21
22#ifdef CONFIG_ACPI
23extern int acpi_lapic;
24extern int acpi_ioapic;
25extern int acpi_noirq;
26extern int acpi_strict;
27extern int acpi_disabled;
28extern int acpi_pci_disabled;
29extern int acpi_skip_timer_override;
30extern int acpi_use_timer_override;
31extern int acpi_fix_pin2_polarity;
32extern int acpi_disable_cmcff;
33
34extern u8 acpi_sci_flags;
35extern u32 acpi_sci_override_gsi;
36void acpi_pic_sci_set_trigger(unsigned int, u16);
37
38struct device;
39
40extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
41 int trigger, int polarity);
42extern void (*__acpi_unregister_gsi)(u32 gsi);
43
44static inline void disable_acpi(void)
45{
46 acpi_disabled = 1;
47 acpi_pci_disabled = 1;
48 acpi_noirq = 1;
49}
50
51extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
52
53static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
54static inline void acpi_disable_pci(void)
55{
56 acpi_pci_disabled = 1;
57 acpi_noirq_set();
58}
59
60
61extern int (*acpi_suspend_lowlevel)(void);
62
63
64unsigned long acpi_get_wakeup_address(void);
65
66
67
68
69static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
70{
71
72
73
74
75
76
77 if (boot_cpu_data.x86 == 0x0F &&
78 boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
79 boot_cpu_data.x86_model <= 0x05 &&
80 boot_cpu_data.x86_stepping < 0x0A)
81 return 1;
82 else if (boot_cpu_has(X86_BUG_AMD_APIC_C1E))
83 return 1;
84 else
85 return max_cstate;
86}
87
88static inline bool arch_has_acpi_pdc(void)
89{
90 struct cpuinfo_x86 *c = &cpu_data(0);
91 return (c->x86_vendor == X86_VENDOR_INTEL ||
92 c->x86_vendor == X86_VENDOR_CENTAUR);
93}
94
95static inline void arch_acpi_set_pdc_bits(u32 *buf)
96{
97 struct cpuinfo_x86 *c = &cpu_data(0);
98
99 buf[2] |= ACPI_PDC_C_CAPABILITY_SMP;
100
101 if (cpu_has(c, X86_FEATURE_EST))
102 buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;
103
104 if (cpu_has(c, X86_FEATURE_ACPI))
105 buf[2] |= ACPI_PDC_T_FFH;
106
107
108
109
110 if (!cpu_has(c, X86_FEATURE_MWAIT))
111 buf[2] &= ~(ACPI_PDC_C_C2C3_FFH);
112}
113
114static inline bool acpi_has_cpu_in_madt(void)
115{
116 return !!acpi_lapic;
117}
118
119#define ACPI_HAVE_ARCH_SET_ROOT_POINTER
120static inline void acpi_arch_set_root_pointer(u64 addr)
121{
122 x86_init.acpi.set_root_pointer(addr);
123}
124
125#define ACPI_HAVE_ARCH_GET_ROOT_POINTER
126static inline u64 acpi_arch_get_root_pointer(void)
127{
128 return x86_init.acpi.get_root_pointer();
129}
130
131void acpi_generic_reduced_hw_init(void);
132
133void x86_default_set_root_pointer(u64 addr);
134u64 x86_default_get_root_pointer(void);
135
136#else
137
138#define acpi_lapic 0
139#define acpi_ioapic 0
140#define acpi_disable_cmcff 0
141static inline void acpi_noirq_set(void) { }
142static inline void acpi_disable_pci(void) { }
143static inline void disable_acpi(void) { }
144
145static inline void acpi_generic_reduced_hw_init(void) { }
146
147static inline void x86_default_set_root_pointer(u64 addr) { }
148
149static inline u64 x86_default_get_root_pointer(void)
150{
151 return 0;
152}
153
154#endif
155
156#define ARCH_HAS_POWER_INIT 1
157
158#ifdef CONFIG_ACPI_NUMA
159extern int x86_acpi_numa_init(void);
160#endif
161
162struct cper_ia_proc_ctx;
163
164#ifdef CONFIG_ACPI_APEI
165static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
166{
167
168
169
170
171
172
173
174
175
176
177
178
179
180 return PAGE_KERNEL_NOENC;
181}
182
183int arch_apei_report_x86_error(struct cper_ia_proc_ctx *ctx_info,
184 u64 lapic_id);
185#else
186static inline int arch_apei_report_x86_error(struct cper_ia_proc_ctx *ctx_info,
187 u64 lapic_id)
188{
189 return -EINVAL;
190}
191#endif
192
193#define ACPI_TABLE_UPGRADE_MAX_PHYS (max_low_pfn_mapped << PAGE_SHIFT)
194
195#endif
196