1
2#ifndef _ASM_X86_MSHYPER_H
3#define _ASM_X86_MSHYPER_H
4
5#include <linux/types.h>
6#include <linux/nmi.h>
7#include <linux/msi.h>
8#include <asm/io.h>
9#include <asm/hyperv-tlfs.h>
10#include <asm/nospec-branch.h>
11#include <asm/paravirt.h>
12#include <asm/mshyperv.h>
13
14typedef int (*hyperv_fill_flush_list_func)(
15 struct hv_guest_mapping_flush_list *flush,
16 void *data);
17
18static inline void hv_set_register(unsigned int reg, u64 value)
19{
20 wrmsrl(reg, value);
21}
22
23static inline u64 hv_get_register(unsigned int reg)
24{
25 u64 value;
26
27 rdmsrl(reg, value);
28 return value;
29}
30
31#define hv_get_raw_timer() rdtsc_ordered()
32
33void hyperv_vector_handler(struct pt_regs *regs);
34
35#if IS_ENABLED(CONFIG_HYPERV)
36extern int hyperv_init_cpuhp;
37
38extern void *hv_hypercall_pg;
39
40extern u64 hv_current_partition_id;
41
42int hv_call_deposit_pages(int node, u64 partition_id, u32 num_pages);
43int hv_call_add_logical_proc(int node, u32 lp_index, u32 acpi_id);
44int hv_call_create_vp(int node, u64 partition_id, u32 vp_index, u32 flags);
45
46static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
47{
48 u64 input_address = input ? virt_to_phys(input) : 0;
49 u64 output_address = output ? virt_to_phys(output) : 0;
50 u64 hv_status;
51
52#ifdef CONFIG_X86_64
53 if (!hv_hypercall_pg)
54 return U64_MAX;
55
56 __asm__ __volatile__("mov %4, %%r8\n"
57 CALL_NOSPEC
58 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
59 "+c" (control), "+d" (input_address)
60 : "r" (output_address),
61 THUNK_TARGET(hv_hypercall_pg)
62 : "cc", "memory", "r8", "r9", "r10", "r11");
63#else
64 u32 input_address_hi = upper_32_bits(input_address);
65 u32 input_address_lo = lower_32_bits(input_address);
66 u32 output_address_hi = upper_32_bits(output_address);
67 u32 output_address_lo = lower_32_bits(output_address);
68
69 if (!hv_hypercall_pg)
70 return U64_MAX;
71
72 __asm__ __volatile__(CALL_NOSPEC
73 : "=A" (hv_status),
74 "+c" (input_address_lo), ASM_CALL_CONSTRAINT
75 : "A" (control),
76 "b" (input_address_hi),
77 "D"(output_address_hi), "S"(output_address_lo),
78 THUNK_TARGET(hv_hypercall_pg)
79 : "cc", "memory");
80#endif
81 return hv_status;
82}
83
84
85static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
86{
87 u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
88
89#ifdef CONFIG_X86_64
90 {
91 __asm__ __volatile__(CALL_NOSPEC
92 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
93 "+c" (control), "+d" (input1)
94 : THUNK_TARGET(hv_hypercall_pg)
95 : "cc", "r8", "r9", "r10", "r11");
96 }
97#else
98 {
99 u32 input1_hi = upper_32_bits(input1);
100 u32 input1_lo = lower_32_bits(input1);
101
102 __asm__ __volatile__ (CALL_NOSPEC
103 : "=A"(hv_status),
104 "+c"(input1_lo),
105 ASM_CALL_CONSTRAINT
106 : "A" (control),
107 "b" (input1_hi),
108 THUNK_TARGET(hv_hypercall_pg)
109 : "cc", "edi", "esi");
110 }
111#endif
112 return hv_status;
113}
114
115
116static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
117{
118 u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
119
120#ifdef CONFIG_X86_64
121 {
122 __asm__ __volatile__("mov %4, %%r8\n"
123 CALL_NOSPEC
124 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
125 "+c" (control), "+d" (input1)
126 : "r" (input2),
127 THUNK_TARGET(hv_hypercall_pg)
128 : "cc", "r8", "r9", "r10", "r11");
129 }
130#else
131 {
132 u32 input1_hi = upper_32_bits(input1);
133 u32 input1_lo = lower_32_bits(input1);
134 u32 input2_hi = upper_32_bits(input2);
135 u32 input2_lo = lower_32_bits(input2);
136
137 __asm__ __volatile__ (CALL_NOSPEC
138 : "=A"(hv_status),
139 "+c"(input1_lo), ASM_CALL_CONSTRAINT
140 : "A" (control), "b" (input1_hi),
141 "D"(input2_hi), "S"(input2_lo),
142 THUNK_TARGET(hv_hypercall_pg)
143 : "cc");
144 }
145#endif
146 return hv_status;
147}
148
149extern struct hv_vp_assist_page **hv_vp_assist_page;
150
151static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
152{
153 if (!hv_vp_assist_page)
154 return NULL;
155
156 return hv_vp_assist_page[cpu];
157}
158
159void __init hyperv_init(void);
160void hyperv_setup_mmu_ops(void);
161void set_hv_tscchange_cb(void (*cb)(void));
162void clear_hv_tscchange_cb(void);
163void hyperv_stop_tsc_emulation(void);
164int hyperv_flush_guest_mapping(u64 as);
165int hyperv_flush_guest_mapping_range(u64 as,
166 hyperv_fill_flush_list_func fill_func, void *data);
167int hyperv_fill_flush_guest_mapping_list(
168 struct hv_guest_mapping_flush_list *flush,
169 u64 start_gfn, u64 end_gfn);
170
171#ifdef CONFIG_X86_64
172void hv_apic_init(void);
173void __init hv_init_spinlocks(void);
174bool hv_vcpu_is_preempted(int vcpu);
175#else
176static inline void hv_apic_init(void) {}
177#endif
178
179static inline void hv_set_msi_entry_from_desc(union hv_msi_entry *msi_entry,
180 struct msi_desc *msi_desc)
181{
182 msi_entry->address.as_uint32 = msi_desc->msg.address_lo;
183 msi_entry->data.as_uint32 = msi_desc->msg.data;
184}
185
186struct irq_domain *hv_create_pci_msi_domain(void);
187
188int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector,
189 struct hv_interrupt_entry *entry);
190int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);
191
192#else
193static inline void hyperv_init(void) {}
194static inline void hyperv_setup_mmu_ops(void) {}
195static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
196static inline void clear_hv_tscchange_cb(void) {}
197static inline void hyperv_stop_tsc_emulation(void) {};
198static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
199{
200 return NULL;
201}
202static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
203static inline int hyperv_flush_guest_mapping_range(u64 as,
204 hyperv_fill_flush_list_func fill_func, void *data)
205{
206 return -1;
207}
208#endif
209
210
211#include <asm-generic/mshyperv.h>
212
213#endif
214
