1
2#ifndef _ASM_X86_MSI_H
3#define _ASM_X86_MSI_H
4#include <asm/hw_irq.h>
5#include <asm/irqdomain.h>
6
7typedef struct irq_alloc_info msi_alloc_info_t;
8
9int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
10 msi_alloc_info_t *arg);
11
12
13
14typedef struct x86_msi_data {
15 u32 vector : 8,
16 delivery_mode : 3,
17 dest_mode_logical : 1,
18 reserved : 2,
19 active_low : 1,
20 is_level : 1;
21
22 u32 dmar_subhandle;
23} __attribute__ ((packed)) arch_msi_msg_data_t;
24#define arch_msi_msg_data x86_msi_data
25
26typedef struct x86_msi_addr_lo {
27 union {
28 struct {
29 u32 reserved_0 : 2,
30 dest_mode_logical : 1,
31 redirect_hint : 1,
32 reserved_1 : 1,
33 virt_destid_8_14 : 7,
34 destid_0_7 : 8,
35 base_address : 12;
36 };
37 struct {
38 u32 dmar_reserved_0 : 2,
39 dmar_index_15 : 1,
40 dmar_subhandle_valid : 1,
41 dmar_format : 1,
42 dmar_index_0_14 : 15,
43 dmar_base_address : 12;
44 };
45 };
46} __attribute__ ((packed)) arch_msi_msg_addr_lo_t;
47#define arch_msi_msg_addr_lo x86_msi_addr_lo
48
49#define X86_MSI_BASE_ADDRESS_LOW (0xfee00000 >> 20)
50
51typedef struct x86_msi_addr_hi {
52 u32 reserved : 8,
53 destid_8_31 : 24;
54} __attribute__ ((packed)) arch_msi_msg_addr_hi_t;
55#define arch_msi_msg_addr_hi x86_msi_addr_hi
56
57#define X86_MSI_BASE_ADDRESS_HIGH (0)
58
59struct msi_msg;
60u32 x86_msi_msg_get_destid(struct msi_msg *msg, bool extid);
61
62#endif
63
