1
2#ifndef _ASM_X86_MSR_H
3#define _ASM_X86_MSR_H
4
5#include "msr-index.h"
6
7#ifndef __ASSEMBLY__
8
9#include <asm/asm.h>
10#include <asm/errno.h>
11#include <asm/cpumask.h>
12#include <uapi/asm/msr.h>
13
14struct msr {
15 union {
16 struct {
17 u32 l;
18 u32 h;
19 };
20 u64 q;
21 };
22};
23
24struct msr_info {
25 u32 msr_no;
26 struct msr reg;
27 struct msr *msrs;
28 int err;
29};
30
31struct msr_regs_info {
32 u32 *regs;
33 int err;
34};
35
36struct saved_msr {
37 bool valid;
38 struct msr_info info;
39};
40
41struct saved_msrs {
42 unsigned int num;
43 struct saved_msr *array;
44};
45
46
47
48
49
50
51
52#ifdef CONFIG_X86_64
53
54#define DECLARE_ARGS(val, low, high) unsigned long low, high
55#define EAX_EDX_VAL(val, low, high) ((low) | (high) << 32)
56#define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
57#else
58#define DECLARE_ARGS(val, low, high) unsigned long long val
59#define EAX_EDX_VAL(val, low, high) (val)
60#define EAX_EDX_RET(val, low, high) "=A" (val)
61#endif
62
63
64
65
66#include <asm/atomic.h>
67#include <linux/tracepoint-defs.h>
68
69#ifdef CONFIG_TRACEPOINTS
70DECLARE_TRACEPOINT(read_msr);
71DECLARE_TRACEPOINT(write_msr);
72DECLARE_TRACEPOINT(rdpmc);
73extern void do_trace_write_msr(unsigned int msr, u64 val, int failed);
74extern void do_trace_read_msr(unsigned int msr, u64 val, int failed);
75extern void do_trace_rdpmc(unsigned int msr, u64 val, int failed);
76#else
77static inline void do_trace_write_msr(unsigned int msr, u64 val, int failed) {}
78static inline void do_trace_read_msr(unsigned int msr, u64 val, int failed) {}
79static inline void do_trace_rdpmc(unsigned int msr, u64 val, int failed) {}
80#endif
81
82
83
84
85
86
87
88
89static __always_inline unsigned long long __rdmsr(unsigned int msr)
90{
91 DECLARE_ARGS(val, low, high);
92
93 asm volatile("1: rdmsr\n"
94 "2:\n"
95 _ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_rdmsr_unsafe)
96 : EAX_EDX_RET(val, low, high) : "c" (msr));
97
98 return EAX_EDX_VAL(val, low, high);
99}
100
101static __always_inline void __wrmsr(unsigned int msr, u32 low, u32 high)
102{
103 asm volatile("1: wrmsr\n"
104 "2:\n"
105 _ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_wrmsr_unsafe)
106 : : "c" (msr), "a"(low), "d" (high) : "memory");
107}
108
109#define native_rdmsr(msr, val1, val2) \
110do { \
111 u64 __val = __rdmsr((msr)); \
112 (void)((val1) = (u32)__val); \
113 (void)((val2) = (u32)(__val >> 32)); \
114} while (0)
115
116#define native_wrmsr(msr, low, high) \
117 __wrmsr(msr, low, high)
118
119#define native_wrmsrl(msr, val) \
120 __wrmsr((msr), (u32)((u64)(val)), \
121 (u32)((u64)(val) >> 32))
122
123static inline unsigned long long native_read_msr(unsigned int msr)
124{
125 unsigned long long val;
126
127 val = __rdmsr(msr);
128
129 if (tracepoint_enabled(read_msr))
130 do_trace_read_msr(msr, val, 0);
131
132 return val;
133}
134
135static inline unsigned long long native_read_msr_safe(unsigned int msr,
136 int *err)
137{
138 DECLARE_ARGS(val, low, high);
139
140 asm volatile("2: rdmsr ; xor %[err],%[err]\n"
141 "1:\n\t"
142 ".section .fixup,\"ax\"\n\t"
143 "3: mov %[fault],%[err]\n\t"
144 "xorl %%eax, %%eax\n\t"
145 "xorl %%edx, %%edx\n\t"
146 "jmp 1b\n\t"
147 ".previous\n\t"
148 _ASM_EXTABLE(2b, 3b)
149 : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
150 : "c" (msr), [fault] "i" (-EIO));
151 if (tracepoint_enabled(read_msr))
152 do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), *err);
153 return EAX_EDX_VAL(val, low, high);
154}
155
156
157static inline void notrace
158native_write_msr(unsigned int msr, u32 low, u32 high)
159{
160 __wrmsr(msr, low, high);
161
162 if (tracepoint_enabled(write_msr))
163 do_trace_write_msr(msr, ((u64)high << 32 | low), 0);
164}
165
166
167static inline int notrace
168native_write_msr_safe(unsigned int msr, u32 low, u32 high)
169{
170 int err;
171
172 asm volatile("2: wrmsr ; xor %[err],%[err]\n"
173 "1:\n\t"
174 ".section .fixup,\"ax\"\n\t"
175 "3: mov %[fault],%[err] ; jmp 1b\n\t"
176 ".previous\n\t"
177 _ASM_EXTABLE(2b, 3b)
178 : [err] "=a" (err)
179 : "c" (msr), "0" (low), "d" (high),
180 [fault] "i" (-EIO)
181 : "memory");
182 if (tracepoint_enabled(write_msr))
183 do_trace_write_msr(msr, ((u64)high << 32 | low), err);
184 return err;
185}
186
187extern int rdmsr_safe_regs(u32 regs[8]);
188extern int wrmsr_safe_regs(u32 regs[8]);
189
190
191
192
193
194
195
196
197
198
199static __always_inline unsigned long long rdtsc(void)
200{
201 DECLARE_ARGS(val, low, high);
202
203 asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
204
205 return EAX_EDX_VAL(val, low, high);
206}
207
208
209
210
211
212
213
214
215
216static __always_inline unsigned long long rdtsc_ordered(void)
217{
218 DECLARE_ARGS(val, low, high);
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234 asm volatile(ALTERNATIVE_2("rdtsc",
235 "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC,
236 "rdtscp", X86_FEATURE_RDTSCP)
237 : EAX_EDX_RET(val, low, high)
238
239 :: "ecx");
240
241 return EAX_EDX_VAL(val, low, high);
242}
243
244static inline unsigned long long native_read_pmc(int counter)
245{
246 DECLARE_ARGS(val, low, high);
247
248 asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
249 if (tracepoint_enabled(rdpmc))
250 do_trace_rdpmc(counter, EAX_EDX_VAL(val, low, high), 0);
251 return EAX_EDX_VAL(val, low, high);
252}
253
254#ifdef CONFIG_PARAVIRT_XXL
255#include <asm/paravirt.h>
256#else
257#include <linux/errno.h>
258
259
260
261
262
263
264#define rdmsr(msr, low, high) \
265do { \
266 u64 __val = native_read_msr((msr)); \
267 (void)((low) = (u32)__val); \
268 (void)((high) = (u32)(__val >> 32)); \
269} while (0)
270
271static inline void wrmsr(unsigned int msr, u32 low, u32 high)
272{
273 native_write_msr(msr, low, high);
274}
275
276#define rdmsrl(msr, val) \
277 ((val) = native_read_msr((msr)))
278
279static inline void wrmsrl(unsigned int msr, u64 val)
280{
281 native_write_msr(msr, (u32)(val & 0xffffffffULL), (u32)(val >> 32));
282}
283
284
285static inline int wrmsr_safe(unsigned int msr, u32 low, u32 high)
286{
287 return native_write_msr_safe(msr, low, high);
288}
289
290
291#define rdmsr_safe(msr, low, high) \
292({ \
293 int __err; \
294 u64 __val = native_read_msr_safe((msr), &__err); \
295 (*low) = (u32)__val; \
296 (*high) = (u32)(__val >> 32); \
297 __err; \
298})
299
300static inline int rdmsrl_safe(unsigned int msr, unsigned long long *p)
301{
302 int err;
303
304 *p = native_read_msr_safe(msr, &err);
305 return err;
306}
307
308#define rdpmc(counter, low, high) \
309do { \
310 u64 _l = native_read_pmc((counter)); \
311 (low) = (u32)_l; \
312 (high) = (u32)(_l >> 32); \
313} while (0)
314
315#define rdpmcl(counter, val) ((val) = native_read_pmc(counter))
316
317#endif
318
319
320
321
322static inline int wrmsrl_safe(u32 msr, u64 val)
323{
324 return wrmsr_safe(msr, (u32)val, (u32)(val >> 32));
325}
326
327struct msr *msrs_alloc(void);
328void msrs_free(struct msr *msrs);
329int msr_set_bit(u32 msr, u8 bit);
330int msr_clear_bit(u32 msr, u8 bit);
331
332#ifdef CONFIG_SMP
333int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
334int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
335int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
336int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
337void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
338void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
339int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
340int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
341int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
342int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
343int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
344int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
345#else
346static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
347{
348 rdmsr(msr_no, *l, *h);
349 return 0;
350}
351static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
352{
353 wrmsr(msr_no, l, h);
354 return 0;
355}
356static inline int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
357{
358 rdmsrl(msr_no, *q);
359 return 0;
360}
361static inline int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
362{
363 wrmsrl(msr_no, q);
364 return 0;
365}
366static inline void rdmsr_on_cpus(const struct cpumask *m, u32 msr_no,
367 struct msr *msrs)
368{
369 rdmsr_on_cpu(0, msr_no, &(msrs[0].l), &(msrs[0].h));
370}
371static inline void wrmsr_on_cpus(const struct cpumask *m, u32 msr_no,
372 struct msr *msrs)
373{
374 wrmsr_on_cpu(0, msr_no, msrs[0].l, msrs[0].h);
375}
376static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
377 u32 *l, u32 *h)
378{
379 return rdmsr_safe(msr_no, l, h);
380}
381static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
382{
383 return wrmsr_safe(msr_no, l, h);
384}
385static inline int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
386{
387 return rdmsrl_safe(msr_no, q);
388}
389static inline int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
390{
391 return wrmsrl_safe(msr_no, q);
392}
393static inline int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
394{
395 return rdmsr_safe_regs(regs);
396}
397static inline int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
398{
399 return wrmsr_safe_regs(regs);
400}
401#endif
402#endif
403#endif
404