LXR linux/arch/x86/include/asm/page

   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef _ASM_X86_PAGE_64_H
   3#define _ASM_X86_PAGE_64_H
   4
   5#include <asm/page_64_types.h>
   6
   7#ifndef __ASSEMBLY__
   8#include <asm/alternative.h>
   9
  10/* duplicated to the one in bootmem.h */
  11extern unsigned long max_pfn;
  12extern unsigned long phys_base;
  13
  14extern unsigned long page_offset_base;
  15extern unsigned long vmalloc_base;
  16extern unsigned long vmemmap_base;
  17
  18static inline unsigned long __phys_addr_nodebug(unsigned long x)
  19{
  20        unsigned long y = x - __START_KERNEL_map;
  21
  22        /* use the carry flag to determine if x was < __START_KERNEL_map */
  23        x = y + ((x > y) ? phys_base : (__START_KERNEL_map - PAGE_OFFSET));
  24
  25        return x;
  26}
  27
  28#ifdef CONFIG_DEBUG_VIRTUAL
  29extern unsigned long __phys_addr(unsigned long);
  30extern unsigned long __phys_addr_symbol(unsigned long);
  31#else
  32#define __phys_addr(x)          __phys_addr_nodebug(x)
  33#define __phys_addr_symbol(x) \
  34        ((unsigned long)(x) - __START_KERNEL_map + phys_base)
  35#endif
  36
  37#define __phys_reloc_hide(x)    (x)
  38
  39#ifdef CONFIG_FLATMEM
  40#define pfn_valid(pfn)          ((pfn) < max_pfn)
  41#endif
  42
  43void clear_page_orig(void *page);
  44void clear_page_rep(void *page);
  45void clear_page_erms(void *page);
  46
  47static inline void clear_page(void *page)
  48{
  49        alternative_call_2(clear_page_orig,
  50                           clear_page_rep, X86_FEATURE_REP_GOOD,
  51                           clear_page_erms, X86_FEATURE_ERMS,
  52                           "=D" (page),
  53                           "0" (page)
  54                           : "cc", "memory", "rax", "rcx");
  55}
  56
  57void copy_page(void *to, void *from);
  58
  59#ifdef CONFIG_X86_5LEVEL
  60/*
  61 * User space process size.  This is the first address outside the user range.
  62 * There are a few constraints that determine this:
  63 *
  64 * On Intel CPUs, if a SYSCALL instruction is at the highest canonical
  65 * address, then that syscall will enter the kernel with a
  66 * non-canonical return address, and SYSRET will explode dangerously.
  67 * We avoid this particular problem by preventing anything
  68 * from being mapped at the maximum canonical address.
  69 *
  70 * On AMD CPUs in the Ryzen family, there's a nasty bug in which the
  71 * CPUs malfunction if they execute code from the highest canonical page.
  72 * They'll speculate right off the end of the canonical space, and
  73 * bad things happen.  This is worked around in the same way as the
  74 * Intel problem.
  75 *
  76 * With page table isolation enabled, we map the LDT in ... [stay tuned]
  77 */
  78static __always_inline unsigned long task_size_max(void)
  79{
  80        unsigned long ret;
  81
  82        alternative_io("movq %[small],%0","movq %[large],%0",
  83                        X86_FEATURE_LA57,
  84                        "=r" (ret),
  85                        [small] "i" ((1ul << 47)-PAGE_SIZE),
  86                        [large] "i" ((1ul << 56)-PAGE_SIZE));
  87
  88        return ret;
  89}
  90#endif  /* CONFIG_X86_5LEVEL */
  91
  92#endif  /* !__ASSEMBLY__ */
  93
  94#ifdef CONFIG_X86_VSYSCALL_EMULATION
  95# define __HAVE_ARCH_GATE_AREA 1
  96#endif
  97
  98#endif /* _ASM_X86_PAGE_64_H */
  99