linux/arch/xtensa/include/asm/irqflags.h
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   1/*
   2 * Xtensa IRQ flags handling functions
   3 *
   4 * This file is subject to the terms and conditions of the GNU General Public
   5 * License.  See the file "COPYING" in the main directory of this archive
   6 * for more details.
   7 *
   8 * Copyright (C) 2001 - 2005 Tensilica Inc.
   9 * Copyright (C) 2015 Cadence Design Systems Inc.
  10 */
  11
  12#ifndef _XTENSA_IRQFLAGS_H
  13#define _XTENSA_IRQFLAGS_H
  14
  15#include <linux/stringify.h>
  16#include <linux/types.h>
  17#include <asm/processor.h>
  18
  19static inline unsigned long arch_local_save_flags(void)
  20{
  21        unsigned long flags;
  22        asm volatile("rsr %0, ps" : "=a" (flags));
  23        return flags;
  24}
  25
  26static inline unsigned long arch_local_irq_save(void)
  27{
  28        unsigned long flags;
  29#if XTENSA_FAKE_NMI
  30#if defined(CONFIG_DEBUG_MISC) && (LOCKLEVEL | TOPLEVEL) >= XCHAL_DEBUGLEVEL
  31        unsigned long tmp;
  32
  33        asm volatile("rsr       %0, ps\t\n"
  34                     "extui     %1, %0, 0, 4\t\n"
  35                     "bgei      %1, "__stringify(LOCKLEVEL)", 1f\t\n"
  36                     "rsil      %0, "__stringify(LOCKLEVEL)"\n"
  37                     "1:"
  38                     : "=a" (flags), "=a" (tmp) :: "memory");
  39#else
  40        asm volatile("rsr       %0, ps\t\n"
  41                     "or        %0, %0, %1\t\n"
  42                     "xsr       %0, ps\t\n"
  43                     "rsync"
  44                     : "=&a" (flags) : "a" (LOCKLEVEL) : "memory");
  45#endif
  46#else
  47        asm volatile("rsil      %0, "__stringify(LOCKLEVEL)
  48                     : "=a" (flags) :: "memory");
  49#endif
  50        return flags;
  51}
  52
  53static inline void arch_local_irq_disable(void)
  54{
  55        arch_local_irq_save();
  56}
  57
  58static inline void arch_local_irq_enable(void)
  59{
  60        unsigned long flags;
  61        asm volatile("rsil %0, 0" : "=a" (flags) :: "memory");
  62}
  63
  64static inline void arch_local_irq_restore(unsigned long flags)
  65{
  66        asm volatile("wsr %0, ps; rsync"
  67                     :: "a" (flags) : "memory");
  68}
  69
  70static inline bool arch_irqs_disabled_flags(unsigned long flags)
  71{
  72#if XCHAL_EXCM_LEVEL < LOCKLEVEL || (1 << PS_EXCM_BIT) < LOCKLEVEL
  73#error "XCHAL_EXCM_LEVEL and 1<<PS_EXCM_BIT must be no less than LOCKLEVEL"
  74#endif
  75        return (flags & (PS_INTLEVEL_MASK | (1 << PS_EXCM_BIT))) >= LOCKLEVEL;
  76}
  77
  78static inline bool arch_irqs_disabled(void)
  79{
  80        return arch_irqs_disabled_flags(arch_local_save_flags());
  81}
  82
  83#endif /* _XTENSA_IRQFLAGS_H */
  84