linux/drivers/char/xillybus/xillybus_pcie.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * linux/drivers/misc/xillybus_pcie.c
   4 *
   5 * Copyright 2011 Xillybus Ltd, http://xillybus.com
   6 *
   7 * Driver for the Xillybus FPGA/host framework using PCI Express.
   8 */
   9
  10#include <linux/module.h>
  11#include <linux/pci.h>
  12#include <linux/slab.h>
  13#include "xillybus.h"
  14
  15MODULE_DESCRIPTION("Xillybus driver for PCIe");
  16MODULE_AUTHOR("Eli Billauer, Xillybus Ltd.");
  17MODULE_ALIAS("xillybus_pcie");
  18MODULE_LICENSE("GPL v2");
  19
  20#define PCI_DEVICE_ID_XILLYBUS          0xebeb
  21
  22#define PCI_VENDOR_ID_ACTEL             0x11aa
  23#define PCI_VENDOR_ID_LATTICE           0x1204
  24
  25static const char xillyname[] = "xillybus_pcie";
  26
  27static const struct pci_device_id xillyids[] = {
  28        {PCI_DEVICE(PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_XILLYBUS)},
  29        {PCI_DEVICE(PCI_VENDOR_ID_ALTERA, PCI_DEVICE_ID_XILLYBUS)},
  30        {PCI_DEVICE(PCI_VENDOR_ID_ACTEL, PCI_DEVICE_ID_XILLYBUS)},
  31        {PCI_DEVICE(PCI_VENDOR_ID_LATTICE, PCI_DEVICE_ID_XILLYBUS)},
  32        { /* End: all zeroes */ }
  33};
  34
  35static int xilly_pci_direction(int direction)
  36{
  37        switch (direction) {
  38        case DMA_TO_DEVICE:
  39                return PCI_DMA_TODEVICE;
  40        case DMA_FROM_DEVICE:
  41                return PCI_DMA_FROMDEVICE;
  42        default:
  43                return PCI_DMA_BIDIRECTIONAL;
  44        }
  45}
  46
  47static void xilly_dma_sync_single_for_cpu_pci(struct xilly_endpoint *ep,
  48                                              dma_addr_t dma_handle,
  49                                              size_t size,
  50                                              int direction)
  51{
  52        pci_dma_sync_single_for_cpu(ep->pdev,
  53                                    dma_handle,
  54                                    size,
  55                                    xilly_pci_direction(direction));
  56}
  57
  58static void xilly_dma_sync_single_for_device_pci(struct xilly_endpoint *ep,
  59                                                 dma_addr_t dma_handle,
  60                                                 size_t size,
  61                                                 int direction)
  62{
  63        pci_dma_sync_single_for_device(ep->pdev,
  64                                       dma_handle,
  65                                       size,
  66                                       xilly_pci_direction(direction));
  67}
  68
  69static void xilly_pci_unmap(void *ptr)
  70{
  71        struct xilly_mapping *data = ptr;
  72
  73        pci_unmap_single(data->device, data->dma_addr,
  74                         data->size, data->direction);
  75
  76        kfree(ptr);
  77}
  78
  79/*
  80 * Map either through the PCI DMA mapper or the non_PCI one. Behind the
  81 * scenes exactly the same functions are called with the same parameters,
  82 * but that can change.
  83 */
  84
  85static int xilly_map_single_pci(struct xilly_endpoint *ep,
  86                                void *ptr,
  87                                size_t size,
  88                                int direction,
  89                                dma_addr_t *ret_dma_handle
  90        )
  91{
  92        int pci_direction;
  93        dma_addr_t addr;
  94        struct xilly_mapping *this;
  95
  96        this = kzalloc(sizeof(*this), GFP_KERNEL);
  97        if (!this)
  98                return -ENOMEM;
  99
 100        pci_direction = xilly_pci_direction(direction);
 101
 102        addr = pci_map_single(ep->pdev, ptr, size, pci_direction);
 103
 104        if (pci_dma_mapping_error(ep->pdev, addr)) {
 105                kfree(this);
 106                return -ENODEV;
 107        }
 108
 109        this->device = ep->pdev;
 110        this->dma_addr = addr;
 111        this->size = size;
 112        this->direction = pci_direction;
 113
 114        *ret_dma_handle = addr;
 115
 116        return devm_add_action_or_reset(ep->dev, xilly_pci_unmap, this);
 117}
 118
 119static struct xilly_endpoint_hardware pci_hw = {
 120        .owner = THIS_MODULE,
 121        .hw_sync_sgl_for_cpu = xilly_dma_sync_single_for_cpu_pci,
 122        .hw_sync_sgl_for_device = xilly_dma_sync_single_for_device_pci,
 123        .map_single = xilly_map_single_pci,
 124};
 125
 126static int xilly_probe(struct pci_dev *pdev,
 127                       const struct pci_device_id *ent)
 128{
 129        struct xilly_endpoint *endpoint;
 130        int rc;
 131
 132        endpoint = xillybus_init_endpoint(pdev, &pdev->dev, &pci_hw);
 133
 134        if (!endpoint)
 135                return -ENOMEM;
 136
 137        pci_set_drvdata(pdev, endpoint);
 138
 139        rc = pcim_enable_device(pdev);
 140        if (rc) {
 141                dev_err(endpoint->dev,
 142                        "pcim_enable_device() failed. Aborting.\n");
 143                return rc;
 144        }
 145
 146        /* L0s has caused packet drops. No power saving, thank you. */
 147
 148        pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
 149
 150        if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
 151                dev_err(endpoint->dev,
 152                        "Incorrect BAR configuration. Aborting.\n");
 153                return -ENODEV;
 154        }
 155
 156        rc = pcim_iomap_regions(pdev, 0x01, xillyname);
 157        if (rc) {
 158                dev_err(endpoint->dev,
 159                        "pcim_iomap_regions() failed. Aborting.\n");
 160                return rc;
 161        }
 162
 163        endpoint->registers = pcim_iomap_table(pdev)[0];
 164
 165        pci_set_master(pdev);
 166
 167        /* Set up a single MSI interrupt */
 168        if (pci_enable_msi(pdev)) {
 169                dev_err(endpoint->dev,
 170                        "Failed to enable MSI interrupts. Aborting.\n");
 171                return -ENODEV;
 172        }
 173        rc = devm_request_irq(&pdev->dev, pdev->irq, xillybus_isr, 0,
 174                              xillyname, endpoint);
 175        if (rc) {
 176                dev_err(endpoint->dev,
 177                        "Failed to register MSI handler. Aborting.\n");
 178                return -ENODEV;
 179        }
 180
 181        /*
 182         * Some (old and buggy?) hardware drops 64-bit addressed PCIe packets,
 183         * even when the PCIe driver claims that a 64-bit mask is OK. On the
 184         * other hand, on some architectures, 64-bit addressing is mandatory.
 185         * So go for the 64-bit mask only when failing is the other option.
 186         */
 187
 188        if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
 189                endpoint->dma_using_dac = 0;
 190        } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
 191                endpoint->dma_using_dac = 1;
 192        } else {
 193                dev_err(endpoint->dev, "Failed to set DMA mask. Aborting.\n");
 194                return -ENODEV;
 195        }
 196
 197        return xillybus_endpoint_discovery(endpoint);
 198}
 199
 200static void xilly_remove(struct pci_dev *pdev)
 201{
 202        struct xilly_endpoint *endpoint = pci_get_drvdata(pdev);
 203
 204        xillybus_endpoint_remove(endpoint);
 205}
 206
 207MODULE_DEVICE_TABLE(pci, xillyids);
 208
 209static struct pci_driver xillybus_driver = {
 210        .name = xillyname,
 211        .id_table = xillyids,
 212        .probe = xilly_probe,
 213        .remove = xilly_remove,
 214};
 215
 216module_pci_driver(xillybus_driver);
 217