LXR linux/drivers/clk/davinci/psc-dm365.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * PSC clock descriptions for TI DaVinci DM365
   4 *
   5 * Copyright (C) 2018 David Lechner <david@lechnology.com>
   6 */
   7
   8#include <linux/clk-provider.h>
   9#include <linux/clk/davinci.h>
  10#include <linux/clk.h>
  11#include <linux/clkdev.h>
  12#include <linux/init.h>
  13#include <linux/kernel.h>
  14#include <linux/types.h>
  15
  16#include "psc.h"
  17
  18LPSC_CLKDEV1(vpss_slave_clkdev,         "slave",        "vpss");
  19LPSC_CLKDEV1(spi1_clkdev,               NULL,           "spi_davinci.1");
  20LPSC_CLKDEV1(mmcsd1_clkdev,             NULL,           "da830-mmc.1");
  21LPSC_CLKDEV1(asp0_clkdev,               NULL,           "davinci-mcbsp");
  22LPSC_CLKDEV1(usb_clkdev,                "usb",          NULL);
  23LPSC_CLKDEV1(spi2_clkdev,               NULL,           "spi_davinci.2");
  24LPSC_CLKDEV2(aemif_clkdev,              "aemif",        NULL,
  25                                        NULL,           "ti-aemif");
  26LPSC_CLKDEV1(mmcsd0_clkdev,             NULL,           "da830-mmc.0");
  27LPSC_CLKDEV1(i2c_clkdev,                NULL,           "i2c_davinci.1");
  28LPSC_CLKDEV1(uart0_clkdev,              NULL,           "serial8250.0");
  29LPSC_CLKDEV1(uart1_clkdev,              NULL,           "serial8250.1");
  30LPSC_CLKDEV1(spi0_clkdev,               NULL,           "spi_davinci.0");
  31/* REVISIT: gpio-davinci.c should be modified to drop con_id */
  32LPSC_CLKDEV1(gpio_clkdev,               "gpio",         NULL);
  33LPSC_CLKDEV1(timer0_clkdev,             "timer0",       NULL);
  34LPSC_CLKDEV1(timer2_clkdev,             NULL,           "davinci-wdt");
  35LPSC_CLKDEV1(spi3_clkdev,               NULL,           "spi_davinci.3");
  36LPSC_CLKDEV1(spi4_clkdev,               NULL,           "spi_davinci.4");
  37LPSC_CLKDEV2(emac_clkdev,               NULL,           "davinci_emac.1",
  38                                        "fck",          "davinci_mdio.0");
  39LPSC_CLKDEV1(voice_codec_clkdev,        NULL,           "davinci_voicecodec");
  40LPSC_CLKDEV1(vpss_dac_clkdev,           "vpss_dac",     NULL);
  41LPSC_CLKDEV1(vpss_master_clkdev,        "master",       "vpss");
  42
  43static const struct davinci_lpsc_clk_info dm365_psc_info[] = {
  44        LPSC(1,  0, vpss_slave,  pll1_sysclk5, vpss_slave_clkdev,  0),
  45        LPSC(5,  0, timer3,      pll1_auxclk,  NULL,               0),
  46        LPSC(6,  0, spi1,        pll1_sysclk4, spi1_clkdev,        0),
  47        LPSC(7,  0, mmcsd1,      pll1_sysclk4, mmcsd1_clkdev,      0),
  48        LPSC(8,  0, asp0,        pll1_sysclk4, asp0_clkdev,        0),
  49        LPSC(9,  0, usb,         pll1_auxclk,  usb_clkdev,         0),
  50        LPSC(10, 0, pwm3,        pll1_auxclk,  NULL,               0),
  51        LPSC(11, 0, spi2,        pll1_sysclk4, spi2_clkdev,        0),
  52        LPSC(12, 0, rto,         pll1_sysclk4, NULL,               0),
  53        LPSC(14, 0, aemif,       pll1_sysclk4, aemif_clkdev,       0),
  54        LPSC(15, 0, mmcsd0,      pll1_sysclk8, mmcsd0_clkdev,      0),
  55        LPSC(18, 0, i2c,         pll1_auxclk,  i2c_clkdev,         0),
  56        LPSC(19, 0, uart0,       pll1_auxclk,  uart0_clkdev,       0),
  57        LPSC(20, 0, uart1,       pll1_sysclk4, uart1_clkdev,       0),
  58        LPSC(22, 0, spi0,        pll1_sysclk4, spi0_clkdev,        0),
  59        LPSC(23, 0, pwm0,        pll1_auxclk,  NULL,               0),
  60        LPSC(24, 0, pwm1,        pll1_auxclk,  NULL,               0),
  61        LPSC(25, 0, pwm2,        pll1_auxclk,  NULL,               0),
  62        LPSC(26, 0, gpio,        pll1_sysclk4, gpio_clkdev,        0),
  63        LPSC(27, 0, timer0,      pll1_auxclk,  timer0_clkdev,      LPSC_ALWAYS_ENABLED),
  64        LPSC(28, 0, timer1,      pll1_auxclk,  NULL,               0),
  65        /* REVISIT: why can't this be disabled? */
  66        LPSC(29, 0, timer2,      pll1_auxclk,  timer2_clkdev,      LPSC_ALWAYS_ENABLED),
  67        LPSC(31, 0, arm,         pll2_sysclk2, NULL,               LPSC_ALWAYS_ENABLED),
  68        LPSC(38, 0, spi3,        pll1_sysclk4, spi3_clkdev,        0),
  69        LPSC(39, 0, spi4,        pll1_auxclk,  spi4_clkdev,        0),
  70        LPSC(40, 0, emac,        pll1_sysclk4, emac_clkdev,        0),
  71        /*
  72         * The TRM (ARM Subsystem User's Guide) shows two clocks input into
  73         * voice codec module (PLL2 SYSCLK4 with a DIV2 and PLL1 SYSCLK4). Its
  74         * not fully clear from documentation which clock should be considered
  75         * as parent for PSC. The clock chosen here is to maintain
  76         * compatibility with existing code in arch/arm/mach-davinci/dm365.c
  77         */
  78        LPSC(44, 0, voice_codec, pll2_sysclk4, voice_codec_clkdev, 0),
  79        /*
  80         * Its not fully clear from TRM (ARM Subsystem User's Guide) as to what
  81         * the parent of VPSS DAC LPSC should actually be. PLL1 SYSCLK3 feeds
  82         * into HDVICP and MJCP. The clock chosen here is to remain compatible
  83         * with code existing in arch/arm/mach-davinci/dm365.c
  84         */
  85        LPSC(46, 0, vpss_dac,    pll1_sysclk3, vpss_dac_clkdev,    0),
  86        LPSC(47, 0, vpss_master, pll1_sysclk5, vpss_master_clkdev, 0),
  87        LPSC(50, 0, mjcp,        pll1_sysclk3, NULL,               0),
  88        { }
  89};
  90
  91int dm365_psc_init(struct device *dev, void __iomem *base)
  92{
  93        return davinci_psc_register_clocks(dev, dm365_psc_info, 52, base);
  94}
  95
  96static struct clk_bulk_data dm365_psc_parent_clks[] = {
  97        { .id = "pll1_sysclk1" },
  98        { .id = "pll1_sysclk3" },
  99        { .id = "pll1_sysclk4" },
 100        { .id = "pll1_sysclk5" },
 101        { .id = "pll1_sysclk8" },
 102        { .id = "pll2_sysclk2" },
 103        { .id = "pll2_sysclk4" },
 104        { .id = "pll1_auxclk"  },
 105};
 106
 107const struct davinci_psc_init_data dm365_psc_init_data = {
 108        .parent_clks            = dm365_psc_parent_clks,
 109        .num_parent_clks        = ARRAY_SIZE(dm365_psc_parent_clks),
 110        .psc_init               = &dm365_psc_init,
 111};
 112