LXR linux/drivers/clk/sunxi-ng/ccu

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * Copyright 2016 Maxime Ripard
   4 *
   5 * Maxime Ripard <maxime.ripard@free-electrons.com>
   6 */
   7
   8#include <linux/clk.h>
   9#include <linux/clk-provider.h>
  10#include <linux/iopoll.h>
  11#include <linux/slab.h>
  12
  13#include "ccu_common.h"
  14#include "ccu_gate.h"
  15#include "ccu_reset.h"
  16
  17static DEFINE_SPINLOCK(ccu_lock);
  18
  19void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock)
  20{
  21        void __iomem *addr;
  22        u32 reg;
  23
  24        if (!lock)
  25                return;
  26
  27        if (common->features & CCU_FEATURE_LOCK_REG)
  28                addr = common->base + common->lock_reg;
  29        else
  30                addr = common->base + common->reg;
  31
  32        WARN_ON(readl_relaxed_poll_timeout(addr, reg, reg & lock, 100, 70000));
  33}
  34
  35/*
  36 * This clock notifier is called when the frequency of a PLL clock is
  37 * changed. In common PLL designs, changes to the dividers take effect
  38 * almost immediately, while changes to the multipliers (implemented
  39 * as dividers in the feedback loop) take a few cycles to work into
  40 * the feedback loop for the PLL to stablize.
  41 *
  42 * Sometimes when the PLL clock rate is changed, the decrease in the
  43 * divider is too much for the decrease in the multiplier to catch up.
  44 * The PLL clock rate will spike, and in some cases, might lock up
  45 * completely.
  46 *
  47 * This notifier callback will gate and then ungate the clock,
  48 * effectively resetting it, so it proceeds to work. Care must be
  49 * taken to reparent consumers to other temporary clocks during the
  50 * rate change, and that this notifier callback must be the first
  51 * to be registered.
  52 */
  53static int ccu_pll_notifier_cb(struct notifier_block *nb,
  54                               unsigned long event, void *data)
  55{
  56        struct ccu_pll_nb *pll = to_ccu_pll_nb(nb);
  57        int ret = 0;
  58
  59        if (event != POST_RATE_CHANGE)
  60                goto out;
  61
  62        ccu_gate_helper_disable(pll->common, pll->enable);
  63
  64        ret = ccu_gate_helper_enable(pll->common, pll->enable);
  65        if (ret)
  66                goto out;
  67
  68        ccu_helper_wait_for_lock(pll->common, pll->lock);
  69
  70out:
  71        return notifier_from_errno(ret);
  72}
  73
  74int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb)
  75{
  76        pll_nb->clk_nb.notifier_call = ccu_pll_notifier_cb;
  77
  78        return clk_notifier_register(pll_nb->common->hw.clk,
  79                                     &pll_nb->clk_nb);
  80}
  81
  82int sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
  83                    const struct sunxi_ccu_desc *desc)
  84{
  85        struct ccu_reset *reset;
  86        int i, ret;
  87
  88        for (i = 0; i < desc->num_ccu_clks; i++) {
  89                struct ccu_common *cclk = desc->ccu_clks[i];
  90
  91                if (!cclk)
  92                        continue;
  93
  94                cclk->base = reg;
  95                cclk->lock = &ccu_lock;
  96        }
  97
  98        for (i = 0; i < desc->hw_clks->num ; i++) {
  99                struct clk_hw *hw = desc->hw_clks->hws[i];
 100                const char *name;
 101
 102                if (!hw)
 103                        continue;
 104
 105                name = hw->init->name;
 106                ret = of_clk_hw_register(node, hw);
 107                if (ret) {
 108                        pr_err("Couldn't register clock %d - %s\n", i, name);
 109                        goto err_clk_unreg;
 110                }
 111        }
 112
 113        ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get,
 114                                     desc->hw_clks);
 115        if (ret)
 116                goto err_clk_unreg;
 117
 118        reset = kzalloc(sizeof(*reset), GFP_KERNEL);
 119        if (!reset) {
 120                ret = -ENOMEM;
 121                goto err_alloc_reset;
 122        }
 123
 124        reset->rcdev.of_node = node;
 125        reset->rcdev.ops = &ccu_reset_ops;
 126        reset->rcdev.owner = THIS_MODULE;
 127        reset->rcdev.nr_resets = desc->num_resets;
 128        reset->base = reg;
 129        reset->lock = &ccu_lock;
 130        reset->reset_map = desc->resets;
 131
 132        ret = reset_controller_register(&reset->rcdev);
 133        if (ret)
 134                goto err_of_clk_unreg;
 135
 136        return 0;
 137
 138err_of_clk_unreg:
 139        kfree(reset);
 140err_alloc_reset:
 141        of_clk_del_provider(node);
 142err_clk_unreg:
 143        while (--i >= 0) {
 144                struct clk_hw *hw = desc->hw_clks->hws[i];
 145
 146                if (!hw)
 147                        continue;
 148                clk_hw_unregister(hw);
 149        }
 150        return ret;
 151}
 152