LXR linux/drivers/comedi/drivers/comedi

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * comedi_8254.h
   4 * Generic 8254 timer/counter support
   5 * Copyright (C) 2014 H Hartley Sweeten <hsweeten@visionengravers.com>
   6 *
   7 * COMEDI - Linux Control and Measurement Device Interface
   8 * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
   9 */
  10
  11#ifndef _COMEDI_8254_H
  12#define _COMEDI_8254_H
  13
  14#include <linux/types.h>
  15
  16struct comedi_device;
  17struct comedi_insn;
  18struct comedi_subdevice;
  19
  20/*
  21 * Common oscillator base values in nanoseconds
  22 */
  23#define I8254_OSC_BASE_10MHZ    100
  24#define I8254_OSC_BASE_5MHZ     200
  25#define I8254_OSC_BASE_4MHZ     250
  26#define I8254_OSC_BASE_2MHZ     500
  27#define I8254_OSC_BASE_1MHZ     1000
  28#define I8254_OSC_BASE_100KHZ   10000
  29#define I8254_OSC_BASE_10KHZ    100000
  30#define I8254_OSC_BASE_1KHZ     1000000
  31
  32/*
  33 * I/O access size used to read/write registers
  34 */
  35#define I8254_IO8               1
  36#define I8254_IO16              2
  37#define I8254_IO32              4
  38
  39/*
  40 * Register map for generic 8254 timer (I8254_IO8 with 0 regshift)
  41 */
  42#define I8254_COUNTER0_REG              0x00
  43#define I8254_COUNTER1_REG              0x01
  44#define I8254_COUNTER2_REG              0x02
  45#define I8254_CTRL_REG                  0x03
  46#define I8254_CTRL_SEL_CTR(x)           ((x) << 6)
  47#define I8254_CTRL_READBACK(x)          (I8254_CTRL_SEL_CTR(3) | BIT(x))
  48#define I8254_CTRL_READBACK_COUNT       I8254_CTRL_READBACK(4)
  49#define I8254_CTRL_READBACK_STATUS      I8254_CTRL_READBACK(5)
  50#define I8254_CTRL_READBACK_SEL_CTR(x)  (2 << (x))
  51#define I8254_CTRL_RW(x)                (((x) & 0x3) << 4)
  52#define I8254_CTRL_LATCH                I8254_CTRL_RW(0)
  53#define I8254_CTRL_LSB_ONLY             I8254_CTRL_RW(1)
  54#define I8254_CTRL_MSB_ONLY             I8254_CTRL_RW(2)
  55#define I8254_CTRL_LSB_MSB              I8254_CTRL_RW(3)
  56
  57/* counter maps zero to 0x10000 */
  58#define I8254_MAX_COUNT                 0x10000
  59
  60/**
  61 * struct comedi_8254 - private data used by this module
  62 * @iobase:             PIO base address of the registers (in/out)
  63 * @mmio:               MMIO base address of the registers (read/write)
  64 * @iosize:             I/O size used to access the registers (b/w/l)
  65 * @regshift:           register gap shift
  66 * @osc_base:           cascaded oscillator speed in ns
  67 * @divisor:            divisor for single counter
  68 * @divisor1:           divisor loaded into first cascaded counter
  69 * @divisor2:           divisor loaded into second cascaded counter
  70 * #next_div:           next divisor for single counter
  71 * @next_div1:          next divisor to use for first cascaded counter
  72 * @next_div2:          next divisor to use for second cascaded counter
  73 * @clock_src;          current clock source for each counter (driver specific)
  74 * @gate_src;           current gate source  for each counter (driver specific)
  75 * @busy:               flags used to indicate that a counter is "busy"
  76 * @insn_config:        driver specific (*insn_config) callback
  77 */
  78struct comedi_8254 {
  79        unsigned long iobase;
  80        void __iomem *mmio;
  81        unsigned int iosize;
  82        unsigned int regshift;
  83        unsigned int osc_base;
  84        unsigned int divisor;
  85        unsigned int divisor1;
  86        unsigned int divisor2;
  87        unsigned int next_div;
  88        unsigned int next_div1;
  89        unsigned int next_div2;
  90        unsigned int clock_src[3];
  91        unsigned int gate_src[3];
  92        bool busy[3];
  93
  94        int (*insn_config)(struct comedi_device *dev,
  95                           struct comedi_subdevice *s,
  96                           struct comedi_insn *insn, unsigned int *data);
  97};
  98
  99unsigned int comedi_8254_status(struct comedi_8254 *i8254,
 100                                unsigned int counter);
 101unsigned int comedi_8254_read(struct comedi_8254 *i8254, unsigned int counter);
 102void comedi_8254_write(struct comedi_8254 *i8254,
 103                       unsigned int counter, unsigned int val);
 104
 105int comedi_8254_set_mode(struct comedi_8254 *i8254,
 106                         unsigned int counter, unsigned int mode);
 107int comedi_8254_load(struct comedi_8254 *i8254,
 108                     unsigned int counter, unsigned int val, unsigned int mode);
 109
 110void comedi_8254_pacer_enable(struct comedi_8254 *i8254,
 111                              unsigned int counter1, unsigned int counter2,
 112                              bool enable);
 113void comedi_8254_update_divisors(struct comedi_8254 *i8254);
 114void comedi_8254_cascade_ns_to_timer(struct comedi_8254 *i8254,
 115                                     unsigned int *nanosec, unsigned int flags);
 116void comedi_8254_ns_to_timer(struct comedi_8254 *i8254,
 117                             unsigned int *nanosec, unsigned int flags);
 118
 119void comedi_8254_set_busy(struct comedi_8254 *i8254,
 120                          unsigned int counter, bool busy);
 121
 122void comedi_8254_subdevice_init(struct comedi_subdevice *s,
 123                                struct comedi_8254 *i8254);
 124
 125struct comedi_8254 *comedi_8254_init(unsigned long iobase,
 126                                     unsigned int osc_base,
 127                                     unsigned int iosize,
 128                                     unsigned int regshift);
 129struct comedi_8254 *comedi_8254_mm_init(void __iomem *mmio,
 130                                        unsigned int osc_base,
 131                                        unsigned int iosize,
 132                                        unsigned int regshift);
 133
 134#endif  /* _COMEDI_8254_H */
 135