linux/drivers/crypto/marvell/octeontx2/otx2_cptvf.h
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   1/* SPDX-License-Identifier: GPL-2.0-only
   2 * Copyright (C) 2020 Marvell.
   3 */
   4
   5#ifndef __OTX2_CPTVF_H
   6#define __OTX2_CPTVF_H
   7
   8#include "mbox.h"
   9#include "otx2_cptlf.h"
  10
  11struct otx2_cptvf_dev {
  12        void __iomem *reg_base;         /* Register start address */
  13        void __iomem *pfvf_mbox_base;   /* PF-VF mbox start address */
  14        struct pci_dev *pdev;           /* PCI device handle */
  15        struct otx2_cptlfs_info lfs;    /* CPT LFs attached to this VF */
  16        u8 vf_id;                       /* Virtual function index */
  17
  18        /* PF <=> VF mbox */
  19        struct otx2_mbox        pfvf_mbox;
  20        struct work_struct      pfvf_mbox_work;
  21        struct workqueue_struct *pfvf_mbox_wq;
  22        void *bbuf_base;
  23        unsigned long cap_flag;
  24};
  25
  26irqreturn_t otx2_cptvf_pfvf_mbox_intr(int irq, void *arg);
  27void otx2_cptvf_pfvf_mbox_handler(struct work_struct *work);
  28int otx2_cptvf_send_eng_grp_num_msg(struct otx2_cptvf_dev *cptvf, int eng_type);
  29int otx2_cptvf_send_kvf_limits_msg(struct otx2_cptvf_dev *cptvf);
  30int otx2_cpt_mbox_bbuf_init(struct otx2_cptvf_dev *cptvf, struct pci_dev *pdev);
  31
  32#endif /* __OTX2_CPTVF_H */
  33