linux/drivers/crypto/ux500/cryp/cryp.h
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   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (C) ST-Ericsson SA 2010
   4 * Author: Shujuan Chen <shujuan.chen@stericsson.com> for ST-Ericsson.
   5 * Author: Jonas Linde <jonas.linde@stericsson.com> for ST-Ericsson.
   6 * Author: Joakim Bech <joakim.xx.bech@stericsson.com> for ST-Ericsson.
   7 * Author: Berne Hebark <berne.herbark@stericsson.com> for ST-Ericsson.
   8 * Author: Niklas Hernaeus <niklas.hernaeus@stericsson.com> for ST-Ericsson.
   9 */
  10
  11#ifndef _CRYP_H_
  12#define _CRYP_H_
  13
  14#include <linux/completion.h>
  15#include <linux/dmaengine.h>
  16#include <linux/klist.h>
  17#include <linux/mutex.h>
  18
  19#define DEV_DBG_NAME "crypX crypX:"
  20
  21/* CRYP enable/disable */
  22enum cryp_crypen {
  23        CRYP_CRYPEN_DISABLE = 0,
  24        CRYP_CRYPEN_ENABLE = 1
  25};
  26
  27/* CRYP Start Computation enable/disable */
  28enum cryp_start {
  29        CRYP_START_DISABLE = 0,
  30        CRYP_START_ENABLE = 1
  31};
  32
  33/* CRYP Init Signal enable/disable */
  34enum cryp_init {
  35        CRYP_INIT_DISABLE = 0,
  36        CRYP_INIT_ENABLE = 1
  37};
  38
  39/* Cryp State enable/disable */
  40enum cryp_state {
  41        CRYP_STATE_DISABLE = 0,
  42        CRYP_STATE_ENABLE = 1
  43};
  44
  45/* Key preparation bit enable */
  46enum cryp_key_prep {
  47        KSE_DISABLED = 0,
  48        KSE_ENABLED = 1
  49};
  50
  51/* Key size for AES */
  52#define CRYP_KEY_SIZE_128 (0)
  53#define CRYP_KEY_SIZE_192 (1)
  54#define CRYP_KEY_SIZE_256 (2)
  55
  56/* AES modes */
  57enum cryp_algo_mode {
  58        CRYP_ALGO_TDES_ECB,
  59        CRYP_ALGO_TDES_CBC,
  60        CRYP_ALGO_DES_ECB,
  61        CRYP_ALGO_DES_CBC,
  62        CRYP_ALGO_AES_ECB,
  63        CRYP_ALGO_AES_CBC,
  64        CRYP_ALGO_AES_CTR,
  65        CRYP_ALGO_AES_XTS
  66};
  67
  68/* Cryp Encryption or Decryption */
  69enum cryp_algorithm_dir {
  70        CRYP_ALGORITHM_ENCRYPT,
  71        CRYP_ALGORITHM_DECRYPT
  72};
  73
  74/* Hardware access method */
  75enum cryp_mode {
  76        CRYP_MODE_POLLING,
  77        CRYP_MODE_INTERRUPT,
  78        CRYP_MODE_DMA
  79};
  80
  81/**
  82 * struct cryp_config -
  83 * @keysize: Key size for AES
  84 * @algomode: AES modes
  85 * @algodir: Cryp Encryption or Decryption
  86 *
  87 * CRYP configuration structure to be passed to set configuration
  88 */
  89struct cryp_config {
  90        int keysize;
  91        enum cryp_algo_mode algomode;
  92        enum cryp_algorithm_dir algodir;
  93};
  94
  95/**
  96 * struct cryp_protection_config -
  97 * @privilege_access: Privileged cryp state enable/disable
  98 * @secure_access: Secure cryp state enable/disable
  99 *
 100 * Protection configuration structure for setting privilage access
 101 */
 102struct cryp_protection_config {
 103        enum cryp_state privilege_access;
 104        enum cryp_state secure_access;
 105};
 106
 107/* Cryp status */
 108enum cryp_status_id {
 109        CRYP_STATUS_BUSY = 0x10,
 110        CRYP_STATUS_OUTPUT_FIFO_FULL = 0x08,
 111        CRYP_STATUS_OUTPUT_FIFO_NOT_EMPTY = 0x04,
 112        CRYP_STATUS_INPUT_FIFO_NOT_FULL = 0x02,
 113        CRYP_STATUS_INPUT_FIFO_EMPTY = 0x01
 114};
 115
 116/* Cryp DMA interface */
 117#define CRYP_DMA_TX_FIFO        0x08
 118#define CRYP_DMA_RX_FIFO        0x10
 119
 120enum cryp_dma_req_type {
 121        CRYP_DMA_DISABLE_BOTH,
 122        CRYP_DMA_ENABLE_IN_DATA,
 123        CRYP_DMA_ENABLE_OUT_DATA,
 124        CRYP_DMA_ENABLE_BOTH_DIRECTIONS
 125};
 126
 127enum cryp_dma_channel {
 128        CRYP_DMA_RX = 0,
 129        CRYP_DMA_TX
 130};
 131
 132/* Key registers */
 133enum cryp_key_reg_index {
 134        CRYP_KEY_REG_1,
 135        CRYP_KEY_REG_2,
 136        CRYP_KEY_REG_3,
 137        CRYP_KEY_REG_4
 138};
 139
 140/* Key register left and right */
 141struct cryp_key_value {
 142        u32 key_value_left;
 143        u32 key_value_right;
 144};
 145
 146/* Cryp Initialization structure */
 147enum cryp_init_vector_index {
 148        CRYP_INIT_VECTOR_INDEX_0,
 149        CRYP_INIT_VECTOR_INDEX_1
 150};
 151
 152/* struct cryp_init_vector_value -
 153 * @init_value_left
 154 * @init_value_right
 155 * */
 156struct cryp_init_vector_value {
 157        u32 init_value_left;
 158        u32 init_value_right;
 159};
 160
 161/**
 162 * struct cryp_device_context - structure for a cryp context.
 163 * @cr: control register
 164 * @dmacr: DMA control register
 165 * @imsc: Interrupt mask set/clear register
 166 * @key_1_l: Key 1l register
 167 * @key_1_r: Key 1r register
 168 * @key_2_l: Key 2l register
 169 * @key_2_r: Key 2r register
 170 * @key_3_l: Key 3l register
 171 * @key_3_r: Key 3r register
 172 * @key_4_l: Key 4l register
 173 * @key_4_r: Key 4r register
 174 * @init_vect_0_l: Initialization vector 0l register
 175 * @init_vect_0_r: Initialization vector 0r register
 176 * @init_vect_1_l: Initialization vector 1l register
 177 * @init_vect_1_r: Initialization vector 0r register
 178 * @din: Data in register
 179 * @dout: Data out register
 180 *
 181 * CRYP power management specifc structure.
 182 */
 183struct cryp_device_context {
 184        u32 cr;
 185        u32 dmacr;
 186        u32 imsc;
 187
 188        u32 key_1_l;
 189        u32 key_1_r;
 190        u32 key_2_l;
 191        u32 key_2_r;
 192        u32 key_3_l;
 193        u32 key_3_r;
 194        u32 key_4_l;
 195        u32 key_4_r;
 196
 197        u32 init_vect_0_l;
 198        u32 init_vect_0_r;
 199        u32 init_vect_1_l;
 200        u32 init_vect_1_r;
 201
 202        u32 din;
 203        u32 dout;
 204};
 205
 206struct cryp_dma {
 207        dma_cap_mask_t mask;
 208        struct completion cryp_dma_complete;
 209        struct dma_chan *chan_cryp2mem;
 210        struct dma_chan *chan_mem2cryp;
 211        struct stedma40_chan_cfg *cfg_cryp2mem;
 212        struct stedma40_chan_cfg *cfg_mem2cryp;
 213        int sg_src_len;
 214        int sg_dst_len;
 215        struct scatterlist *sg_src;
 216        struct scatterlist *sg_dst;
 217        int nents_src;
 218        int nents_dst;
 219};
 220
 221/**
 222 * struct cryp_device_data - structure for a cryp device.
 223 * @base: Pointer to virtual base address of the cryp device.
 224 * @phybase: Pointer to physical memory location of the cryp device.
 225 * @dev: Pointer to the devices dev structure.
 226 * @clk: Pointer to the device's clock control.
 227 * @pwr_regulator: Pointer to the device's power control.
 228 * @power_status: Current status of the power.
 229 * @ctx_lock: Lock for current_ctx.
 230 * @current_ctx: Pointer to the currently allocated context.
 231 * @list_node: For inclusion into a klist.
 232 * @dma: The dma structure holding channel configuration.
 233 * @power_state: TRUE = power state on, FALSE = power state off.
 234 * @power_state_spinlock: Spinlock for power_state.
 235 * @restore_dev_ctx: TRUE = saved ctx, FALSE = no saved ctx.
 236 */
 237struct cryp_device_data {
 238        struct cryp_register __iomem *base;
 239        phys_addr_t phybase;
 240        struct device *dev;
 241        struct clk *clk;
 242        struct regulator *pwr_regulator;
 243        int power_status;
 244        spinlock_t ctx_lock;
 245        struct cryp_ctx *current_ctx;
 246        struct klist_node list_node;
 247        struct cryp_dma dma;
 248        bool power_state;
 249        spinlock_t power_state_spinlock;
 250        bool restore_dev_ctx;
 251};
 252
 253void cryp_wait_until_done(struct cryp_device_data *device_data);
 254
 255/* Initialization functions */
 256
 257int cryp_check(struct cryp_device_data *device_data);
 258
 259void cryp_activity(struct cryp_device_data *device_data,
 260                   enum cryp_crypen cryp_crypen);
 261
 262void cryp_flush_inoutfifo(struct cryp_device_data *device_data);
 263
 264int cryp_set_configuration(struct cryp_device_data *device_data,
 265                           struct cryp_config *cryp_config,
 266                           u32 *control_register);
 267
 268void cryp_configure_for_dma(struct cryp_device_data *device_data,
 269                            enum cryp_dma_req_type dma_req);
 270
 271int cryp_configure_key_values(struct cryp_device_data *device_data,
 272                              enum cryp_key_reg_index key_reg_index,
 273                              struct cryp_key_value key_value);
 274
 275int cryp_configure_init_vector(struct cryp_device_data *device_data,
 276                               enum cryp_init_vector_index
 277                               init_vector_index,
 278                               struct cryp_init_vector_value
 279                               init_vector_value);
 280
 281int cryp_configure_protection(struct cryp_device_data *device_data,
 282                              struct cryp_protection_config *p_protect_config);
 283
 284/* Power management funtions */
 285void cryp_save_device_context(struct cryp_device_data *device_data,
 286                              struct cryp_device_context *ctx,
 287                              int cryp_mode);
 288
 289void cryp_restore_device_context(struct cryp_device_data *device_data,
 290                                 struct cryp_device_context *ctx);
 291
 292/* Data transfer and status bits. */
 293int cryp_is_logic_busy(struct cryp_device_data *device_data);
 294
 295int cryp_get_status(struct cryp_device_data *device_data);
 296
 297/**
 298 * cryp_write_indata - This routine writes 32 bit data into the data input
 299 *                     register of the cryptography IP.
 300 * @device_data: Pointer to the device data struct for base address.
 301 * @write_data: Data to write.
 302 */
 303int cryp_write_indata(struct cryp_device_data *device_data, u32 write_data);
 304
 305/**
 306 * cryp_read_outdata - This routine reads the data from the data output
 307 *                     register of the CRYP logic
 308 * @device_data: Pointer to the device data struct for base address.
 309 * @read_data: Read the data from the output FIFO.
 310 */
 311int cryp_read_outdata(struct cryp_device_data *device_data, u32 *read_data);
 312
 313#endif /* _CRYP_H_ */
 314