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11#include <linux/firmware.h>
12#include <linux/fpga/fpga-mgr.h>
13#include <linux/idr.h>
14#include <linux/module.h>
15#include <linux/of.h>
16#include <linux/mutex.h>
17#include <linux/slab.h>
18#include <linux/scatterlist.h>
19#include <linux/highmem.h>
20
21static DEFINE_IDA(fpga_mgr_ida);
22static struct class *fpga_mgr_class;
23
24struct fpga_mgr_devres {
25 struct fpga_manager *mgr;
26};
27
28static inline void fpga_mgr_fpga_remove(struct fpga_manager *mgr)
29{
30 if (mgr->mops->fpga_remove)
31 mgr->mops->fpga_remove(mgr);
32}
33
34static inline enum fpga_mgr_states fpga_mgr_state(struct fpga_manager *mgr)
35{
36 if (mgr->mops->state)
37 return mgr->mops->state(mgr);
38 return FPGA_MGR_STATE_UNKNOWN;
39}
40
41static inline u64 fpga_mgr_status(struct fpga_manager *mgr)
42{
43 if (mgr->mops->status)
44 return mgr->mops->status(mgr);
45 return 0;
46}
47
48static inline int fpga_mgr_write(struct fpga_manager *mgr, const char *buf, size_t count)
49{
50 if (mgr->mops->write)
51 return mgr->mops->write(mgr, buf, count);
52 return -EOPNOTSUPP;
53}
54
55
56
57
58
59static inline int fpga_mgr_write_complete(struct fpga_manager *mgr,
60 struct fpga_image_info *info)
61{
62 int ret = 0;
63
64 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
65 if (mgr->mops->write_complete)
66 ret = mgr->mops->write_complete(mgr, info);
67 if (ret) {
68 dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
69 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
70 return ret;
71 }
72 mgr->state = FPGA_MGR_STATE_OPERATING;
73
74 return 0;
75}
76
77static inline int fpga_mgr_write_init(struct fpga_manager *mgr,
78 struct fpga_image_info *info,
79 const char *buf, size_t count)
80{
81 if (mgr->mops->write_init)
82 return mgr->mops->write_init(mgr, info, buf, count);
83 return 0;
84}
85
86static inline int fpga_mgr_write_sg(struct fpga_manager *mgr,
87 struct sg_table *sgt)
88{
89 if (mgr->mops->write_sg)
90 return mgr->mops->write_sg(mgr, sgt);
91 return -EOPNOTSUPP;
92}
93
94
95
96
97
98
99
100struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
101{
102 struct fpga_image_info *info;
103
104 get_device(dev);
105
106 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
107 if (!info) {
108 put_device(dev);
109 return NULL;
110 }
111
112 info->dev = dev;
113
114 return info;
115}
116EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
117
118
119
120
121
122void fpga_image_info_free(struct fpga_image_info *info)
123{
124 struct device *dev;
125
126 if (!info)
127 return;
128
129 dev = info->dev;
130 if (info->firmware_name)
131 devm_kfree(dev, info->firmware_name);
132
133 devm_kfree(dev, info);
134 put_device(dev);
135}
136EXPORT_SYMBOL_GPL(fpga_image_info_free);
137
138
139
140
141
142
143
144static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
145 struct fpga_image_info *info,
146 const char *buf, size_t count)
147{
148 int ret;
149
150 mgr->state = FPGA_MGR_STATE_WRITE_INIT;
151 if (!mgr->mops->initial_header_size)
152 ret = fpga_mgr_write_init(mgr, info, NULL, 0);
153 else
154 ret = fpga_mgr_write_init(
155 mgr, info, buf, min(mgr->mops->initial_header_size, count));
156
157 if (ret) {
158 dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
159 mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
160 return ret;
161 }
162
163 return 0;
164}
165
166static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
167 struct fpga_image_info *info,
168 struct sg_table *sgt)
169{
170 struct sg_mapping_iter miter;
171 size_t len;
172 char *buf;
173 int ret;
174
175 if (!mgr->mops->initial_header_size)
176 return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
177
178
179
180
181
182 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
183 if (sg_miter_next(&miter) &&
184 miter.length >= mgr->mops->initial_header_size) {
185 ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
186 miter.length);
187 sg_miter_stop(&miter);
188 return ret;
189 }
190 sg_miter_stop(&miter);
191
192
193 buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
194 if (!buf)
195 return -ENOMEM;
196
197 len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
198 mgr->mops->initial_header_size);
199 ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
200
201 kfree(buf);
202
203 return ret;
204}
205
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222
223static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
224 struct fpga_image_info *info,
225 struct sg_table *sgt)
226{
227 int ret;
228
229 ret = fpga_mgr_write_init_sg(mgr, info, sgt);
230 if (ret)
231 return ret;
232
233
234 mgr->state = FPGA_MGR_STATE_WRITE;
235 if (mgr->mops->write_sg) {
236 ret = fpga_mgr_write_sg(mgr, sgt);
237 } else {
238 struct sg_mapping_iter miter;
239
240 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
241 while (sg_miter_next(&miter)) {
242 ret = fpga_mgr_write(mgr, miter.addr, miter.length);
243 if (ret)
244 break;
245 }
246 sg_miter_stop(&miter);
247 }
248
249 if (ret) {
250 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
251 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
252 return ret;
253 }
254
255 return fpga_mgr_write_complete(mgr, info);
256}
257
258static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
259 struct fpga_image_info *info,
260 const char *buf, size_t count)
261{
262 int ret;
263
264 ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
265 if (ret)
266 return ret;
267
268
269
270
271 mgr->state = FPGA_MGR_STATE_WRITE;
272 ret = fpga_mgr_write(mgr, buf, count);
273 if (ret) {
274 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
275 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
276 return ret;
277 }
278
279 return fpga_mgr_write_complete(mgr, info);
280}
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294
295
296static int fpga_mgr_buf_load(struct fpga_manager *mgr,
297 struct fpga_image_info *info,
298 const char *buf, size_t count)
299{
300 struct page **pages;
301 struct sg_table sgt;
302 const void *p;
303 int nr_pages;
304 int index;
305 int rc;
306
307
308
309
310
311
312 if (mgr->mops->write)
313 return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
314
315
316
317
318
319 nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
320 (unsigned long)buf / PAGE_SIZE;
321 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
322 if (!pages)
323 return -ENOMEM;
324
325 p = buf - offset_in_page(buf);
326 for (index = 0; index < nr_pages; index++) {
327 if (is_vmalloc_addr(p))
328 pages[index] = vmalloc_to_page(p);
329 else
330 pages[index] = kmap_to_page((void *)p);
331 if (!pages[index]) {
332 kfree(pages);
333 return -EFAULT;
334 }
335 p += PAGE_SIZE;
336 }
337
338
339
340
341
342 rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
343 count, GFP_KERNEL);
344 kfree(pages);
345 if (rc)
346 return rc;
347
348 rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
349 sg_free_table(&sgt);
350
351 return rc;
352}
353
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365
366
367
368static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
369 struct fpga_image_info *info,
370 const char *image_name)
371{
372 struct device *dev = &mgr->dev;
373 const struct firmware *fw;
374 int ret;
375
376 dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
377
378 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
379
380 ret = request_firmware(&fw, image_name, dev);
381 if (ret) {
382 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
383 dev_err(dev, "Error requesting firmware %s\n", image_name);
384 return ret;
385 }
386
387 ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
388
389 release_firmware(fw);
390
391 return ret;
392}
393
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401
402
403
404int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
405{
406 if (info->sgt)
407 return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
408 if (info->buf && info->count)
409 return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
410 if (info->firmware_name)
411 return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
412 return -EINVAL;
413}
414EXPORT_SYMBOL_GPL(fpga_mgr_load);
415
416static const char * const state_str[] = {
417 [FPGA_MGR_STATE_UNKNOWN] = "unknown",
418 [FPGA_MGR_STATE_POWER_OFF] = "power off",
419 [FPGA_MGR_STATE_POWER_UP] = "power up",
420 [FPGA_MGR_STATE_RESET] = "reset",
421
422
423 [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
424 [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
425
426
427 [FPGA_MGR_STATE_WRITE_INIT] = "write init",
428 [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
429
430
431 [FPGA_MGR_STATE_WRITE] = "write",
432 [FPGA_MGR_STATE_WRITE_ERR] = "write error",
433
434
435 [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
436 [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
437
438
439 [FPGA_MGR_STATE_OPERATING] = "operating",
440};
441
442static ssize_t name_show(struct device *dev,
443 struct device_attribute *attr, char *buf)
444{
445 struct fpga_manager *mgr = to_fpga_manager(dev);
446
447 return sprintf(buf, "%s\n", mgr->name);
448}
449
450static ssize_t state_show(struct device *dev,
451 struct device_attribute *attr, char *buf)
452{
453 struct fpga_manager *mgr = to_fpga_manager(dev);
454
455 return sprintf(buf, "%s\n", state_str[mgr->state]);
456}
457
458static ssize_t status_show(struct device *dev,
459 struct device_attribute *attr, char *buf)
460{
461 struct fpga_manager *mgr = to_fpga_manager(dev);
462 u64 status;
463 int len = 0;
464
465 status = fpga_mgr_status(mgr);
466
467 if (status & FPGA_MGR_STATUS_OPERATION_ERR)
468 len += sprintf(buf + len, "reconfig operation error\n");
469 if (status & FPGA_MGR_STATUS_CRC_ERR)
470 len += sprintf(buf + len, "reconfig CRC error\n");
471 if (status & FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR)
472 len += sprintf(buf + len, "reconfig incompatible image\n");
473 if (status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
474 len += sprintf(buf + len, "reconfig IP protocol error\n");
475 if (status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
476 len += sprintf(buf + len, "reconfig fifo overflow error\n");
477
478 return len;
479}
480
481static DEVICE_ATTR_RO(name);
482static DEVICE_ATTR_RO(state);
483static DEVICE_ATTR_RO(status);
484
485static struct attribute *fpga_mgr_attrs[] = {
486 &dev_attr_name.attr,
487 &dev_attr_state.attr,
488 &dev_attr_status.attr,
489 NULL,
490};
491ATTRIBUTE_GROUPS(fpga_mgr);
492
493static struct fpga_manager *__fpga_mgr_get(struct device *dev)
494{
495 struct fpga_manager *mgr;
496
497 mgr = to_fpga_manager(dev);
498
499 if (!try_module_get(dev->parent->driver->owner))
500 goto err_dev;
501
502 return mgr;
503
504err_dev:
505 put_device(dev);
506 return ERR_PTR(-ENODEV);
507}
508
509static int fpga_mgr_dev_match(struct device *dev, const void *data)
510{
511 return dev->parent == data;
512}
513
514
515
516
517
518
519
520struct fpga_manager *fpga_mgr_get(struct device *dev)
521{
522 struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
523 fpga_mgr_dev_match);
524 if (!mgr_dev)
525 return ERR_PTR(-ENODEV);
526
527 return __fpga_mgr_get(mgr_dev);
528}
529EXPORT_SYMBOL_GPL(fpga_mgr_get);
530
531
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533
534
535
536
537
538struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
539{
540 struct device *dev;
541
542 dev = class_find_device_by_of_node(fpga_mgr_class, node);
543 if (!dev)
544 return ERR_PTR(-ENODEV);
545
546 return __fpga_mgr_get(dev);
547}
548EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
549
550
551
552
553
554void fpga_mgr_put(struct fpga_manager *mgr)
555{
556 module_put(mgr->dev.parent->driver->owner);
557 put_device(&mgr->dev);
558}
559EXPORT_SYMBOL_GPL(fpga_mgr_put);
560
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571
572
573int fpga_mgr_lock(struct fpga_manager *mgr)
574{
575 if (!mutex_trylock(&mgr->ref_mutex)) {
576 dev_err(&mgr->dev, "FPGA manager is in use.\n");
577 return -EBUSY;
578 }
579
580 return 0;
581}
582EXPORT_SYMBOL_GPL(fpga_mgr_lock);
583
584
585
586
587
588void fpga_mgr_unlock(struct fpga_manager *mgr)
589{
590 mutex_unlock(&mgr->ref_mutex);
591}
592EXPORT_SYMBOL_GPL(fpga_mgr_unlock);
593
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595
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597
598
599
600
601
602
603
604
605
606struct fpga_manager *fpga_mgr_create(struct device *parent, const char *name,
607 const struct fpga_manager_ops *mops,
608 void *priv)
609{
610 struct fpga_manager *mgr;
611 int id, ret;
612
613 if (!mops) {
614 dev_err(parent, "Attempt to register without fpga_manager_ops\n");
615 return NULL;
616 }
617
618 if (!name || !strlen(name)) {
619 dev_err(parent, "Attempt to register with no name!\n");
620 return NULL;
621 }
622
623 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
624 if (!mgr)
625 return NULL;
626
627 id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
628 if (id < 0)
629 goto error_kfree;
630
631 mutex_init(&mgr->ref_mutex);
632
633 mgr->name = name;
634 mgr->mops = mops;
635 mgr->priv = priv;
636
637 device_initialize(&mgr->dev);
638 mgr->dev.class = fpga_mgr_class;
639 mgr->dev.groups = mops->groups;
640 mgr->dev.parent = parent;
641 mgr->dev.of_node = parent->of_node;
642 mgr->dev.id = id;
643
644 ret = dev_set_name(&mgr->dev, "fpga%d", id);
645 if (ret)
646 goto error_device;
647
648 return mgr;
649
650error_device:
651 ida_simple_remove(&fpga_mgr_ida, id);
652error_kfree:
653 kfree(mgr);
654
655 return NULL;
656}
657EXPORT_SYMBOL_GPL(fpga_mgr_create);
658
659
660
661
662
663void fpga_mgr_free(struct fpga_manager *mgr)
664{
665 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
666 kfree(mgr);
667}
668EXPORT_SYMBOL_GPL(fpga_mgr_free);
669
670static void devm_fpga_mgr_release(struct device *dev, void *res)
671{
672 struct fpga_mgr_devres *dr = res;
673
674 fpga_mgr_free(dr->mgr);
675}
676
677
678
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689
690
691
692
693
694struct fpga_manager *devm_fpga_mgr_create(struct device *parent, const char *name,
695 const struct fpga_manager_ops *mops,
696 void *priv)
697{
698 struct fpga_mgr_devres *dr;
699
700 dr = devres_alloc(devm_fpga_mgr_release, sizeof(*dr), GFP_KERNEL);
701 if (!dr)
702 return NULL;
703
704 dr->mgr = fpga_mgr_create(parent, name, mops, priv);
705 if (!dr->mgr) {
706 devres_free(dr);
707 return NULL;
708 }
709
710 devres_add(parent, dr);
711
712 return dr->mgr;
713}
714EXPORT_SYMBOL_GPL(devm_fpga_mgr_create);
715
716
717
718
719
720
721
722int fpga_mgr_register(struct fpga_manager *mgr)
723{
724 int ret;
725
726
727
728
729
730
731 mgr->state = fpga_mgr_state(mgr);
732
733 ret = device_add(&mgr->dev);
734 if (ret)
735 goto error_device;
736
737 dev_info(&mgr->dev, "%s registered\n", mgr->name);
738
739 return 0;
740
741error_device:
742 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
743
744 return ret;
745}
746EXPORT_SYMBOL_GPL(fpga_mgr_register);
747
748
749
750
751
752
753
754void fpga_mgr_unregister(struct fpga_manager *mgr)
755{
756 dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
757
758
759
760
761
762 fpga_mgr_fpga_remove(mgr);
763
764 device_unregister(&mgr->dev);
765}
766EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
767
768static int fpga_mgr_devres_match(struct device *dev, void *res,
769 void *match_data)
770{
771 struct fpga_mgr_devres *dr = res;
772
773 return match_data == dr->mgr;
774}
775
776static void devm_fpga_mgr_unregister(struct device *dev, void *res)
777{
778 struct fpga_mgr_devres *dr = res;
779
780 fpga_mgr_unregister(dr->mgr);
781}
782
783
784
785
786
787
788
789
790
791int devm_fpga_mgr_register(struct device *dev, struct fpga_manager *mgr)
792{
793 struct fpga_mgr_devres *dr;
794 int ret;
795
796
797
798
799
800 if (WARN_ON(!devres_find(dev, devm_fpga_mgr_release,
801 fpga_mgr_devres_match, mgr)))
802 return -EINVAL;
803
804 dr = devres_alloc(devm_fpga_mgr_unregister, sizeof(*dr), GFP_KERNEL);
805 if (!dr)
806 return -ENOMEM;
807
808 ret = fpga_mgr_register(mgr);
809 if (ret) {
810 devres_free(dr);
811 return ret;
812 }
813
814 dr->mgr = mgr;
815 devres_add(dev, dr);
816
817 return 0;
818}
819EXPORT_SYMBOL_GPL(devm_fpga_mgr_register);
820
821static void fpga_mgr_dev_release(struct device *dev)
822{
823}
824
825static int __init fpga_mgr_class_init(void)
826{
827 pr_info("FPGA manager framework\n");
828
829 fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
830 if (IS_ERR(fpga_mgr_class))
831 return PTR_ERR(fpga_mgr_class);
832
833 fpga_mgr_class->dev_groups = fpga_mgr_groups;
834 fpga_mgr_class->dev_release = fpga_mgr_dev_release;
835
836 return 0;
837}
838
839static void __exit fpga_mgr_class_exit(void)
840{
841 class_destroy(fpga_mgr_class);
842 ida_destroy(&fpga_mgr_ida);
843}
844
845MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
846MODULE_DESCRIPTION("FPGA manager framework");
847MODULE_LICENSE("GPL v2");
848
849subsys_initcall(fpga_mgr_class_init);
850module_exit(fpga_mgr_class_exit);
851