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8#include <linux/bitops.h>
9#include <linux/gpio/driver.h>
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/mutex.h>
13#include <linux/of_device.h>
14#include <linux/of_gpio.h>
15#include <linux/seq_file.h>
16#include <linux/spi/spi.h>
17#include <linux/regmap.h>
18
19
20#define XRA_GSR 0x00
21#define XRA_OCR 0x02
22#define XRA_PIR 0x04
23#define XRA_GCR 0x06
24#define XRA_PUR 0x08
25#define XRA_IER 0x0A
26#define XRA_TSCR 0x0C
27#define XRA_ISR 0x0E
28#define XRA_REIR 0x10
29#define XRA_FEIR 0x12
30#define XRA_IFR 0x14
31#define XRA_LAST 0x15
32
33struct xra1403 {
34 struct gpio_chip chip;
35 struct regmap *regmap;
36};
37
38static const struct regmap_config xra1403_regmap_cfg = {
39 .reg_bits = 7,
40 .pad_bits = 1,
41 .val_bits = 8,
42
43 .max_register = XRA_LAST,
44};
45
46static unsigned int to_reg(unsigned int reg, unsigned int offset)
47{
48 return reg + (offset > 7);
49}
50
51static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
52{
53 struct xra1403 *xra = gpiochip_get_data(chip);
54
55 return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
56 BIT(offset % 8), BIT(offset % 8));
57}
58
59static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
60 int value)
61{
62 int ret;
63 struct xra1403 *xra = gpiochip_get_data(chip);
64
65 ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
66 BIT(offset % 8), 0);
67 if (ret)
68 return ret;
69
70 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
71 BIT(offset % 8), value ? BIT(offset % 8) : 0);
72
73 return ret;
74}
75
76static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
77{
78 int ret;
79 unsigned int val;
80 struct xra1403 *xra = gpiochip_get_data(chip);
81
82 ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
83 if (ret)
84 return ret;
85
86 if (val & BIT(offset % 8))
87 return GPIO_LINE_DIRECTION_IN;
88
89 return GPIO_LINE_DIRECTION_OUT;
90}
91
92static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
93{
94 int ret;
95 unsigned int val;
96 struct xra1403 *xra = gpiochip_get_data(chip);
97
98 ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
99 if (ret)
100 return ret;
101
102 return !!(val & BIT(offset % 8));
103}
104
105static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
106{
107 int ret;
108 struct xra1403 *xra = gpiochip_get_data(chip);
109
110 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
111 BIT(offset % 8), value ? BIT(offset % 8) : 0);
112 if (ret)
113 dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
114 offset, ret);
115}
116
117#ifdef CONFIG_DEBUG_FS
118static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
119{
120 int reg;
121 struct xra1403 *xra = gpiochip_get_data(chip);
122 int value[XRA_LAST];
123 int i;
124 const char *label;
125 unsigned int gcr;
126 unsigned int gsr;
127
128 seq_puts(s, "xra reg:");
129 for (reg = 0; reg <= XRA_LAST; reg++)
130 seq_printf(s, " %2.2x", reg);
131 seq_puts(s, "\n value:");
132 for (reg = 0; reg < XRA_LAST; reg++) {
133 regmap_read(xra->regmap, reg, &value[reg]);
134 seq_printf(s, " %2.2x", value[reg]);
135 }
136 seq_puts(s, "\n");
137
138 gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
139 gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
140 for_each_requested_gpio(chip, i, label) {
141 seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
142 chip->base + i, label,
143 (gcr & BIT(i)) ? "in" : "out",
144 (gsr & BIT(i)) ? "hi" : "lo");
145 }
146}
147#else
148#define xra1403_dbg_show NULL
149#endif
150
151static int xra1403_probe(struct spi_device *spi)
152{
153 struct xra1403 *xra;
154 struct gpio_desc *reset_gpio;
155 int ret;
156
157 xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
158 if (!xra)
159 return -ENOMEM;
160
161
162 reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
163 if (IS_ERR(reset_gpio))
164 dev_warn(&spi->dev, "Could not get reset-gpios\n");
165
166 xra->chip.direction_input = xra1403_direction_input;
167 xra->chip.direction_output = xra1403_direction_output;
168 xra->chip.get_direction = xra1403_get_direction;
169 xra->chip.get = xra1403_get;
170 xra->chip.set = xra1403_set;
171
172 xra->chip.dbg_show = xra1403_dbg_show;
173
174 xra->chip.ngpio = 16;
175 xra->chip.label = "xra1403";
176
177 xra->chip.base = -1;
178 xra->chip.can_sleep = true;
179 xra->chip.parent = &spi->dev;
180 xra->chip.owner = THIS_MODULE;
181
182 xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
183 if (IS_ERR(xra->regmap)) {
184 ret = PTR_ERR(xra->regmap);
185 dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
186 return ret;
187 }
188
189 return devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
190}
191
192static const struct spi_device_id xra1403_ids[] = {
193 { "xra1403" },
194 {},
195};
196MODULE_DEVICE_TABLE(spi, xra1403_ids);
197
198static const struct of_device_id xra1403_spi_of_match[] = {
199 { .compatible = "exar,xra1403" },
200 {},
201};
202MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
203
204static struct spi_driver xra1403_driver = {
205 .probe = xra1403_probe,
206 .id_table = xra1403_ids,
207 .driver = {
208 .name = "xra1403",
209 .of_match_table = of_match_ptr(xra1403_spi_of_match),
210 },
211};
212
213module_spi_driver(xra1403_driver);
214
215MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
216MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
217MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
218MODULE_LICENSE("GPL v2");
219
