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25#include "amdgpu.h"
26
27uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)
28{
29 uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;
30
31 addr -= AMDGPU_VA_RESERVED_SIZE;
32 addr = amdgpu_gmc_sign_extend(addr);
33
34 return addr;
35}
36
37int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo,
38 u32 domain, uint32_t size)
39{
40 void *ptr;
41
42 amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
43 domain, bo,
44 NULL, &ptr);
45 if (!*bo)
46 return -ENOMEM;
47
48 memset(ptr, 0, size);
49 adev->virt.csa_cpu_addr = ptr;
50 return 0;
51}
52
53void amdgpu_free_static_csa(struct amdgpu_bo **bo)
54{
55 amdgpu_bo_free_kernel(bo, NULL, NULL);
56}
57
58
59
60
61
62
63
64int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
65 struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va,
66 uint64_t csa_addr, uint32_t size)
67{
68 struct ww_acquire_ctx ticket;
69 struct list_head list;
70 struct amdgpu_bo_list_entry pd;
71 struct ttm_validate_buffer csa_tv;
72 int r;
73
74 INIT_LIST_HEAD(&list);
75 INIT_LIST_HEAD(&csa_tv.head);
76 csa_tv.bo = &bo->tbo;
77 csa_tv.num_shared = 1;
78
79 list_add(&csa_tv.head, &list);
80 amdgpu_vm_get_pd_bo(vm, &list, &pd);
81
82 r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
83 if (r) {
84 DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);
85 return r;
86 }
87
88 *bo_va = amdgpu_vm_bo_add(adev, vm, bo);
89 if (!*bo_va) {
90 ttm_eu_backoff_reservation(&ticket, &list);
91 DRM_ERROR("failed to create bo_va for static CSA\n");
92 return -ENOMEM;
93 }
94
95 r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,
96 AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |
97 AMDGPU_PTE_EXECUTABLE);
98
99 if (r) {
100 DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);
101 amdgpu_vm_bo_rmv(adev, *bo_va);
102 ttm_eu_backoff_reservation(&ticket, &list);
103 return r;
104 }
105
106 ttm_eu_backoff_reservation(&ticket, &list);
107 return 0;
108}
109