LXR linux/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw

   1/*
   2* Copyright 2012-15 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#ifndef __DC_HWSS_DCE100_H__
  27#define __DC_HWSS_DCE100_H__
  28
  29#include "core_types.h"
  30#include "hw_sequencer_private.h"
  31
  32struct dc;
  33struct dc_state;
  34
  35void dce100_hw_sequencer_construct(struct dc *dc);
  36
  37void dce100_prepare_bandwidth(
  38                struct dc *dc,
  39                struct dc_state *context);
  40
  41void dce100_optimize_bandwidth(
  42                struct dc *dc,
  43                struct dc_state *context);
  44
  45bool dce100_enable_display_power_gating(struct dc *dc, uint8_t controller_id,
  46                                        struct dc_bios *dcb,
  47                                        enum pipe_gating_control power_gating);
  48
  49#endif /* __DC_HWSS_DCE100_H__ */
  50
  51