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25#ifndef __DC_MEM_INPUT_DCN10_H__
26#define __DC_MEM_INPUT_DCN10_H__
27
28#include "hubp.h"
29
30#define TO_DCN10_HUBP(hubp)\
31 container_of(hubp, struct dcn10_hubp, base)
32
33
34#define HUBP_REG_LIST_DCN(id)\
35 SRI(DCHUBP_CNTL, HUBP, id),\
36 SRI(HUBPREQ_DEBUG_DB, HUBP, id),\
37 SRI(HUBPREQ_DEBUG, HUBP, id),\
38 SRI(DCSURF_ADDR_CONFIG, HUBP, id),\
39 SRI(DCSURF_TILING_CONFIG, HUBP, id),\
40 SRI(DCSURF_SURFACE_PITCH, HUBPREQ, id),\
41 SRI(DCSURF_SURFACE_PITCH_C, HUBPREQ, id),\
42 SRI(DCSURF_SURFACE_CONFIG, HUBP, id),\
43 SRI(DCSURF_FLIP_CONTROL, HUBPREQ, id),\
44 SRI(DCSURF_PRI_VIEWPORT_DIMENSION, HUBP, id), \
45 SRI(DCSURF_PRI_VIEWPORT_START, HUBP, id), \
46 SRI(DCSURF_SEC_VIEWPORT_DIMENSION, HUBP, id), \
47 SRI(DCSURF_SEC_VIEWPORT_START, HUBP, id), \
48 SRI(DCSURF_PRI_VIEWPORT_DIMENSION_C, HUBP, id), \
49 SRI(DCSURF_PRI_VIEWPORT_START_C, HUBP, id), \
50 SRI(DCSURF_SEC_VIEWPORT_DIMENSION_C, HUBP, id), \
51 SRI(DCSURF_SEC_VIEWPORT_START_C, HUBP, id), \
52 SRI(DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH, HUBPREQ, id),\
53 SRI(DCSURF_PRIMARY_SURFACE_ADDRESS, HUBPREQ, id),\
54 SRI(DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH, HUBPREQ, id),\
55 SRI(DCSURF_SECONDARY_SURFACE_ADDRESS, HUBPREQ, id),\
56 SRI(DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH, HUBPREQ, id),\
57 SRI(DCSURF_PRIMARY_META_SURFACE_ADDRESS, HUBPREQ, id),\
58 SRI(DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH, HUBPREQ, id),\
59 SRI(DCSURF_SECONDARY_META_SURFACE_ADDRESS, HUBPREQ, id),\
60 SRI(DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C, HUBPREQ, id),\
61 SRI(DCSURF_PRIMARY_SURFACE_ADDRESS_C, HUBPREQ, id),\
62 SRI(DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C, HUBPREQ, id),\
63 SRI(DCSURF_SECONDARY_SURFACE_ADDRESS_C, HUBPREQ, id),\
64 SRI(DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C, HUBPREQ, id),\
65 SRI(DCSURF_PRIMARY_META_SURFACE_ADDRESS_C, HUBPREQ, id),\
66 SRI(DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C, HUBPREQ, id),\
67 SRI(DCSURF_SECONDARY_META_SURFACE_ADDRESS_C, HUBPREQ, id),\
68 SRI(DCSURF_SURFACE_INUSE, HUBPREQ, id),\
69 SRI(DCSURF_SURFACE_INUSE_HIGH, HUBPREQ, id),\
70 SRI(DCSURF_SURFACE_INUSE_C, HUBPREQ, id),\
71 SRI(DCSURF_SURFACE_INUSE_HIGH_C, HUBPREQ, id),\
72 SRI(DCSURF_SURFACE_EARLIEST_INUSE, HUBPREQ, id),\
73 SRI(DCSURF_SURFACE_EARLIEST_INUSE_HIGH, HUBPREQ, id),\
74 SRI(DCSURF_SURFACE_EARLIEST_INUSE_C, HUBPREQ, id),\
75 SRI(DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C, HUBPREQ, id),\
76 SRI(DCSURF_SURFACE_CONTROL, HUBPREQ, id),\
77 SRI(DCSURF_SURFACE_FLIP_INTERRUPT, HUBPREQ, id),\
78 SRI(HUBPRET_CONTROL, HUBPRET, id),\
79 SRI(DCN_EXPANSION_MODE, HUBPREQ, id),\
80 SRI(DCHUBP_REQ_SIZE_CONFIG, HUBP, id),\
81 SRI(DCHUBP_REQ_SIZE_CONFIG_C, HUBP, id),\
82 SRI(BLANK_OFFSET_0, HUBPREQ, id),\
83 SRI(BLANK_OFFSET_1, HUBPREQ, id),\
84 SRI(DST_DIMENSIONS, HUBPREQ, id),\
85 SRI(DST_AFTER_SCALER, HUBPREQ, id),\
86 SRI(VBLANK_PARAMETERS_0, HUBPREQ, id),\
87 SRI(REF_FREQ_TO_PIX_FREQ, HUBPREQ, id),\
88 SRI(VBLANK_PARAMETERS_1, HUBPREQ, id),\
89 SRI(VBLANK_PARAMETERS_3, HUBPREQ, id),\
90 SRI(NOM_PARAMETERS_4, HUBPREQ, id),\
91 SRI(NOM_PARAMETERS_5, HUBPREQ, id),\
92 SRI(PER_LINE_DELIVERY_PRE, HUBPREQ, id),\
93 SRI(PER_LINE_DELIVERY, HUBPREQ, id),\
94 SRI(VBLANK_PARAMETERS_2, HUBPREQ, id),\
95 SRI(VBLANK_PARAMETERS_4, HUBPREQ, id),\
96 SRI(NOM_PARAMETERS_6, HUBPREQ, id),\
97 SRI(NOM_PARAMETERS_7, HUBPREQ, id),\
98 SRI(DCN_TTU_QOS_WM, HUBPREQ, id),\
99 SRI(DCN_GLOBAL_TTU_CNTL, HUBPREQ, id),\
100 SRI(DCN_SURF0_TTU_CNTL0, HUBPREQ, id),\
101 SRI(DCN_SURF0_TTU_CNTL1, HUBPREQ, id),\
102 SRI(DCN_SURF1_TTU_CNTL0, HUBPREQ, id),\
103 SRI(DCN_SURF1_TTU_CNTL1, HUBPREQ, id),\
104 SRI(DCN_CUR0_TTU_CNTL0, HUBPREQ, id),\
105 SRI(DCN_CUR0_TTU_CNTL1, HUBPREQ, id),\
106 SRI(HUBP_CLK_CNTL, HUBP, id)
107
108
109#define HUBP_REG_LIST_DCN_VM(id)\
110 SRI(NOM_PARAMETERS_0, HUBPREQ, id),\
111 SRI(NOM_PARAMETERS_1, HUBPREQ, id),\
112 SRI(NOM_PARAMETERS_2, HUBPREQ, id),\
113 SRI(NOM_PARAMETERS_3, HUBPREQ, id),\
114 SRI(DCN_VM_MX_L1_TLB_CNTL, HUBPREQ, id)
115
116#define HUBP_REG_LIST_DCN10(id)\
117 HUBP_REG_LIST_DCN(id),\
118 HUBP_REG_LIST_DCN_VM(id),\
119 SRI(PREFETCH_SETTINS, HUBPREQ, id),\
120 SRI(PREFETCH_SETTINS_C, HUBPREQ, id),\
121 SRI(DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB, HUBPREQ, id),\
122 SRI(DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB, HUBPREQ, id),\
123 SRI(DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB, HUBPREQ, id),\
124 SRI(DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB, HUBPREQ, id),\
125 SRI(DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB, HUBPREQ, id),\
126 SRI(DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB, HUBPREQ, id),\
127 SRI(DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB, HUBPREQ, id),\
128 SRI(DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB, HUBPREQ, id),\
129 SRI(DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, HUBPREQ, id),\
130 SRI(DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, HUBPREQ, id),\
131 SRI(DCN_VM_SYSTEM_APERTURE_LOW_ADDR_MSB, HUBPREQ, id),\
132 SRI(DCN_VM_SYSTEM_APERTURE_LOW_ADDR_LSB, HUBPREQ, id),\
133 SRI(DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_MSB, HUBPREQ, id),\
134 SRI(DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB, HUBPREQ, id),\
135 SRI(CURSOR_SETTINS, HUBPREQ, id), \
136 SRI(CURSOR_SURFACE_ADDRESS_HIGH, CURSOR, id), \
137 SRI(CURSOR_SURFACE_ADDRESS, CURSOR, id), \
138 SRI(CURSOR_SIZE, CURSOR, id), \
139 SRI(CURSOR_CONTROL, CURSOR, id), \
140 SRI(CURSOR_POSITION, CURSOR, id), \
141 SRI(CURSOR_HOT_SPOT, CURSOR, id), \
142 SRI(CURSOR_DST_OFFSET, CURSOR, id)
143
144#define HUBP_COMMON_REG_VARIABLE_LIST \
145 uint32_t DCHUBP_CNTL; \
146 uint32_t HUBPREQ_DEBUG_DB; \
147 uint32_t HUBPREQ_DEBUG; \
148 uint32_t DCSURF_ADDR_CONFIG; \
149 uint32_t DCSURF_TILING_CONFIG; \
150 uint32_t DCSURF_SURFACE_PITCH; \
151 uint32_t DCSURF_SURFACE_PITCH_C; \
152 uint32_t DCSURF_SURFACE_CONFIG; \
153 uint32_t DCSURF_FLIP_CONTROL; \
154 uint32_t DCSURF_PRI_VIEWPORT_DIMENSION; \
155 uint32_t DCSURF_PRI_VIEWPORT_START; \
156 uint32_t DCSURF_SEC_VIEWPORT_DIMENSION; \
157 uint32_t DCSURF_SEC_VIEWPORT_START; \
158 uint32_t DCSURF_PRI_VIEWPORT_DIMENSION_C; \
159 uint32_t DCSURF_PRI_VIEWPORT_START_C; \
160 uint32_t DCSURF_SEC_VIEWPORT_DIMENSION_C; \
161 uint32_t DCSURF_SEC_VIEWPORT_START_C; \
162 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH; \
163 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS; \
164 uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH; \
165 uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS; \
166 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH; \
167 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS; \
168 uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH; \
169 uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS; \
170 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C; \
171 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C; \
172 uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C; \
173 uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_C; \
174 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C; \
175 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C; \
176 uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C; \
177 uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_C; \
178 uint32_t DCSURF_SURFACE_INUSE; \
179 uint32_t DCSURF_SURFACE_INUSE_HIGH; \
180 uint32_t DCSURF_SURFACE_INUSE_C; \
181 uint32_t DCSURF_SURFACE_INUSE_HIGH_C; \
182 uint32_t DCSURF_SURFACE_EARLIEST_INUSE; \
183 uint32_t DCSURF_SURFACE_EARLIEST_INUSE_HIGH; \
184 uint32_t DCSURF_SURFACE_EARLIEST_INUSE_C; \
185 uint32_t DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C; \
186 uint32_t DCSURF_SURFACE_CONTROL; \
187 uint32_t DCSURF_SURFACE_FLIP_INTERRUPT; \
188 uint32_t HUBPRET_CONTROL; \
189 uint32_t DCN_EXPANSION_MODE; \
190 uint32_t DCHUBP_REQ_SIZE_CONFIG; \
191 uint32_t DCHUBP_REQ_SIZE_CONFIG_C; \
192 uint32_t BLANK_OFFSET_0; \
193 uint32_t BLANK_OFFSET_1; \
194 uint32_t DST_DIMENSIONS; \
195 uint32_t DST_AFTER_SCALER; \
196 uint32_t PREFETCH_SETTINS; \
197 uint32_t PREFETCH_SETTINGS; \
198 uint32_t VBLANK_PARAMETERS_0; \
199 uint32_t REF_FREQ_TO_PIX_FREQ; \
200 uint32_t VBLANK_PARAMETERS_1; \
201 uint32_t VBLANK_PARAMETERS_3; \
202 uint32_t NOM_PARAMETERS_0; \
203 uint32_t NOM_PARAMETERS_1; \
204 uint32_t NOM_PARAMETERS_4; \
205 uint32_t NOM_PARAMETERS_5; \
206 uint32_t PER_LINE_DELIVERY_PRE; \
207 uint32_t PER_LINE_DELIVERY; \
208 uint32_t PREFETCH_SETTINS_C; \
209 uint32_t PREFETCH_SETTINGS_C; \
210 uint32_t VBLANK_PARAMETERS_2; \
211 uint32_t VBLANK_PARAMETERS_4; \
212 uint32_t NOM_PARAMETERS_2; \
213 uint32_t NOM_PARAMETERS_3; \
214 uint32_t NOM_PARAMETERS_6; \
215 uint32_t NOM_PARAMETERS_7; \
216 uint32_t DCN_TTU_QOS_WM; \
217 uint32_t DCN_GLOBAL_TTU_CNTL; \
218 uint32_t DCN_SURF0_TTU_CNTL0; \
219 uint32_t DCN_SURF0_TTU_CNTL1; \
220 uint32_t DCN_SURF1_TTU_CNTL0; \
221 uint32_t DCN_SURF1_TTU_CNTL1; \
222 uint32_t DCN_CUR0_TTU_CNTL0; \
223 uint32_t DCN_CUR0_TTU_CNTL1; \
224 uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB; \
225 uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB; \
226 uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB; \
227 uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB; \
228 uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB; \
229 uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB; \
230 uint32_t DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB; \
231 uint32_t DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB; \
232 uint32_t DCN_VM_MX_L1_TLB_CNTL; \
233 uint32_t DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB; \
234 uint32_t DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB; \
235 uint32_t DCN_VM_SYSTEM_APERTURE_LOW_ADDR_MSB; \
236 uint32_t DCN_VM_SYSTEM_APERTURE_LOW_ADDR_LSB; \
237 uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_MSB; \
238 uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB; \
239 uint32_t DCN_VM_SYSTEM_APERTURE_LOW_ADDR; \
240 uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR; \
241 uint32_t CURSOR_SETTINS; \
242 uint32_t CURSOR_SETTINGS; \
243 uint32_t CURSOR_SURFACE_ADDRESS_HIGH; \
244 uint32_t CURSOR_SURFACE_ADDRESS; \
245 uint32_t CURSOR_SIZE; \
246 uint32_t CURSOR_CONTROL; \
247 uint32_t CURSOR_POSITION; \
248 uint32_t CURSOR_HOT_SPOT; \
249 uint32_t CURSOR_DST_OFFSET; \
250 uint32_t HUBP_CLK_CNTL
251
252#define HUBP_SF(reg_name, field_name, post_fix)\
253 .field_name = reg_name ## __ ## field_name ## post_fix
254
255
256
257#define HUBP_MASK_SH_LIST_DCN_SHARE_COMMON(mask_sh)\
258 HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_BLANK_EN, mask_sh),\
259 HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_TTU_DISABLE, mask_sh),\
260 HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_UNDERFLOW_STATUS, mask_sh),\
261 HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_UNDERFLOW_CLEAR, mask_sh),\
262 HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_NO_OUTSTANDING_REQ, mask_sh),\
263 HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_VTG_SEL, mask_sh),\
264 HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_DISABLE, mask_sh),\
265 HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_IN_BLANK, mask_sh),\
266 HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_PIPES, mask_sh),\
267 HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_BANKS, mask_sh),\
268 HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, PIPE_INTERLEAVE, mask_sh),\
269 HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_SE, mask_sh),\
270 HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_RB_PER_SE, mask_sh),\
271 HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, MAX_COMPRESSED_FRAGS, mask_sh),\
272 HUBP_SF(HUBP0_DCSURF_TILING_CONFIG, SW_MODE, mask_sh),\
273 HUBP_SF(HUBP0_DCSURF_TILING_CONFIG, META_LINEAR, mask_sh),\
274 HUBP_SF(HUBP0_DCSURF_TILING_CONFIG, PIPE_ALIGNED, mask_sh),\
275 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_PITCH, PITCH, mask_sh),\
276 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_PITCH, META_PITCH, mask_sh),\
277 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_PITCH_C, PITCH_C, mask_sh),\
278 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_PITCH_C, META_PITCH_C, mask_sh),\
279 HUBP_SF(HUBP0_DCSURF_SURFACE_CONFIG, SURFACE_PIXEL_FORMAT, mask_sh),\
280 HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_FLIP_TYPE, mask_sh),\
281 HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_FLIP_MODE_FOR_STEREOSYNC, mask_sh),\
282 HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, mask_sh),\
283 HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_FLIP_PENDING, mask_sh),\
284 HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_UPDATE_LOCK, mask_sh),\
285 HUBP_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH, mask_sh),\
286 HUBP_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT, mask_sh),\
287 HUBP_SF(HUBP0_DCSURF_PRI_VIEWPORT_START, PRI_VIEWPORT_X_START, mask_sh),\
288 HUBP_SF(HUBP0_DCSURF_PRI_VIEWPORT_START, PRI_VIEWPORT_Y_START, mask_sh),\
289 HUBP_SF(HUBP0_DCSURF_SEC_VIEWPORT_DIMENSION, SEC_VIEWPORT_WIDTH, mask_sh),\
290 HUBP_SF(HUBP0_DCSURF_SEC_VIEWPORT_DIMENSION, SEC_VIEWPORT_HEIGHT, mask_sh),\
291 HUBP_SF(HUBP0_DCSURF_SEC_VIEWPORT_START, SEC_VIEWPORT_X_START, mask_sh),\
292 HUBP_SF(HUBP0_DCSURF_SEC_VIEWPORT_START, SEC_VIEWPORT_Y_START, mask_sh),\
293 HUBP_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_C, PRI_VIEWPORT_WIDTH_C, mask_sh),\
294 HUBP_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_C, PRI_VIEWPORT_HEIGHT_C, mask_sh),\
295 HUBP_SF(HUBP0_DCSURF_PRI_VIEWPORT_START_C, PRI_VIEWPORT_X_START_C, mask_sh),\
296 HUBP_SF(HUBP0_DCSURF_PRI_VIEWPORT_START_C, PRI_VIEWPORT_Y_START_C, mask_sh),\
297 HUBP_SF(HUBP0_DCSURF_SEC_VIEWPORT_DIMENSION_C, SEC_VIEWPORT_WIDTH_C, mask_sh),\
298 HUBP_SF(HUBP0_DCSURF_SEC_VIEWPORT_DIMENSION_C, SEC_VIEWPORT_HEIGHT_C, mask_sh),\
299 HUBP_SF(HUBP0_DCSURF_SEC_VIEWPORT_START_C, SEC_VIEWPORT_X_START_C, mask_sh),\
300 HUBP_SF(HUBP0_DCSURF_SEC_VIEWPORT_START_C, SEC_VIEWPORT_Y_START_C, mask_sh),\
301 HUBP_SF(HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH, PRIMARY_SURFACE_ADDRESS_HIGH, mask_sh),\
302 HUBP_SF(HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS, PRIMARY_SURFACE_ADDRESS, mask_sh),\
303 HUBP_SF(HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH, SECONDARY_SURFACE_ADDRESS_HIGH, mask_sh),\
304 HUBP_SF(HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS, SECONDARY_SURFACE_ADDRESS, mask_sh),\
305 HUBP_SF(HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH, PRIMARY_META_SURFACE_ADDRESS_HIGH, mask_sh),\
306 HUBP_SF(HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS, PRIMARY_META_SURFACE_ADDRESS, mask_sh),\
307 HUBP_SF(HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH, SECONDARY_META_SURFACE_ADDRESS_HIGH, mask_sh),\
308 HUBP_SF(HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS, SECONDARY_META_SURFACE_ADDRESS, mask_sh),\
309 HUBP_SF(HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C, PRIMARY_SURFACE_ADDRESS_HIGH_C, mask_sh),\
310 HUBP_SF(HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_C, PRIMARY_SURFACE_ADDRESS_C, mask_sh),\
311 HUBP_SF(HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C, SECONDARY_SURFACE_ADDRESS_HIGH_C, mask_sh),\
312 HUBP_SF(HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_C, SECONDARY_SURFACE_ADDRESS_C, mask_sh),\
313 HUBP_SF(HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C, PRIMARY_META_SURFACE_ADDRESS_HIGH_C, mask_sh),\
314 HUBP_SF(HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C, PRIMARY_META_SURFACE_ADDRESS_C, mask_sh),\
315 HUBP_SF(HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C, SECONDARY_META_SURFACE_ADDRESS_HIGH_C, mask_sh),\
316 HUBP_SF(HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C, SECONDARY_META_SURFACE_ADDRESS_C, mask_sh),\
317 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_INUSE, SURFACE_INUSE_ADDRESS, mask_sh),\
318 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH, SURFACE_INUSE_ADDRESS_HIGH, mask_sh),\
319 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_INUSE_C, SURFACE_INUSE_ADDRESS_C, mask_sh),\
320 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH_C, SURFACE_INUSE_ADDRESS_HIGH_C, mask_sh),\
321 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE, SURFACE_EARLIEST_INUSE_ADDRESS, mask_sh),\
322 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH, SURFACE_EARLIEST_INUSE_ADDRESS_HIGH, mask_sh),\
323 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_C, SURFACE_EARLIEST_INUSE_ADDRESS_C, mask_sh),\
324 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C, SURFACE_EARLIEST_INUSE_ADDRESS_HIGH_C, mask_sh),\
325 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, PRIMARY_SURFACE_TMZ, mask_sh),\
326 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, PRIMARY_SURFACE_TMZ_C, mask_sh),\
327 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, PRIMARY_META_SURFACE_TMZ, mask_sh),\
328 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, PRIMARY_META_SURFACE_TMZ_C, mask_sh),\
329 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, PRIMARY_SURFACE_DCC_EN, mask_sh),\
330 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, PRIMARY_SURFACE_DCC_IND_64B_BLK, mask_sh),\
331 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_SURFACE_TMZ, mask_sh),\
332 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_SURFACE_TMZ_C, mask_sh),\
333 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_META_SURFACE_TMZ, mask_sh),\
334 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_META_SURFACE_TMZ_C, mask_sh),\
335 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_SURFACE_DCC_EN, mask_sh),\
336 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_CONTROL, SECONDARY_SURFACE_DCC_IND_64B_BLK, mask_sh),\
337 HUBP_SF(HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT, SURFACE_FLIP_INT_MASK, mask_sh),\
338 HUBP_SF(HUBPRET0_HUBPRET_CONTROL, DET_BUF_PLANE1_BASE_ADDRESS, mask_sh),\
339 HUBP_SF(HUBPRET0_HUBPRET_CONTROL, CROSSBAR_SRC_CB_B, mask_sh),\
340 HUBP_SF(HUBPRET0_HUBPRET_CONTROL, CROSSBAR_SRC_CR_R, mask_sh),\
341 HUBP_SF(HUBPREQ0_DCN_EXPANSION_MODE, DRQ_EXPANSION_MODE, mask_sh),\
342 HUBP_SF(HUBPREQ0_DCN_EXPANSION_MODE, PRQ_EXPANSION_MODE, mask_sh),\
343 HUBP_SF(HUBPREQ0_DCN_EXPANSION_MODE, MRQ_EXPANSION_MODE, mask_sh),\
344 HUBP_SF(HUBPREQ0_DCN_EXPANSION_MODE, CRQ_EXPANSION_MODE, mask_sh),\
345 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG, CHUNK_SIZE, mask_sh),\
346 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG, MIN_CHUNK_SIZE, mask_sh),\
347 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG, META_CHUNK_SIZE, mask_sh),\
348 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG, MIN_META_CHUNK_SIZE, mask_sh),\
349 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG, DPTE_GROUP_SIZE, mask_sh),\
350 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG, SWATH_HEIGHT, mask_sh),\
351 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG, PTE_ROW_HEIGHT_LINEAR, mask_sh),\
352 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG_C, CHUNK_SIZE_C, mask_sh),\
353 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG_C, MIN_CHUNK_SIZE_C, mask_sh),\
354 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG_C, META_CHUNK_SIZE_C, mask_sh),\
355 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG_C, MIN_META_CHUNK_SIZE_C, mask_sh),\
356 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG_C, DPTE_GROUP_SIZE_C, mask_sh),\
357 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG_C, SWATH_HEIGHT_C, mask_sh),\
358 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG_C, PTE_ROW_HEIGHT_LINEAR_C, mask_sh),\
359 HUBP_SF(HUBPREQ0_BLANK_OFFSET_0, REFCYC_H_BLANK_END, mask_sh),\
360 HUBP_SF(HUBPREQ0_BLANK_OFFSET_0, DLG_V_BLANK_END, mask_sh),\
361 HUBP_SF(HUBPREQ0_BLANK_OFFSET_1, MIN_DST_Y_NEXT_START, mask_sh),\
362 HUBP_SF(HUBPREQ0_DST_DIMENSIONS, REFCYC_PER_HTOTAL, mask_sh),\
363 HUBP_SF(HUBPREQ0_DST_AFTER_SCALER, REFCYC_X_AFTER_SCALER, mask_sh),\
364 HUBP_SF(HUBPREQ0_DST_AFTER_SCALER, DST_Y_AFTER_SCALER, mask_sh),\
365 HUBP_SF(HUBPREQ0_VBLANK_PARAMETERS_0, DST_Y_PER_VM_VBLANK, mask_sh),\
366 HUBP_SF(HUBPREQ0_VBLANK_PARAMETERS_0, DST_Y_PER_ROW_VBLANK, mask_sh),\
367 HUBP_SF(HUBPREQ0_REF_FREQ_TO_PIX_FREQ, REF_FREQ_TO_PIX_FREQ, mask_sh),\
368 HUBP_SF(HUBPREQ0_VBLANK_PARAMETERS_1, REFCYC_PER_PTE_GROUP_VBLANK_L, mask_sh),\
369 HUBP_SF(HUBPREQ0_VBLANK_PARAMETERS_3, REFCYC_PER_META_CHUNK_VBLANK_L, mask_sh),\
370 HUBP_SF(HUBPREQ0_NOM_PARAMETERS_4, DST_Y_PER_META_ROW_NOM_L, mask_sh),\
371 HUBP_SF(HUBPREQ0_NOM_PARAMETERS_5, REFCYC_PER_META_CHUNK_NOM_L, mask_sh),\
372 HUBP_SF(HUBPREQ0_PER_LINE_DELIVERY_PRE, REFCYC_PER_LINE_DELIVERY_PRE_L, mask_sh),\
373 HUBP_SF(HUBPREQ0_PER_LINE_DELIVERY_PRE, REFCYC_PER_LINE_DELIVERY_PRE_C, mask_sh),\
374 HUBP_SF(HUBPREQ0_PER_LINE_DELIVERY, REFCYC_PER_LINE_DELIVERY_L, mask_sh),\
375 HUBP_SF(HUBPREQ0_PER_LINE_DELIVERY, REFCYC_PER_LINE_DELIVERY_C, mask_sh),\
376 HUBP_SF(HUBPREQ0_VBLANK_PARAMETERS_2, REFCYC_PER_PTE_GROUP_VBLANK_C, mask_sh),\
377 HUBP_SF(HUBPREQ0_VBLANK_PARAMETERS_4, REFCYC_PER_META_CHUNK_VBLANK_C, mask_sh),\
378 HUBP_SF(HUBPREQ0_NOM_PARAMETERS_6, DST_Y_PER_META_ROW_NOM_C, mask_sh),\
379 HUBP_SF(HUBPREQ0_NOM_PARAMETERS_7, REFCYC_PER_META_CHUNK_NOM_C, mask_sh),\
380 HUBP_SF(HUBPREQ0_DCN_TTU_QOS_WM, QoS_LEVEL_LOW_WM, mask_sh),\
381 HUBP_SF(HUBPREQ0_DCN_TTU_QOS_WM, QoS_LEVEL_HIGH_WM, mask_sh),\
382 HUBP_SF(HUBPREQ0_DCN_GLOBAL_TTU_CNTL, MIN_TTU_VBLANK, mask_sh),\
383 HUBP_SF(HUBPREQ0_DCN_GLOBAL_TTU_CNTL, QoS_LEVEL_FLIP, mask_sh),\
384 HUBP_SF(HUBPREQ0_DCN_SURF0_TTU_CNTL0, REFCYC_PER_REQ_DELIVERY, mask_sh),\
385 HUBP_SF(HUBPREQ0_DCN_SURF0_TTU_CNTL0, QoS_LEVEL_FIXED, mask_sh),\
386 HUBP_SF(HUBPREQ0_DCN_SURF0_TTU_CNTL0, QoS_RAMP_DISABLE, mask_sh),\
387 HUBP_SF(HUBPREQ0_DCN_SURF0_TTU_CNTL1, REFCYC_PER_REQ_DELIVERY_PRE, mask_sh),\
388 HUBP_SF(HUBP0_HUBP_CLK_CNTL, HUBP_CLOCK_ENABLE, mask_sh)
389
390#define HUBP_MASK_SH_LIST_DCN_COMMON(mask_sh)\
391 HUBP_MASK_SH_LIST_DCN_SHARE_COMMON(mask_sh),\
392 HUBP_SF(HUBP0_DCSURF_TILING_CONFIG, RB_ALIGNED, mask_sh),\
393 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG, MPTE_GROUP_SIZE, mask_sh),\
394 HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG_C, MPTE_GROUP_SIZE_C, mask_sh)
395
396
397#define HUBP_MASK_SH_LIST_DCN(mask_sh)\
398 HUBP_MASK_SH_LIST_DCN_COMMON(mask_sh)
399
400
401#define HUBP_MASK_SH_LIST_DCN_VM(mask_sh)\
402 HUBP_SF(HUBPREQ0_NOM_PARAMETERS_0, DST_Y_PER_PTE_ROW_NOM_L, mask_sh),\
403 HUBP_SF(HUBPREQ0_NOM_PARAMETERS_1, REFCYC_PER_PTE_GROUP_NOM_L, mask_sh),\
404 HUBP_SF(HUBPREQ0_NOM_PARAMETERS_2, DST_Y_PER_PTE_ROW_NOM_C, mask_sh),\
405 HUBP_SF(HUBPREQ0_NOM_PARAMETERS_3, REFCYC_PER_PTE_GROUP_NOM_C, mask_sh),\
406 HUBP_SF(HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, mask_sh),\
407 HUBP_SF(HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, mask_sh),\
408 HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, REFCYC_PER_REQ_DELIVERY, mask_sh),\
409 HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, QoS_LEVEL_FIXED, mask_sh),\
410 HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, QoS_RAMP_DISABLE, mask_sh),\
411 HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL1, REFCYC_PER_REQ_DELIVERY_PRE, mask_sh)
412
413#define HUBP_MASK_SH_LIST_DCN10(mask_sh)\
414 HUBP_MASK_SH_LIST_DCN(mask_sh),\
415 HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
416 HUBP_SF(HUBP0_DCSURF_SURFACE_CONFIG, ROTATION_ANGLE, mask_sh),\
417 HUBP_SF(HUBP0_DCSURF_SURFACE_CONFIG, H_MIRROR_EN, mask_sh),\
418 HUBP_SF(HUBPREQ0_PREFETCH_SETTINS, DST_Y_PREFETCH, mask_sh),\
419 HUBP_SF(HUBPREQ0_PREFETCH_SETTINS, VRATIO_PREFETCH, mask_sh),\
420 HUBP_SF(HUBPREQ0_PREFETCH_SETTINS_C, VRATIO_PREFETCH_C, mask_sh),\
421 HUBP_SF(HUBPREQ0_DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB, VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB, mask_sh),\
422 HUBP_SF(HUBPREQ0_DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB, VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB, mask_sh),\
423 HUBP_SF(HUBPREQ0_DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB, VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB, mask_sh),\
424 HUBP_SF(HUBPREQ0_DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB, VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB, mask_sh),\
425 HUBP_SF(HUBPREQ0_DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB, VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB, mask_sh),\
426 HUBP_SF(HUBPREQ0_DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB, VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB, mask_sh),\
427 HUBP_SF(HUBPREQ0_DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB, VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB, mask_sh),\
428 HUBP_SF(HUBPREQ0_DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB, VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_SYSTEM, mask_sh),\
429 HUBP_SF(HUBPREQ0_DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB, VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB, mask_sh),\
430 HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_LOW_ADDR_MSB, MC_VM_SYSTEM_APERTURE_LOW_ADDR_MSB, mask_sh),\
431 HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_LOW_ADDR_LSB, MC_VM_SYSTEM_APERTURE_LOW_ADDR_LSB, mask_sh),\
432 HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_MSB, MC_VM_SYSTEM_APERTURE_HIGH_ADDR_MSB, mask_sh),\
433 HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB, MC_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB, mask_sh),\
434 HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, MC_VM_SYSTEM_APERTURE_DEFAULT_SYSTEM, mask_sh),\
435 HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, mask_sh),\
436 HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, mask_sh),\
437 HUBP_SF(HUBPREQ0_CURSOR_SETTINS, CURSOR0_DST_Y_OFFSET, mask_sh), \
438 HUBP_SF(HUBPREQ0_CURSOR_SETTINS, CURSOR0_CHUNK_HDL_ADJUST, mask_sh), \
439 HUBP_SF(CURSOR0_CURSOR_SURFACE_ADDRESS_HIGH, CURSOR_SURFACE_ADDRESS_HIGH, mask_sh), \
440 HUBP_SF(CURSOR0_CURSOR_SURFACE_ADDRESS, CURSOR_SURFACE_ADDRESS, mask_sh), \
441 HUBP_SF(CURSOR0_CURSOR_SIZE, CURSOR_WIDTH, mask_sh), \
442 HUBP_SF(CURSOR0_CURSOR_SIZE, CURSOR_HEIGHT, mask_sh), \
443 HUBP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_MODE, mask_sh), \
444 HUBP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_2X_MAGNIFY, mask_sh), \
445 HUBP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_PITCH, mask_sh), \
446 HUBP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_LINES_PER_CHUNK, mask_sh), \
447 HUBP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
448 HUBP_SF(CURSOR0_CURSOR_POSITION, CURSOR_X_POSITION, mask_sh), \
449 HUBP_SF(CURSOR0_CURSOR_POSITION, CURSOR_Y_POSITION, mask_sh), \
450 HUBP_SF(CURSOR0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_X, mask_sh), \
451 HUBP_SF(CURSOR0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \
452 HUBP_SF(CURSOR0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh)
453
454#define DCN_HUBP_REG_FIELD_BASE_LIST(type) \
455 type HUBP_BLANK_EN;\
456 type HUBP_DISABLE;\
457 type HUBP_TTU_DISABLE;\
458 type HUBP_NO_OUTSTANDING_REQ;\
459 type HUBP_VTG_SEL;\
460 type HUBP_UNDERFLOW_STATUS;\
461 type HUBP_UNDERFLOW_CLEAR;\
462 type HUBP_IN_BLANK;\
463 type NUM_PIPES;\
464 type NUM_BANKS;\
465 type PIPE_INTERLEAVE;\
466 type NUM_SE;\
467 type NUM_RB_PER_SE;\
468 type MAX_COMPRESSED_FRAGS;\
469 type SW_MODE;\
470 type META_LINEAR;\
471 type RB_ALIGNED;\
472 type PIPE_ALIGNED;\
473 type PITCH;\
474 type META_PITCH;\
475 type PITCH_C;\
476 type META_PITCH_C;\
477 type ROTATION_ANGLE;\
478 type H_MIRROR_EN;\
479 type SURFACE_PIXEL_FORMAT;\
480 type SURFACE_FLIP_TYPE;\
481 type SURFACE_FLIP_MODE_FOR_STEREOSYNC;\
482 type SURFACE_FLIP_IN_STEREOSYNC;\
483 type SURFACE_UPDATE_LOCK;\
484 type SURFACE_FLIP_PENDING;\
485 type PRI_VIEWPORT_WIDTH; \
486 type PRI_VIEWPORT_HEIGHT; \
487 type PRI_VIEWPORT_X_START; \
488 type PRI_VIEWPORT_Y_START; \
489 type SEC_VIEWPORT_WIDTH; \
490 type SEC_VIEWPORT_HEIGHT; \
491 type SEC_VIEWPORT_X_START; \
492 type SEC_VIEWPORT_Y_START; \
493 type PRI_VIEWPORT_WIDTH_C; \
494 type PRI_VIEWPORT_HEIGHT_C; \
495 type PRI_VIEWPORT_X_START_C; \
496 type PRI_VIEWPORT_Y_START_C; \
497 type SEC_VIEWPORT_WIDTH_C; \
498 type SEC_VIEWPORT_HEIGHT_C; \
499 type SEC_VIEWPORT_X_START_C; \
500 type SEC_VIEWPORT_Y_START_C; \
501 type PRIMARY_SURFACE_ADDRESS_HIGH;\
502 type PRIMARY_SURFACE_ADDRESS;\
503 type SECONDARY_SURFACE_ADDRESS_HIGH;\
504 type SECONDARY_SURFACE_ADDRESS;\
505 type PRIMARY_META_SURFACE_ADDRESS_HIGH;\
506 type PRIMARY_META_SURFACE_ADDRESS;\
507 type SECONDARY_META_SURFACE_ADDRESS_HIGH;\
508 type SECONDARY_META_SURFACE_ADDRESS;\
509 type PRIMARY_SURFACE_ADDRESS_HIGH_C;\
510 type PRIMARY_SURFACE_ADDRESS_C;\
511 type SECONDARY_SURFACE_ADDRESS_HIGH_C;\
512 type SECONDARY_SURFACE_ADDRESS_C;\
513 type PRIMARY_META_SURFACE_ADDRESS_HIGH_C;\
514 type PRIMARY_META_SURFACE_ADDRESS_C;\
515 type SECONDARY_META_SURFACE_ADDRESS_HIGH_C;\
516 type SECONDARY_META_SURFACE_ADDRESS_C;\
517 type SURFACE_INUSE_ADDRESS;\
518 type SURFACE_INUSE_ADDRESS_HIGH;\
519 type SURFACE_INUSE_ADDRESS_C;\
520 type SURFACE_INUSE_ADDRESS_HIGH_C;\
521 type SURFACE_EARLIEST_INUSE_ADDRESS;\
522 type SURFACE_EARLIEST_INUSE_ADDRESS_HIGH;\
523 type SURFACE_EARLIEST_INUSE_ADDRESS_C;\
524 type SURFACE_EARLIEST_INUSE_ADDRESS_HIGH_C;\
525 type PRIMARY_SURFACE_TMZ;\
526 type PRIMARY_SURFACE_TMZ_C;\
527 type SECONDARY_SURFACE_TMZ;\
528 type SECONDARY_SURFACE_TMZ_C;\
529 type PRIMARY_META_SURFACE_TMZ;\
530 type PRIMARY_META_SURFACE_TMZ_C;\
531 type SECONDARY_META_SURFACE_TMZ;\
532 type SECONDARY_META_SURFACE_TMZ_C;\
533 type PRIMARY_SURFACE_DCC_EN;\
534 type PRIMARY_SURFACE_DCC_IND_64B_BLK;\
535 type SECONDARY_SURFACE_DCC_EN;\
536 type SECONDARY_SURFACE_DCC_IND_64B_BLK;\
537 type SURFACE_FLIP_INT_MASK;\
538 type DET_BUF_PLANE1_BASE_ADDRESS;\
539 type CROSSBAR_SRC_CB_B;\
540 type CROSSBAR_SRC_CR_R;\
541 type DRQ_EXPANSION_MODE;\
542 type PRQ_EXPANSION_MODE;\
543 type MRQ_EXPANSION_MODE;\
544 type CRQ_EXPANSION_MODE;\
545 type CHUNK_SIZE;\
546 type MIN_CHUNK_SIZE;\
547 type META_CHUNK_SIZE;\
548 type MIN_META_CHUNK_SIZE;\
549 type DPTE_GROUP_SIZE;\
550 type MPTE_GROUP_SIZE;\
551 type SWATH_HEIGHT;\
552 type PTE_ROW_HEIGHT_LINEAR;\
553 type CHUNK_SIZE_C;\
554 type MIN_CHUNK_SIZE_C;\
555 type META_CHUNK_SIZE_C;\
556 type MIN_META_CHUNK_SIZE_C;\
557 type DPTE_GROUP_SIZE_C;\
558 type MPTE_GROUP_SIZE_C;\
559 type SWATH_HEIGHT_C;\
560 type PTE_ROW_HEIGHT_LINEAR_C;\
561 type REFCYC_H_BLANK_END;\
562 type DLG_V_BLANK_END;\
563 type MIN_DST_Y_NEXT_START;\
564 type REFCYC_PER_HTOTAL;\
565 type REFCYC_X_AFTER_SCALER;\
566 type DST_Y_AFTER_SCALER;\
567 type DST_Y_PREFETCH;\
568 type VRATIO_PREFETCH;\
569 type DST_Y_PER_VM_VBLANK;\
570 type DST_Y_PER_ROW_VBLANK;\
571 type REF_FREQ_TO_PIX_FREQ;\
572 type REFCYC_PER_PTE_GROUP_VBLANK_L;\
573 type REFCYC_PER_META_CHUNK_VBLANK_L;\
574 type DST_Y_PER_PTE_ROW_NOM_L;\
575 type REFCYC_PER_PTE_GROUP_NOM_L;\
576 type DST_Y_PER_META_ROW_NOM_L;\
577 type REFCYC_PER_META_CHUNK_NOM_L;\
578 type REFCYC_PER_LINE_DELIVERY_PRE_L;\
579 type REFCYC_PER_LINE_DELIVERY_PRE_C;\
580 type REFCYC_PER_LINE_DELIVERY_L;\
581 type REFCYC_PER_LINE_DELIVERY_C;\
582 type VRATIO_PREFETCH_C;\
583 type REFCYC_PER_PTE_GROUP_VBLANK_C;\
584 type REFCYC_PER_META_CHUNK_VBLANK_C;\
585 type DST_Y_PER_PTE_ROW_NOM_C;\
586 type REFCYC_PER_PTE_GROUP_NOM_C;\
587 type DST_Y_PER_META_ROW_NOM_C;\
588 type REFCYC_PER_META_CHUNK_NOM_C;\
589 type QoS_LEVEL_LOW_WM;\
590 type QoS_LEVEL_HIGH_WM;\
591 type MIN_TTU_VBLANK;\
592 type QoS_LEVEL_FLIP;\
593 type REFCYC_PER_REQ_DELIVERY;\
594 type QoS_LEVEL_FIXED;\
595 type QoS_RAMP_DISABLE;\
596 type REFCYC_PER_REQ_DELIVERY_PRE;\
597 type VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB;\
598 type VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB;\
599 type VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB;\
600 type VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB;\
601 type VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB;\
602 type VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB;\
603 type VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB;\
604 type VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_SYSTEM;\
605 type VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB;\
606 type ENABLE_L1_TLB;\
607 type SYSTEM_ACCESS_MODE;\
608 type HUBP_CLOCK_ENABLE;\
609 type MC_VM_SYSTEM_APERTURE_DEFAULT_SYSTEM;\
610 type MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB;\
611 type MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB;\
612 type MC_VM_SYSTEM_APERTURE_LOW_ADDR_MSB;\
613 type MC_VM_SYSTEM_APERTURE_LOW_ADDR_LSB;\
614 type MC_VM_SYSTEM_APERTURE_HIGH_ADDR_MSB;\
615 type MC_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB;\
616 type MC_VM_SYSTEM_APERTURE_LOW_ADDR;\
617 type MC_VM_SYSTEM_APERTURE_HIGH_ADDR;\
618 type DCN_VM_SYSTEM_APERTURE_DEFAULT_SYSTEM;\
619 type DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB;\
620 type DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB;\
621 \
622 type PAGE_DIRECTORY_ENTRY_HI32;\
623 type PAGE_DIRECTORY_ENTRY_LO32;\
624 type LOGICAL_PAGE_NUMBER_HI4;\
625 type LOGICAL_PAGE_NUMBER_LO32;\
626 type PHYSICAL_PAGE_ADDR_HI4;\
627 type PHYSICAL_PAGE_ADDR_LO32;\
628 type PHYSICAL_PAGE_NUMBER_MSB;\
629 type PHYSICAL_PAGE_NUMBER_LSB;\
630 type LOGICAL_ADDR;\
631 type CURSOR0_DST_Y_OFFSET; \
632 type CURSOR0_CHUNK_HDL_ADJUST; \
633 type CURSOR_SURFACE_ADDRESS_HIGH; \
634 type CURSOR_SURFACE_ADDRESS; \
635 type CURSOR_WIDTH; \
636 type CURSOR_HEIGHT; \
637 type CURSOR_MODE; \
638 type CURSOR_2X_MAGNIFY; \
639 type CURSOR_PITCH; \
640 type CURSOR_LINES_PER_CHUNK; \
641 type CURSOR_ENABLE; \
642 type CURSOR_X_POSITION; \
643 type CURSOR_Y_POSITION; \
644 type CURSOR_HOT_SPOT_X; \
645 type CURSOR_HOT_SPOT_Y; \
646 type CURSOR_DST_X_OFFSET; \
647 type OUTPUT_FP
648
649#define DCN_HUBP_REG_FIELD_LIST(type) \
650 DCN_HUBP_REG_FIELD_BASE_LIST(type);\
651 type ALPHA_PLANE_EN
652
653struct dcn_mi_registers {
654 HUBP_COMMON_REG_VARIABLE_LIST;
655};
656
657struct dcn_mi_shift {
658 DCN_HUBP_REG_FIELD_LIST(uint8_t);
659};
660
661struct dcn_mi_mask {
662 DCN_HUBP_REG_FIELD_LIST(uint32_t);
663};
664
665struct dcn_hubp_state {
666 struct _vcs_dpi_display_dlg_regs_st dlg_attr;
667 struct _vcs_dpi_display_ttu_regs_st ttu_attr;
668 struct _vcs_dpi_display_rq_regs_st rq_regs;
669 uint32_t pixel_format;
670 uint32_t inuse_addr_hi;
671 uint32_t inuse_addr_lo;
672 uint32_t viewport_width;
673 uint32_t viewport_height;
674 uint32_t rotation_angle;
675 uint32_t h_mirror_en;
676 uint32_t sw_mode;
677 uint32_t dcc_en;
678 uint32_t blank_en;
679 uint32_t clock_en;
680 uint32_t underflow_status;
681 uint32_t ttu_disable;
682 uint32_t min_ttu_vblank;
683 uint32_t qos_level_low_wm;
684 uint32_t qos_level_high_wm;
685 uint32_t primary_surface_addr_lo;
686 uint32_t primary_surface_addr_hi;
687 uint32_t primary_meta_addr_lo;
688 uint32_t primary_meta_addr_hi;
689};
690
691struct dcn10_hubp {
692 struct hubp base;
693 struct dcn_hubp_state state;
694 const struct dcn_mi_registers *hubp_regs;
695 const struct dcn_mi_shift *hubp_shift;
696 const struct dcn_mi_mask *hubp_mask;
697};
698
699void hubp1_program_surface_config(
700 struct hubp *hubp,
701 enum surface_pixel_format format,
702 union dc_tiling_info *tiling_info,
703 struct plane_size *plane_size,
704 enum dc_rotation_angle rotation,
705 struct dc_plane_dcc_param *dcc,
706 bool horizontal_mirror,
707 unsigned int compat_level);
708
709void hubp1_program_deadline(
710 struct hubp *hubp,
711 struct _vcs_dpi_display_dlg_regs_st *dlg_attr,
712 struct _vcs_dpi_display_ttu_regs_st *ttu_attr);
713
714void hubp1_program_requestor(
715 struct hubp *hubp,
716 struct _vcs_dpi_display_rq_regs_st *rq_regs);
717
718void hubp1_program_pixel_format(
719 struct hubp *hubp,
720 enum surface_pixel_format format);
721
722void hubp1_program_size(
723 struct hubp *hubp,
724 enum surface_pixel_format format,
725 const struct plane_size *plane_size,
726 struct dc_plane_dcc_param *dcc);
727
728void hubp1_program_rotation(
729 struct hubp *hubp,
730 enum dc_rotation_angle rotation,
731 bool horizontal_mirror);
732
733void hubp1_program_tiling(
734 struct hubp *hubp,
735 const union dc_tiling_info *info,
736 const enum surface_pixel_format pixel_format);
737
738void hubp1_dcc_control(struct hubp *hubp,
739 bool enable,
740 enum hubp_ind_block_size independent_64b_blks);
741
742bool hubp1_program_surface_flip_and_addr(
743 struct hubp *hubp,
744 const struct dc_plane_address *address,
745 bool flip_immediate);
746
747bool hubp1_is_flip_pending(struct hubp *hubp);
748
749void hubp1_cursor_set_attributes(
750 struct hubp *hubp,
751 const struct dc_cursor_attributes *attr);
752
753void hubp1_cursor_set_position(
754 struct hubp *hubp,
755 const struct dc_cursor_position *pos,
756 const struct dc_cursor_mi_param *param);
757
758void hubp1_set_blank(struct hubp *hubp, bool blank);
759
760void min_set_viewport(struct hubp *hubp,
761 const struct rect *viewport,
762 const struct rect *viewport_c);
763
764void hubp1_clk_cntl(struct hubp *hubp, bool enable);
765void hubp1_vtg_sel(struct hubp *hubp, uint32_t otg_inst);
766
767void dcn10_hubp_construct(
768 struct dcn10_hubp *hubp1,
769 struct dc_context *ctx,
770 uint32_t inst,
771 const struct dcn_mi_registers *hubp_regs,
772 const struct dcn_mi_shift *hubp_shift,
773 const struct dcn_mi_mask *hubp_mask);
774
775void hubp1_read_state(struct hubp *hubp);
776void hubp1_clear_underflow(struct hubp *hubp);
777
778enum cursor_pitch hubp1_get_cursor_pitch(unsigned int pitch);
779
780void hubp1_vready_workaround(struct hubp *hubp,
781 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
782
783void hubp1_init(struct hubp *hubp);
784void hubp1_read_state_common(struct hubp *hubp);
785bool hubp1_in_blank(struct hubp *hubp);
786void hubp1_soft_reset(struct hubp *hubp, bool reset);
787
788void hubp1_set_flip_int(struct hubp *hubp);
789
790#endif
791
