LXR linux/drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory

   1/*
   2 * Copyright 2013-15 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#include "dm_services.h"
  27
  28#include "include/gpio_types.h"
  29#include "../hw_factory.h"
  30
  31#include "../hw_gpio.h"
  32#include "../hw_ddc.h"
  33#include "../hw_hpd.h"
  34#include "../hw_generic.h"
  35
  36#include "hw_factory_dce110.h"
  37
  38#include "dce/dce_11_0_d.h"
  39#include "dce/dce_11_0_sh_mask.h"
  40
  41/* set field name */
  42#define SF_HPD(reg_name, field_name, post_fix)\
  43        .field_name = reg_name ## __ ## field_name ## post_fix
  44
  45#define REG(reg_name)\
  46                mm ## reg_name
  47
  48#define REGI(reg_name, block, id)\
  49        mm ## block ## id ## _ ## reg_name
  50
  51#include "reg_helper.h"
  52#include "../hpd_regs.h"
  53
  54#define hpd_regs(id) \
  55{\
  56        HPD_REG_LIST(id)\
  57}
  58
  59static const struct hpd_registers hpd_regs[] = {
  60        hpd_regs(0),
  61        hpd_regs(1),
  62        hpd_regs(2),
  63        hpd_regs(3),
  64        hpd_regs(4),
  65        hpd_regs(5)
  66};
  67
  68static const struct hpd_sh_mask hpd_shift = {
  69                HPD_MASK_SH_LIST(__SHIFT)
  70};
  71
  72static const struct hpd_sh_mask hpd_mask = {
  73                HPD_MASK_SH_LIST(_MASK)
  74};
  75
  76#include "../ddc_regs.h"
  77
  78 /* set field name */
  79#define SF_DDC(reg_name, field_name, post_fix)\
  80        .field_name = reg_name ## __ ## field_name ## post_fix
  81
  82static const struct ddc_registers ddc_data_regs[] = {
  83        ddc_data_regs(1),
  84        ddc_data_regs(2),
  85        ddc_data_regs(3),
  86        ddc_data_regs(4),
  87        ddc_data_regs(5),
  88        ddc_data_regs(6),
  89        ddc_vga_data_regs,
  90        ddc_i2c_data_regs
  91};
  92
  93static const struct ddc_registers ddc_clk_regs[] = {
  94        ddc_clk_regs(1),
  95        ddc_clk_regs(2),
  96        ddc_clk_regs(3),
  97        ddc_clk_regs(4),
  98        ddc_clk_regs(5),
  99        ddc_clk_regs(6),
 100        ddc_vga_clk_regs,
 101        ddc_i2c_clk_regs
 102};
 103
 104static const struct ddc_sh_mask ddc_shift = {
 105                DDC_MASK_SH_LIST(__SHIFT)
 106};
 107
 108static const struct ddc_sh_mask ddc_mask = {
 109                DDC_MASK_SH_LIST(_MASK)
 110};
 111
 112static void define_ddc_registers(
 113                struct hw_gpio_pin *pin,
 114                uint32_t en)
 115{
 116        struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin);
 117
 118        switch (pin->id) {
 119        case GPIO_ID_DDC_DATA:
 120                ddc->regs = &ddc_data_regs[en];
 121                ddc->base.regs = &ddc_data_regs[en].gpio;
 122                break;
 123        case GPIO_ID_DDC_CLOCK:
 124                ddc->regs = &ddc_clk_regs[en];
 125                ddc->base.regs = &ddc_clk_regs[en].gpio;
 126                break;
 127        default:
 128                ASSERT_CRITICAL(false);
 129                return;
 130        }
 131
 132        ddc->shifts = &ddc_shift;
 133        ddc->masks = &ddc_mask;
 134
 135}
 136
 137static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en)
 138{
 139        struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin);
 140
 141        hpd->regs = &hpd_regs[en];
 142        hpd->shifts = &hpd_shift;
 143        hpd->masks = &hpd_mask;
 144        hpd->base.regs = &hpd_regs[en].gpio;
 145}
 146
 147static const struct hw_factory_funcs funcs = {
 148        .init_ddc_data = dal_hw_ddc_init,
 149        .init_generic = NULL,
 150        .init_hpd = dal_hw_hpd_init,
 151        .get_ddc_pin = dal_hw_ddc_get_pin,
 152        .get_hpd_pin = dal_hw_hpd_get_pin,
 153        .get_generic_pin = NULL,
 154        .define_hpd_registers = define_hpd_registers,
 155        .define_ddc_registers = define_ddc_registers
 156};
 157
 158/*
 159 * dal_hw_factory_dce110_init
 160 *
 161 * @brief
 162 * Initialize HW factory function pointers and pin info
 163 *
 164 * @param
 165 * struct hw_factory *factory - [out] struct of function pointers
 166 */
 167void dal_hw_factory_dce110_init(struct hw_factory *factory)
 168{
 169        /*TODO check ASIC CAPs*/
 170        factory->number_of_pins[GPIO_ID_DDC_DATA] = 8;
 171        factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 8;
 172        factory->number_of_pins[GPIO_ID_GENERIC] = 7;
 173        factory->number_of_pins[GPIO_ID_HPD] = 6;
 174        factory->number_of_pins[GPIO_ID_GPIO_PAD] = 31;
 175        factory->number_of_pins[GPIO_ID_VIP_PAD] = 0;
 176        factory->number_of_pins[GPIO_ID_SYNC] = 2;
 177        factory->number_of_pins[GPIO_ID_GSL] = 4;
 178
 179        factory->funcs = &funcs;
 180}
 181