linux/drivers/gpu/drm/amd/display/include/audio_types.h
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   1/*
   2 * Copyright 2012-15 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#ifndef __AUDIO_TYPES_H__
  27#define __AUDIO_TYPES_H__
  28
  29#include "signal_types.h"
  30
  31#define AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS 20
  32#define MAX_HW_AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS 18
  33#define MULTI_CHANNEL_SPLIT_NO_ASSO_INFO 0xFFFFFFFF
  34
  35
  36struct audio_crtc_info {
  37        uint32_t h_total;
  38        uint32_t h_active;
  39        uint32_t v_active;
  40        uint32_t pixel_repetition;
  41        uint32_t requested_pixel_clock_100Hz; /* in 100Hz */
  42        uint32_t calculated_pixel_clock_100Hz; /* in 100Hz */
  43        uint32_t refresh_rate;
  44        enum dc_color_depth color_depth;
  45        bool interlaced;
  46};
  47struct azalia_clock_info {
  48        uint32_t pixel_clock_in_10khz;
  49        uint32_t audio_dto_phase;
  50        uint32_t audio_dto_module;
  51        uint32_t audio_dto_wall_clock_ratio;
  52};
  53
  54enum audio_dto_source {
  55        DTO_SOURCE_UNKNOWN = 0,
  56        DTO_SOURCE_ID0,
  57        DTO_SOURCE_ID1,
  58        DTO_SOURCE_ID2,
  59        DTO_SOURCE_ID3,
  60        DTO_SOURCE_ID4,
  61        DTO_SOURCE_ID5
  62};
  63
  64/* PLL information required for AZALIA DTO calculation */
  65
  66struct audio_pll_info {
  67        uint32_t dp_dto_source_clock_in_khz;
  68        uint32_t feed_back_divider;
  69        enum audio_dto_source dto_source;
  70        bool ss_enabled;
  71        uint32_t ss_percentage;
  72        uint32_t ss_percentage_divider;
  73};
  74
  75struct audio_channel_associate_info {
  76        union {
  77                struct {
  78                        uint32_t ALL_CHANNEL_FL:4;
  79                        uint32_t ALL_CHANNEL_FR:4;
  80                        uint32_t ALL_CHANNEL_FC:4;
  81                        uint32_t ALL_CHANNEL_Sub:4;
  82                        uint32_t ALL_CHANNEL_SL:4;
  83                        uint32_t ALL_CHANNEL_SR:4;
  84                        uint32_t ALL_CHANNEL_BL:4;
  85                        uint32_t ALL_CHANNEL_BR:4;
  86                } bits;
  87                uint32_t u32all;
  88        };
  89};
  90
  91struct audio_output {
  92        /* Front DIG id. */
  93        enum engine_id engine_id;
  94        /* encoder output signal */
  95        enum signal_type signal;
  96        /* video timing */
  97        struct audio_crtc_info crtc_info;
  98        /* PLL for audio */
  99        struct audio_pll_info pll_info;
 100};
 101
 102enum audio_payload {
 103        CHANNEL_SPLIT_MAPPINGCHANG = 0x9,
 104};
 105
 106#endif /* __AUDIO_TYPES_H__ */
 107