LXR linux/drivers/gpu/drm/amd/display/include/gpio

   1/*
   2 * Copyright 2012-15 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#ifndef __DAL_GPIO_TYPES_H__
  27#define __DAL_GPIO_TYPES_H__
  28
  29#define BUNDLE_A_MASK 0x00FFF000L
  30#define BUNDLE_B_MASK 0x00000FFFL
  31
  32/*
  33 * gpio_result
  34 *
  35 * @brief
  36 * The possible return codes that the GPIO object can return.
  37 * These return codes can be generated
  38 * directly by the GPIO object or from the GPIOPin object.
  39 */
  40enum gpio_result {
  41        GPIO_RESULT_OK,
  42        GPIO_RESULT_NULL_HANDLE,
  43        GPIO_RESULT_INVALID_DATA,
  44        GPIO_RESULT_DEVICE_BUSY,
  45        GPIO_RESULT_OPEN_FAILED,
  46        GPIO_RESULT_ALREADY_OPENED,
  47        GPIO_RESULT_NON_SPECIFIC_ERROR
  48};
  49
  50/*
  51 * @brief
  52 * Used to identify the specific GPIO device
  53 *
  54 * @notes
  55 * These constants are used as indices in a vector.
  56 * Thus they should start from zero and be contiguous.
  57 */
  58enum gpio_id {
  59        GPIO_ID_UNKNOWN = (-1),
  60        GPIO_ID_DDC_DATA,
  61        GPIO_ID_DDC_CLOCK,
  62        GPIO_ID_GENERIC,
  63        GPIO_ID_HPD,
  64        GPIO_ID_GPIO_PAD,
  65        GPIO_ID_VIP_PAD,
  66        GPIO_ID_SYNC,
  67        GPIO_ID_GSL, /* global swap lock */
  68        GPIO_ID_COUNT,
  69        GPIO_ID_MIN = GPIO_ID_DDC_DATA,
  70        GPIO_ID_MAX = GPIO_ID_GSL
  71};
  72
  73#define GPIO_ENUM_UNKNOWN \
  74        32
  75
  76struct gpio_pin_info {
  77        uint32_t offset;
  78        uint32_t offset_y;
  79        uint32_t offset_en;
  80        uint32_t offset_mask;
  81
  82        uint32_t mask;
  83        uint32_t mask_y;
  84        uint32_t mask_en;
  85        uint32_t mask_mask;
  86};
  87
  88enum gpio_pin_output_state {
  89        GPIO_PIN_OUTPUT_STATE_ACTIVE_LOW,
  90        GPIO_PIN_OUTPUT_STATE_ACTIVE_HIGH,
  91        GPIO_PIN_OUTPUT_STATE_DEFAULT = GPIO_PIN_OUTPUT_STATE_ACTIVE_LOW
  92};
  93
  94enum gpio_generic {
  95        GPIO_GENERIC_UNKNOWN = (-1),
  96        GPIO_GENERIC_A,
  97        GPIO_GENERIC_B,
  98        GPIO_GENERIC_C,
  99        GPIO_GENERIC_D,
 100        GPIO_GENERIC_E,
 101        GPIO_GENERIC_F,
 102        GPIO_GENERIC_G,
 103        GPIO_GENERIC_COUNT,
 104        GPIO_GENERIC_MIN = GPIO_GENERIC_A,
 105        GPIO_GENERIC_MAX = GPIO_GENERIC_B
 106};
 107
 108enum gpio_hpd {
 109        GPIO_HPD_UNKNOWN = (-1),
 110        GPIO_HPD_1,
 111        GPIO_HPD_2,
 112        GPIO_HPD_3,
 113        GPIO_HPD_4,
 114        GPIO_HPD_5,
 115        GPIO_HPD_6,
 116        GPIO_HPD_COUNT,
 117        GPIO_HPD_MIN = GPIO_HPD_1,
 118        GPIO_HPD_MAX = GPIO_HPD_6
 119};
 120
 121enum gpio_gpio_pad {
 122        GPIO_GPIO_PAD_UNKNOWN = (-1),
 123        GPIO_GPIO_PAD_0,
 124        GPIO_GPIO_PAD_1,
 125        GPIO_GPIO_PAD_2,
 126        GPIO_GPIO_PAD_3,
 127        GPIO_GPIO_PAD_4,
 128        GPIO_GPIO_PAD_5,
 129        GPIO_GPIO_PAD_6,
 130        GPIO_GPIO_PAD_7,
 131        GPIO_GPIO_PAD_8,
 132        GPIO_GPIO_PAD_9,
 133        GPIO_GPIO_PAD_10,
 134        GPIO_GPIO_PAD_11,
 135        GPIO_GPIO_PAD_12,
 136        GPIO_GPIO_PAD_13,
 137        GPIO_GPIO_PAD_14,
 138        GPIO_GPIO_PAD_15,
 139        GPIO_GPIO_PAD_16,
 140        GPIO_GPIO_PAD_17,
 141        GPIO_GPIO_PAD_18,
 142        GPIO_GPIO_PAD_19,
 143        GPIO_GPIO_PAD_20,
 144        GPIO_GPIO_PAD_21,
 145        GPIO_GPIO_PAD_22,
 146        GPIO_GPIO_PAD_23,
 147        GPIO_GPIO_PAD_24,
 148        GPIO_GPIO_PAD_25,
 149        GPIO_GPIO_PAD_26,
 150        GPIO_GPIO_PAD_27,
 151        GPIO_GPIO_PAD_28,
 152        GPIO_GPIO_PAD_29,
 153        GPIO_GPIO_PAD_30,
 154        GPIO_GPIO_PAD_COUNT,
 155        GPIO_GPIO_PAD_MIN = GPIO_GPIO_PAD_0,
 156        GPIO_GPIO_PAD_MAX = GPIO_GPIO_PAD_30
 157};
 158
 159enum gpio_vip_pad {
 160        GPIO_VIP_PAD_UNKNOWN = (-1),
 161        /* following never used -
 162         * GPIO_ID_DDC_CLOCK::GPIO_DDC_LINE_VIP_PAD defined instead */
 163        GPIO_VIP_PAD_SCL,
 164        /* following never used -
 165         * GPIO_ID_DDC_DATA::GPIO_DDC_LINE_VIP_PAD defined instead */
 166        GPIO_VIP_PAD_SDA,
 167        GPIO_VIP_PAD_VHAD,
 168        GPIO_VIP_PAD_VPHCTL,
 169        GPIO_VIP_PAD_VIPCLK,
 170        GPIO_VIP_PAD_VID,
 171        GPIO_VIP_PAD_VPCLK0,
 172        GPIO_VIP_PAD_DVALID,
 173        GPIO_VIP_PAD_PSYNC,
 174        GPIO_VIP_PAD_COUNT,
 175        GPIO_VIP_PAD_MIN = GPIO_VIP_PAD_SCL,
 176        GPIO_VIP_PAD_MAX = GPIO_VIP_PAD_PSYNC
 177};
 178
 179enum gpio_sync {
 180        GPIO_SYNC_UNKNOWN = (-1),
 181        GPIO_SYNC_HSYNC_A,
 182        GPIO_SYNC_VSYNC_A,
 183        GPIO_SYNC_HSYNC_B,
 184        GPIO_SYNC_VSYNC_B,
 185        GPIO_SYNC_COUNT,
 186        GPIO_SYNC_MIN = GPIO_SYNC_HSYNC_A,
 187        GPIO_SYNC_MAX = GPIO_SYNC_VSYNC_B
 188};
 189
 190enum gpio_gsl {
 191        GPIO_GSL_UNKNOWN = (-1),
 192        GPIO_GSL_GENLOCK_CLOCK,
 193        GPIO_GSL_GENLOCK_VSYNC,
 194        GPIO_GSL_SWAPLOCK_A,
 195        GPIO_GSL_SWAPLOCK_B,
 196        GPIO_GSL_COUNT,
 197        GPIO_GSL_MIN = GPIO_GSL_GENLOCK_CLOCK,
 198        GPIO_GSL_MAX = GPIO_GSL_SWAPLOCK_B
 199};
 200
 201/*
 202 * @brief
 203 * Unique Id for DDC handle.
 204 * Values are meaningful (used as indexes to array)
 205 */
 206enum gpio_ddc_line {
 207        GPIO_DDC_LINE_UNKNOWN = (-1),
 208        GPIO_DDC_LINE_DDC1,
 209        GPIO_DDC_LINE_DDC2,
 210        GPIO_DDC_LINE_DDC3,
 211        GPIO_DDC_LINE_DDC4,
 212        GPIO_DDC_LINE_DDC5,
 213        GPIO_DDC_LINE_DDC6,
 214        GPIO_DDC_LINE_DDC_VGA,
 215        GPIO_DDC_LINE_VIP_PAD,
 216        GPIO_DDC_LINE_I2C_PAD = GPIO_DDC_LINE_VIP_PAD,
 217        GPIO_DDC_LINE_COUNT,
 218        GPIO_DDC_LINE_MIN = GPIO_DDC_LINE_DDC1,
 219        GPIO_DDC_LINE_MAX = GPIO_DDC_LINE_I2C_PAD
 220};
 221
 222/*
 223 * @brief
 224 * Identifies the mode of operation to open a GPIO device.
 225 * A GPIO device (pin) can be programmed in only one of these modes at a time.
 226 */
 227enum gpio_mode {
 228        GPIO_MODE_UNKNOWN = (-1),
 229        GPIO_MODE_INPUT,
 230        GPIO_MODE_OUTPUT,
 231        GPIO_MODE_FAST_OUTPUT,
 232        GPIO_MODE_HARDWARE,
 233        GPIO_MODE_INTERRUPT
 234};
 235
 236/*
 237 * @brief
 238 * Identifies the source of the signal when GPIO is in HW mode.
 239 * get_signal_source() will return GPIO_SYGNAL_SOURCE__UNKNOWN
 240 * when one of the following holds:
 241 *    1. GPIO is input GPIO
 242 *    2. GPIO is not opened in HW mode
 243 *    3. GPIO does not have fixed signal source
 244 *    (like DC_GenericA have mux instead fixed)
 245 */
 246enum gpio_signal_source {
 247        GPIO_SIGNAL_SOURCE_UNKNOWN = (-1),
 248        GPIO_SIGNAL_SOURCE_DACA_STEREO_SYNC,
 249        GPIO_SIGNAL_SOURCE_PASS_THROUGH_STEREO_SYNC,
 250        GPIO_SIGNAL_SOURCE_DACB_STEREO_SYNC,
 251        GPIO_SIGNAL_SOURCE_DACA_HSYNC,
 252        GPIO_SIGNAL_SOURCE_DACB_HSYNC,
 253        GPIO_SIGNAL_SOURCE_DACA_VSYNC,
 254        GPIO_SIGNAL_SOURCE_DACB_VSYNC,
 255};
 256
 257enum gpio_stereo_source {
 258        GPIO_STEREO_SOURCE_UNKNOWN = (-1),
 259        GPIO_STEREO_SOURCE_D1,
 260        GPIO_STEREO_SOURCE_D2,
 261        GPIO_STEREO_SOURCE_D3,
 262        GPIO_STEREO_SOURCE_D4,
 263        GPIO_STEREO_SOURCE_D5,
 264        GPIO_STEREO_SOURCE_D6
 265};
 266
 267/*
 268 * GPIO config
 269 */
 270
 271enum gpio_config_type {
 272        GPIO_CONFIG_TYPE_NONE,
 273        GPIO_CONFIG_TYPE_DDC,
 274        GPIO_CONFIG_TYPE_HPD,
 275        GPIO_CONFIG_TYPE_GENERIC_MUX,
 276        GPIO_CONFIG_TYPE_GSL_MUX,
 277        GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE
 278};
 279
 280/* DDC configuration */
 281
 282enum gpio_ddc_config_type {
 283        GPIO_DDC_CONFIG_TYPE_MODE_AUX,
 284        GPIO_DDC_CONFIG_TYPE_MODE_I2C,
 285        GPIO_DDC_CONFIG_TYPE_POLL_FOR_CONNECT,
 286        GPIO_DDC_CONFIG_TYPE_POLL_FOR_DISCONNECT,
 287        GPIO_DDC_CONFIG_TYPE_DISABLE_POLLING
 288};
 289
 290struct gpio_ddc_config {
 291        enum gpio_ddc_config_type type;
 292        bool data_en_bit_present;
 293        bool clock_en_bit_present;
 294};
 295
 296/* HPD configuration */
 297
 298struct gpio_hpd_config {
 299        uint32_t delay_on_connect; /* milliseconds */
 300        uint32_t delay_on_disconnect; /* milliseconds */
 301};
 302
 303struct gpio_generic_mux_config {
 304        bool enable_output_from_mux;
 305        enum gpio_signal_source mux_select;
 306        enum gpio_stereo_source stereo_select;
 307};
 308
 309enum gpio_gsl_mux_config_type {
 310        GPIO_GSL_MUX_CONFIG_TYPE_DISABLE,
 311        GPIO_GSL_MUX_CONFIG_TYPE_TIMING_SYNC,
 312        GPIO_GSL_MUX_CONFIG_TYPE_FLIP_SYNC
 313};
 314
 315struct gpio_gsl_mux_config {
 316        enum gpio_gsl_mux_config_type type;
 317        /* Actually sync_source type,
 318         * however we want to avoid inter-component includes here */
 319        uint32_t gsl_group;
 320};
 321
 322struct gpio_config_data {
 323        enum gpio_config_type type;
 324        union {
 325                struct gpio_ddc_config ddc;
 326                struct gpio_hpd_config hpd;
 327                struct gpio_generic_mux_config generic_mux;
 328                struct gpio_gsl_mux_config gsl_mux;
 329        } config;
 330};
 331
 332#endif
 333