/*
 * Copyright (C) 2019  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#ifndef _dcn_2_0_0_OFFSET_HEADER
#define _dcn_2_0_0_OFFSET_HEADER



// addressBlock: dce_dc_mmhubbub_vga_dispdec
// base address: 0x0
#define mmVGA_MEM_WRITE_PAGE_ADDR                                                                      0x0000
#define mmVGA_MEM_WRITE_PAGE_ADDR_BASE_IDX                                                             0
#define mmVGA_MEM_READ_PAGE_ADDR                                                                       0x0001
#define mmVGA_MEM_READ_PAGE_ADDR_BASE_IDX                                                              0
#define mmVGA_RENDER_CONTROL                                                                           0x0000
#define mmVGA_RENDER_CONTROL_BASE_IDX                                                                  1
#define mmVGA_SEQUENCER_RESET_CONTROL                                                                  0x0001
#define mmVGA_SEQUENCER_RESET_CONTROL_BASE_IDX                                                         1
#define mmVGA_MODE_CONTROL                                                                             0x0002
#define mmVGA_MODE_CONTROL_BASE_IDX                                                                    1
#define mmVGA_SURFACE_PITCH_SELECT                                                                     0x0003
#define mmVGA_SURFACE_PITCH_SELECT_BASE_IDX                                                            1
#define mmVGA_MEMORY_BASE_ADDRESS                                                                      0x0004
#define mmVGA_MEMORY_BASE_ADDRESS_BASE_IDX                                                             1
#define mmVGA_DISPBUF1_SURFACE_ADDR                                                                    0x0006
#define mmVGA_DISPBUF1_SURFACE_ADDR_BASE_IDX                                                           1
#define mmVGA_DISPBUF2_SURFACE_ADDR                                                                    0x0008
#define mmVGA_DISPBUF2_SURFACE_ADDR_BASE_IDX                                                           1
#define mmVGA_MEMORY_BASE_ADDRESS_HIGH                                                                 0x0009
#define mmVGA_MEMORY_BASE_ADDRESS_HIGH_BASE_IDX                                                        1
#define mmVGA_HDP_CONTROL                                                                              0x000a
#define mmVGA_HDP_CONTROL_BASE_IDX                                                                     1
#define mmVGA_CACHE_CONTROL                                                                            0x000b
#define mmVGA_CACHE_CONTROL_BASE_IDX                                                                   1
#define mmD1VGA_CONTROL                                                                                0x000c
#define mmD1VGA_CONTROL_BASE_IDX                                                                       1
#define mmD2VGA_CONTROL                                                                                0x000e
#define mmD2VGA_CONTROL_BASE_IDX                                                                       1
#define mmVGA_STATUS                                                                                   0x0010
#define mmVGA_STATUS_BASE_IDX                                                                          1
#define mmVGA_INTERRUPT_CONTROL                                                                        0x0011
#define mmVGA_INTERRUPT_CONTROL_BASE_IDX                                                               1
#define mmVGA_STATUS_CLEAR                                                                             0x0012
#define mmVGA_STATUS_CLEAR_BASE_IDX                                                                    1
#define mmVGA_INTERRUPT_STATUS                                                                         0x0013
#define mmVGA_INTERRUPT_STATUS_BASE_IDX                                                                1
#define mmVGA_MAIN_CONTROL                                                                             0x0014
#define mmVGA_MAIN_CONTROL_BASE_IDX                                                                    1
#define mmVGA_TEST_CONTROL                                                                             0x0015
#define mmVGA_TEST_CONTROL_BASE_IDX                                                                    1
#define mmVGA_QOS_CTRL                                                                                 0x0018
#define mmVGA_QOS_CTRL_BASE_IDX                                                                        1
#define mmCRTC8_IDX                                                                                    0x002d
#define mmCRTC8_IDX_BASE_IDX                                                                           1
#define mmCRTC8_DATA                                                                                   0x002d
#define mmCRTC8_DATA_BASE_IDX                                                                          1
#define mmGENFC_WT                                                                                     0x002e
#define mmGENFC_WT_BASE_IDX                                                                            1
#define mmGENS1                                                                                        0x002e
#define mmGENS1_BASE_IDX                                                                               1
#define mmATTRDW                                                                                       0x0030
#define mmATTRDW_BASE_IDX                                                                              1
#define mmATTRX                                                                                        0x0030
#define mmATTRX_BASE_IDX                                                                               1
#define mmATTRDR                                                                                       0x0030
#define mmATTRDR_BASE_IDX                                                                              1
#define mmGENMO_WT                                                                                     0x0030
#define mmGENMO_WT_BASE_IDX                                                                            1
#define mmGENS0                                                                                        0x0030
#define mmGENS0_BASE_IDX                                                                               1
#define mmGENENB                                                                                       0x0030
#define mmGENENB_BASE_IDX                                                                              1
#define mmSEQ8_IDX                                                                                     0x0031
#define mmSEQ8_IDX_BASE_IDX                                                                            1
#define mmSEQ8_DATA                                                                                    0x0031
#define mmSEQ8_DATA_BASE_IDX                                                                           1
#define mmDAC_MASK                                                                                     0x0031
#define mmDAC_MASK_BASE_IDX                                                                            1
#define mmDAC_R_INDEX                                                                                  0x0031
#define mmDAC_R_INDEX_BASE_IDX                                                                         1
#define mmDAC_W_INDEX                                                                                  0x0032
#define mmDAC_W_INDEX_BASE_IDX                                                                         1
#define mmDAC_DATA                                                                                     0x0032
#define mmDAC_DATA_BASE_IDX                                                                            1
#define mmGENFC_RD                                                                                     0x0032
#define mmGENFC_RD_BASE_IDX                                                                            1
#define mmGENMO_RD                                                                                     0x0033
#define mmGENMO_RD_BASE_IDX                                                                            1
#define mmGRPH8_IDX                                                                                    0x0033
#define mmGRPH8_IDX_BASE_IDX                                                                           1
#define mmGRPH8_DATA                                                                                   0x0033
#define mmGRPH8_DATA_BASE_IDX                                                                          1
#define mmCRTC8_IDX_1                                                                                  0x0035
#define mmCRTC8_IDX_1_BASE_IDX                                                                         1
#define mmCRTC8_DATA_1                                                                                 0x0035
#define mmCRTC8_DATA_1_BASE_IDX                                                                        1
#define mmGENFC_WT_1                                                                                   0x0036
#define mmGENFC_WT_1_BASE_IDX                                                                          1
#define mmGENS1_1                                                                                      0x0036
#define mmGENS1_1_BASE_IDX                                                                             1
#define mmD3VGA_CONTROL                                                                                0x0038
#define mmD3VGA_CONTROL_BASE_IDX                                                                       1
#define mmD4VGA_CONTROL                                                                                0x0039
#define mmD4VGA_CONTROL_BASE_IDX                                                                       1
#define mmD5VGA_CONTROL                                                                                0x003a
#define mmD5VGA_CONTROL_BASE_IDX                                                                       1
#define mmD6VGA_CONTROL                                                                                0x003b
#define mmD6VGA_CONTROL_BASE_IDX                                                                       1
#define mmVGA_SOURCE_SELECT                                                                            0x003c
#define mmVGA_SOURCE_SELECT_BASE_IDX                                                                   1


// addressBlock: dce_dc_dccg_dccg_dispdec
// base address: 0x0
#define mmPHYPLLA_PIXCLK_RESYNC_CNTL                                                                   0x0040
#define mmPHYPLLA_PIXCLK_RESYNC_CNTL_BASE_IDX                                                          1
#define mmPHYPLLB_PIXCLK_RESYNC_CNTL                                                                   0x0041
#define mmPHYPLLB_PIXCLK_RESYNC_CNTL_BASE_IDX                                                          1
#define mmPHYPLLC_PIXCLK_RESYNC_CNTL                                                                   0x0042
#define mmPHYPLLC_PIXCLK_RESYNC_CNTL_BASE_IDX                                                          1
#define mmPHYPLLD_PIXCLK_RESYNC_CNTL                                                                   0x0043
#define mmPHYPLLD_PIXCLK_RESYNC_CNTL_BASE_IDX                                                          1
#define mmDP_DTO_DBUF_EN                                                                               0x0044
#define mmDP_DTO_DBUF_EN_BASE_IDX                                                                      1
#define mmDSCCLK3_DTO_PARAM                                                                            0x0045
#define mmDSCCLK3_DTO_PARAM_BASE_IDX                                                                   1
#define mmDSCCLK4_DTO_PARAM                                                                            0x0046
#define mmDSCCLK4_DTO_PARAM_BASE_IDX                                                                   1
#define mmDSCCLK5_DTO_PARAM                                                                            0x0047
#define mmDSCCLK5_DTO_PARAM_BASE_IDX                                                                   1
#define mmDPREFCLK_CGTT_BLK_CTRL_REG                                                                   0x0048
#define mmDPREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX                                                          1
#define mmREFCLK_CNTL                                                                                  0x0049
#define mmREFCLK_CNTL_BASE_IDX                                                                         1
#define mmREFCLK_CGTT_BLK_CTRL_REG                                                                     0x004b
#define mmREFCLK_CGTT_BLK_CTRL_REG_BASE_IDX                                                            1
#define mmPHYPLLE_PIXCLK_RESYNC_CNTL                                                                   0x004c
#define mmPHYPLLE_PIXCLK_RESYNC_CNTL_BASE_IDX                                                          1
#define mmDCCG_PERFMON_CNTL2                                                                           0x004e
#define mmDCCG_PERFMON_CNTL2_BASE_IDX                                                                  1
#define mmDCCG_DS_DTO_INCR                                                                             0x0053
#define mmDCCG_DS_DTO_INCR_BASE_IDX                                                                    1
#define mmDCCG_DS_DTO_MODULO                                                                           0x0054
#define mmDCCG_DS_DTO_MODULO_BASE_IDX                                                                  1
#define mmDCCG_DS_CNTL                                                                                 0x0055
#define mmDCCG_DS_CNTL_BASE_IDX                                                                        1
#define mmDCCG_DS_HW_CAL_INTERVAL                                                                      0x0056
#define mmDCCG_DS_HW_CAL_INTERVAL_BASE_IDX                                                             1
#define mmDPREFCLK_CNTL                                                                                0x0058
#define mmDPREFCLK_CNTL_BASE_IDX                                                                       1
#define mmDCE_VERSION                                                                                  0x005e
#define mmDCE_VERSION_BASE_IDX                                                                         1
#define mmDCCG_GTC_CNTL                                                                                0x0060
#define mmDCCG_GTC_CNTL_BASE_IDX                                                                       1
#define mmDCCG_GTC_DTO_INCR                                                                            0x0061
#define mmDCCG_GTC_DTO_INCR_BASE_IDX                                                                   1
#define mmDCCG_GTC_DTO_MODULO                                                                          0x0062
#define mmDCCG_GTC_DTO_MODULO_BASE_IDX                                                                 1
#define mmDCCG_GTC_CURRENT                                                                             0x0063
#define mmDCCG_GTC_CURRENT_BASE_IDX                                                                    1
#define mmDSCCLK0_DTO_PARAM                                                                            0x006c
#define mmDSCCLK0_DTO_PARAM_BASE_IDX                                                                   1
#define mmDSCCLK1_DTO_PARAM                                                                            0x006d
#define mmDSCCLK1_DTO_PARAM_BASE_IDX                                                                   1
#define mmDSCCLK2_DTO_PARAM                                                                            0x006e
#define mmDSCCLK2_DTO_PARAM_BASE_IDX                                                                   1
#define mmMILLISECOND_TIME_BASE_DIV                                                                    0x0070
#define mmMILLISECOND_TIME_BASE_DIV_BASE_IDX                                                           1
#define mmDISPCLK_FREQ_CHANGE_CNTL                                                                     0x0071
#define mmDISPCLK_FREQ_CHANGE_CNTL_BASE_IDX                                                            1
#define mmDC_MEM_GLOBAL_PWR_REQ_CNTL                                                                   0x0072
#define mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX                                                          1
#define mmDCCG_PERFMON_CNTL                                                                            0x0073
#define mmDCCG_PERFMON_CNTL_BASE_IDX                                                                   1
#define mmDCCG_GATE_DISABLE_CNTL                                                                       0x0074
#define mmDCCG_GATE_DISABLE_CNTL_BASE_IDX                                                              1
#define mmDISPCLK_CGTT_BLK_CTRL_REG                                                                    0x0075
#define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX                                                           1
#define mmSOCCLK_CGTT_BLK_CTRL_REG                                                                     0x0076
#define mmSOCCLK_CGTT_BLK_CTRL_REG_BASE_IDX                                                            1
#define mmDCCG_CAC_STATUS                                                                              0x0077
#define mmDCCG_CAC_STATUS_BASE_IDX                                                                     1
#define mmMICROSECOND_TIME_BASE_DIV                                                                    0x007b
#define mmMICROSECOND_TIME_BASE_DIV_BASE_IDX                                                           1
#define mmDCCG_GATE_DISABLE_CNTL2                                                                      0x007c
#define mmDCCG_GATE_DISABLE_CNTL2_BASE_IDX                                                             1
#define mmSYMCLK_CGTT_BLK_CTRL_REG                                                                     0x007d
#define mmSYMCLK_CGTT_BLK_CTRL_REG_BASE_IDX                                                            1
#define mmPHYPLLF_PIXCLK_RESYNC_CNTL                                                                   0x007e
#define mmPHYPLLF_PIXCLK_RESYNC_CNTL_BASE_IDX                                                          1
#define mmDCCG_DISP_CNTL_REG                                                                           0x007f
#define mmDCCG_DISP_CNTL_REG_BASE_IDX                                                                  1
#define mmOTG0_PIXEL_RATE_CNTL                                                                         0x0080
#define mmOTG0_PIXEL_RATE_CNTL_BASE_IDX                                                                1
#define mmDP_DTO0_PHASE                                                                                0x0081
#define mmDP_DTO0_PHASE_BASE_IDX                                                                       1
#define mmDP_DTO0_MODULO                                                                               0x0082
#define mmDP_DTO0_MODULO_BASE_IDX                                                                      1
#define mmOTG0_PHYPLL_PIXEL_RATE_CNTL                                                                  0x0083
#define mmOTG0_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX                                                         1
#define mmOTG1_PIXEL_RATE_CNTL                                                                         0x0084
#define mmOTG1_PIXEL_RATE_CNTL_BASE_IDX                                                                1
#define mmDP_DTO1_PHASE                                                                                0x0085
#define mmDP_DTO1_PHASE_BASE_IDX                                                                       1
#define mmDP_DTO1_MODULO                                                                               0x0086
#define mmDP_DTO1_MODULO_BASE_IDX                                                                      1
#define mmOTG1_PHYPLL_PIXEL_RATE_CNTL                                                                  0x0087
#define mmOTG1_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX                                                         1
#define mmOTG2_PIXEL_RATE_CNTL                                                                         0x0088
#define mmOTG2_PIXEL_RATE_CNTL_BASE_IDX                                                                1
#define mmDP_DTO2_PHASE                                                                                0x0089
#define mmDP_DTO2_PHASE_BASE_IDX                                                                       1
#define mmDP_DTO2_MODULO                                                                               0x008a
#define mmDP_DTO2_MODULO_BASE_IDX                                                                      1
#define mmOTG2_PHYPLL_PIXEL_RATE_CNTL                                                                  0x008b
#define mmOTG2_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX                                                         1
#define mmOTG3_PIXEL_RATE_CNTL                                                                         0x008c
#define mmOTG3_PIXEL_RATE_CNTL_BASE_IDX                                                                1
#define mmDP_DTO3_PHASE                                                                                0x008d
#define mmDP_DTO3_PHASE_BASE_IDX                                                                       1
#define mmDP_DTO3_MODULO                                                                               0x008e
#define mmDP_DTO3_MODULO_BASE_IDX                                                                      1
#define mmOTG3_PHYPLL_PIXEL_RATE_CNTL                                                                  0x008f
#define mmOTG3_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX                                                         1
#define mmOTG4_PIXEL_RATE_CNTL                                                                         0x0090
#define mmOTG4_PIXEL_RATE_CNTL_BASE_IDX                                                                1
#define mmDP_DTO4_PHASE                                                                                0x0091
#define mmDP_DTO4_PHASE_BASE_IDX                                                                       1
#define mmDP_DTO4_MODULO                                                                               0x0092
#define mmDP_DTO4_MODULO_BASE_IDX                                                                      1
#define mmOTG4_PHYPLL_PIXEL_RATE_CNTL                                                                  0x0093
#define mmOTG4_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX                                                         1
#define mmOTG5_PIXEL_RATE_CNTL                                                                         0x0094
#define mmOTG5_PIXEL_RATE_CNTL_BASE_IDX                                                                1
#define mmDP_DTO5_PHASE                                                                                0x0095
#define mmDP_DTO5_PHASE_BASE_IDX                                                                       1
#define mmDP_DTO5_MODULO                                                                               0x0096
#define mmDP_DTO5_MODULO_BASE_IDX                                                                      1
#define mmOTG5_PHYPLL_PIXEL_RATE_CNTL                                                                  0x0097
#define mmOTG5_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX                                                         1
#define mmDPPCLK_CGTT_BLK_CTRL_REG                                                                     0x0098
#define mmDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX                                                            1
#define mmDPPCLK0_DTO_PARAM                                                                            0x0099
#define mmDPPCLK0_DTO_PARAM_BASE_IDX                                                                   1
#define mmDPPCLK1_DTO_PARAM                                                                            0x009a
#define mmDPPCLK1_DTO_PARAM_BASE_IDX                                                                   1
#define mmDPPCLK2_DTO_PARAM                                                                            0x009b
#define mmDPPCLK2_DTO_PARAM_BASE_IDX                                                                   1
#define mmDPPCLK3_DTO_PARAM                                                                            0x009c
#define mmDPPCLK3_DTO_PARAM_BASE_IDX                                                                   1
#define mmDPPCLK4_DTO_PARAM                                                                            0x009d
#define mmDPPCLK4_DTO_PARAM_BASE_IDX                                                                   1
#define mmDPPCLK5_DTO_PARAM                                                                            0x009e
#define mmDPPCLK5_DTO_PARAM_BASE_IDX                                                                   1
#define mmDCCG_CAC_STATUS2                                                                             0x009f
#define mmDCCG_CAC_STATUS2_BASE_IDX                                                                    1
#define mmSYMCLKA_CLOCK_ENABLE                                                                         0x00a0
#define mmSYMCLKA_CLOCK_ENABLE_BASE_IDX                                                                1
#define mmSYMCLKB_CLOCK_ENABLE                                                                         0x00a1
#define mmSYMCLKB_CLOCK_ENABLE_BASE_IDX                                                                1
#define mmSYMCLKC_CLOCK_ENABLE                                                                         0x00a2
#define mmSYMCLKC_CLOCK_ENABLE_BASE_IDX                                                                1
#define mmSYMCLKD_CLOCK_ENABLE                                                                         0x00a3
#define mmSYMCLKD_CLOCK_ENABLE_BASE_IDX                                                                1
#define mmSYMCLKE_CLOCK_ENABLE                                                                         0x00a4
#define mmSYMCLKE_CLOCK_ENABLE_BASE_IDX                                                                1
#define mmSYMCLKF_CLOCK_ENABLE                                                                         0x00a5
#define mmSYMCLKF_CLOCK_ENABLE_BASE_IDX                                                                1
#define mmDCCG_SOFT_RESET                                                                              0x00a6
#define mmDCCG_SOFT_RESET_BASE_IDX                                                                     1
#define mmDSCCLK_DTO_CTRL                                                                              0x00a7
#define mmDSCCLK_DTO_CTRL_BASE_IDX                                                                     1
#define mmDCCG_AUDIO_DTO_SOURCE                                                                        0x00ab
#define mmDCCG_AUDIO_DTO_SOURCE_BASE_IDX                                                               1
#define mmDCCG_AUDIO_DTO0_PHASE                                                                        0x00ac
#define mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX                                                               1
#define mmDCCG_AUDIO_DTO0_MODULE                                                                       0x00ad
#define mmDCCG_AUDIO_DTO0_MODULE_BASE_IDX                                                              1
#define mmDCCG_AUDIO_DTO1_PHASE                                                                        0x00ae
#define mmDCCG_AUDIO_DTO1_PHASE_BASE_IDX                                                               1
#define mmDCCG_AUDIO_DTO1_MODULE                                                                       0x00af
#define mmDCCG_AUDIO_DTO1_MODULE_BASE_IDX                                                              1
#define mmDCCG_VSYNC_OTG0_LATCH_VALUE                                                                  0x00b0
#define mmDCCG_VSYNC_OTG0_LATCH_VALUE_BASE_IDX                                                         1
#define mmDCCG_VSYNC_OTG1_LATCH_VALUE                                                                  0x00b1
#define mmDCCG_VSYNC_OTG1_LATCH_VALUE_BASE_IDX                                                         1
#define mmDCCG_VSYNC_OTG2_LATCH_VALUE                                                                  0x00b2
#define mmDCCG_VSYNC_OTG2_LATCH_VALUE_BASE_IDX                                                         1
#define mmDCCG_VSYNC_OTG3_LATCH_VALUE                                                                  0x00b3
#define mmDCCG_VSYNC_OTG3_LATCH_VALUE_BASE_IDX                                                         1
#define mmDCCG_VSYNC_OTG4_LATCH_VALUE                                                                  0x00b4
#define mmDCCG_VSYNC_OTG4_LATCH_VALUE_BASE_IDX                                                         1
#define mmDCCG_VSYNC_OTG5_LATCH_VALUE                                                                  0x00b5
#define mmDCCG_VSYNC_OTG5_LATCH_VALUE_BASE_IDX                                                         1
#define mmDPPCLK_DTO_CTRL                                                                              0x00b6
#define mmDPPCLK_DTO_CTRL_BASE_IDX                                                                     1
#define mmDCCG_VSYNC_CNT_CTRL                                                                          0x00b8
#define mmDCCG_VSYNC_CNT_CTRL_BASE_IDX                                                                 1
#define mmDCCG_VSYNC_CNT_INT_CTRL                                                                      0x00b9
#define mmDCCG_VSYNC_CNT_INT_CTRL_BASE_IDX                                                             1
#define mmFORCE_SYMCLK_DISABLE                                                                         0x00ba
#define mmFORCE_SYMCLK_DISABLE_BASE_IDX                                                                1
#define mmDCCG_TEST_CLK_SEL                                                                            0x00be
#define mmDCCG_TEST_CLK_SEL_BASE_IDX                                                                   1


// addressBlock: dce_dc_dccg_dccg_dfs_dispdec
// base address: 0x0
#define mmDENTIST_DISPCLK_CNTL                                                                         0x0064
#define mmDENTIST_DISPCLK_CNTL_BASE_IDX                                                                1


// addressBlock: dce_dc_dccg_dccg_dcperfmon0_dc_perfmon_dispdec
// base address: 0x0
#define mmDC_PERFMON0_PERFCOUNTER_CNTL                                                                 0x0000
#define mmDC_PERFMON0_PERFCOUNTER_CNTL_BASE_IDX                                                        2
#define mmDC_PERFMON0_PERFCOUNTER_CNTL2                                                                0x0001
#define mmDC_PERFMON0_PERFCOUNTER_CNTL2_BASE_IDX                                                       2
#define mmDC_PERFMON0_PERFCOUNTER_STATE                                                                0x0002
#define mmDC_PERFMON0_PERFCOUNTER_STATE_BASE_IDX                                                       2
#define mmDC_PERFMON0_PERFMON_CNTL                                                                     0x0003
#define mmDC_PERFMON0_PERFMON_CNTL_BASE_IDX                                                            2
#define mmDC_PERFMON0_PERFMON_CNTL2                                                                    0x0004
#define mmDC_PERFMON0_PERFMON_CNTL2_BASE_IDX                                                           2
#define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC                                                          0x0005
#define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                 2
#define mmDC_PERFMON0_PERFMON_CVALUE_LOW                                                               0x0006
#define mmDC_PERFMON0_PERFMON_CVALUE_LOW_BASE_IDX                                                      2
#define mmDC_PERFMON0_PERFMON_HI                                                                       0x0007
#define mmDC_PERFMON0_PERFMON_HI_BASE_IDX                                                              2
#define mmDC_PERFMON0_PERFMON_LOW                                                                      0x0008
#define mmDC_PERFMON0_PERFMON_LOW_BASE_IDX                                                             2


// addressBlock: dce_dc_dccg_dccg_dcperfmon1_dc_perfmon_dispdec
// base address: 0x30
#define mmDC_PERFMON1_PERFCOUNTER_CNTL                                                                 0x000c
#define mmDC_PERFMON1_PERFCOUNTER_CNTL_BASE_IDX                                                        2
#define mmDC_PERFMON1_PERFCOUNTER_CNTL2                                                                0x000d
#define mmDC_PERFMON1_PERFCOUNTER_CNTL2_BASE_IDX                                                       2
#define mmDC_PERFMON1_PERFCOUNTER_STATE                                                                0x000e
#define mmDC_PERFMON1_PERFCOUNTER_STATE_BASE_IDX                                                       2
#define mmDC_PERFMON1_PERFMON_CNTL                                                                     0x000f
#define mmDC_PERFMON1_PERFMON_CNTL_BASE_IDX                                                            2
#define mmDC_PERFMON1_PERFMON_CNTL2                                                                    0x0010
#define mmDC_PERFMON1_PERFMON_CNTL2_BASE_IDX                                                           2
#define mmDC_PERFMON1_PERFMON_CVALUE_INT_MISC                                                          0x0011
#define mmDC_PERFMON1_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                 2
#define mmDC_PERFMON1_PERFMON_CVALUE_LOW                                                               0x0012
#define mmDC_PERFMON1_PERFMON_CVALUE_LOW_BASE_IDX                                                      2
#define mmDC_PERFMON1_PERFMON_HI                                                                       0x0013
#define mmDC_PERFMON1_PERFMON_HI_BASE_IDX                                                              2
#define mmDC_PERFMON1_PERFMON_LOW                                                                      0x0014
#define mmDC_PERFMON1_PERFMON_LOW_BASE_IDX                                                             2


// addressBlock: dce_dc_dccg_dccg_pll_dispdec
// base address: 0x0
#define mmPLL_MACRO_CNTL_RESERVED0                                                                     0x0018
#define mmPLL_MACRO_CNTL_RESERVED0_BASE_IDX                                                            2
#define mmPLL_MACRO_CNTL_RESERVED1                                                                     0x0019
#define mmPLL_MACRO_CNTL_RESERVED1_BASE_IDX                                                            2
#define mmPLL_MACRO_CNTL_RESERVED2                                                                     0x001a
#define mmPLL_MACRO_CNTL_RESERVED2_BASE_IDX                                                            2
#define mmPLL_MACRO_CNTL_RESERVED3                                                                     0x001b
#define mmPLL_MACRO_CNTL_RESERVED3_BASE_IDX                                                            2
#define mmPLL_MACRO_CNTL_RESERVED4                                                                     0x001c
#define mmPLL_MACRO_CNTL_RESERVED4_BASE_IDX                                                            2
#define mmPLL_MACRO_CNTL_RESERVED5                                                                     0x001d
#define mmPLL_MACRO_CNTL_RESERVED5_BASE_IDX                                                            2
#define mmPLL_MACRO_CNTL_RESERVED6                                                                     0x001e
#define mmPLL_MACRO_CNTL_RESERVED6_BASE_IDX                                                            2
#define mmPLL_MACRO_CNTL_RESERVED7                                                                     0x001f
#define mmPLL_MACRO_CNTL_RESERVED7_BASE_IDX                                                            2
#define mmPLL_MACRO_CNTL_RESERVED8                                                                     0x0020
#define mmPLL_MACRO_CNTL_RESERVED8_BASE_IDX                                                            2
#define mmPLL_MACRO_CNTL_RESERVED9                                                                     0x0021
#define mmPLL_MACRO_CNTL_RESERVED9_BASE_IDX                                                            2
#define mmPLL_MACRO_CNTL_RESERVED10                                                                    0x0022
#define mmPLL_MACRO_CNTL_RESERVED10_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED11                                                                    0x0023
#define mmPLL_MACRO_CNTL_RESERVED11_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED12                                                                    0x0024
#define mmPLL_MACRO_CNTL_RESERVED12_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED13                                                                    0x0025
#define mmPLL_MACRO_CNTL_RESERVED13_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED14                                                                    0x0026
#define mmPLL_MACRO_CNTL_RESERVED14_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED15                                                                    0x0027
#define mmPLL_MACRO_CNTL_RESERVED15_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED16                                                                    0x0028
#define mmPLL_MACRO_CNTL_RESERVED16_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED17                                                                    0x0029
#define mmPLL_MACRO_CNTL_RESERVED17_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED18                                                                    0x002a
#define mmPLL_MACRO_CNTL_RESERVED18_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED19                                                                    0x002b
#define mmPLL_MACRO_CNTL_RESERVED19_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED20                                                                    0x002c
#define mmPLL_MACRO_CNTL_RESERVED20_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED21                                                                    0x002d
#define mmPLL_MACRO_CNTL_RESERVED21_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED22                                                                    0x002e
#define mmPLL_MACRO_CNTL_RESERVED22_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED23                                                                    0x002f
#define mmPLL_MACRO_CNTL_RESERVED23_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED24                                                                    0x0030
#define mmPLL_MACRO_CNTL_RESERVED24_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED25                                                                    0x0031
#define mmPLL_MACRO_CNTL_RESERVED25_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED26                                                                    0x0032
#define mmPLL_MACRO_CNTL_RESERVED26_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED27                                                                    0x0033
#define mmPLL_MACRO_CNTL_RESERVED27_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED28                                                                    0x0034
#define mmPLL_MACRO_CNTL_RESERVED28_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED29                                                                    0x0035
#define mmPLL_MACRO_CNTL_RESERVED29_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED30                                                                    0x0036
#define mmPLL_MACRO_CNTL_RESERVED30_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED31                                                                    0x0037
#define mmPLL_MACRO_CNTL_RESERVED31_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED32                                                                    0x0038
#define mmPLL_MACRO_CNTL_RESERVED32_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED33                                                                    0x0039
#define mmPLL_MACRO_CNTL_RESERVED33_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED34                                                                    0x003a
#define mmPLL_MACRO_CNTL_RESERVED34_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED35                                                                    0x003b
#define mmPLL_MACRO_CNTL_RESERVED35_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED36                                                                    0x003c
#define mmPLL_MACRO_CNTL_RESERVED36_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED37                                                                    0x003d
#define mmPLL_MACRO_CNTL_RESERVED37_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED38                                                                    0x003e
#define mmPLL_MACRO_CNTL_RESERVED38_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED39                                                                    0x003f
#define mmPLL_MACRO_CNTL_RESERVED39_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED40                                                                    0x0040
#define mmPLL_MACRO_CNTL_RESERVED40_BASE_IDX                                                           2
#define mmPLL_MACRO_CNTL_RESERVED41                                                                    0x0041
#define mmPLL_MACRO_CNTL_RESERVED41_BASE_IDX                                                           2


// addressBlock: dce_dc_dmu_rbbmif_dispdec
// base address: 0x0
#define mmRBBMIF_TIMEOUT                                                                               0x005b
#define mmRBBMIF_TIMEOUT_BASE_IDX                                                                      2
#define mmRBBMIF_STATUS                                                                                0x005c
#define mmRBBMIF_STATUS_BASE_IDX                                                                       2
#define mmRBBMIF_STATUS_2                                                                              0x005d
#define mmRBBMIF_STATUS_2_BASE_IDX                                                                     2
#define mmRBBMIF_INT_STATUS                                                                            0x005e
#define mmRBBMIF_INT_STATUS_BASE_IDX                                                                   2
#define mmRBBMIF_TIMEOUT_DIS                                                                           0x005f
#define mmRBBMIF_TIMEOUT_DIS_BASE_IDX                                                                  2
#define mmRBBMIF_TIMEOUT_DIS_2                                                                         0x0060
#define mmRBBMIF_TIMEOUT_DIS_2_BASE_IDX                                                                2
#define mmRBBMIF_STATUS_FLAG                                                                           0x0061
#define mmRBBMIF_STATUS_FLAG_BASE_IDX                                                                  2


// addressBlock: dce_dc_dmu_dc_pg_dispdec
// base address: 0x0
#define mmDOMAIN0_PG_CONFIG                                                                            0x0080
#define mmDOMAIN0_PG_CONFIG_BASE_IDX                                                                   2
#define mmDOMAIN0_PG_STATUS                                                                            0x0081
#define mmDOMAIN0_PG_STATUS_BASE_IDX                                                                   2
#define mmDOMAIN1_PG_CONFIG                                                                            0x0082
#define mmDOMAIN1_PG_CONFIG_BASE_IDX                                                                   2
#define mmDOMAIN1_PG_STATUS                                                                            0x0083
#define mmDOMAIN1_PG_STATUS_BASE_IDX                                                                   2
#define mmDOMAIN2_PG_CONFIG                                                                            0x0084
#define mmDOMAIN2_PG_CONFIG_BASE_IDX                                                                   2
#define mmDOMAIN2_PG_STATUS                                                                            0x0085
#define mmDOMAIN2_PG_STATUS_BASE_IDX                                                                   2
#define mmDOMAIN3_PG_CONFIG                                                                            0x0086
#define mmDOMAIN3_PG_CONFIG_BASE_IDX                                                                   2
#define mmDOMAIN3_PG_STATUS                                                                            0x0087
#define mmDOMAIN3_PG_STATUS_BASE_IDX                                                                   2
#define mmDOMAIN4_PG_CONFIG                                                                            0x0088
#define mmDOMAIN4_PG_CONFIG_BASE_IDX                                                                   2
#define mmDOMAIN4_PG_STATUS                                                                            0x0089
#define mmDOMAIN4_PG_STATUS_BASE_IDX                                                                   2
#define mmDOMAIN5_PG_CONFIG                                                                            0x008a
#define mmDOMAIN5_PG_CONFIG_BASE_IDX                                                                   2
#define mmDOMAIN5_PG_STATUS                                                                            0x008b
#define mmDOMAIN5_PG_STATUS_BASE_IDX                                                                   2
#define mmDOMAIN6_PG_CONFIG                                                                            0x008c
#define mmDOMAIN6_PG_CONFIG_BASE_IDX                                                                   2
#define mmDOMAIN6_PG_STATUS                                                                            0x008d
#define mmDOMAIN6_PG_STATUS_BASE_IDX                                                                   2
#define mmDOMAIN7_PG_CONFIG                                                                            0x008e
#define mmDOMAIN7_PG_CONFIG_BASE_IDX                                                                   2
#define mmDOMAIN7_PG_STATUS                                                                            0x008f
#define mmDOMAIN7_PG_STATUS_BASE_IDX                                                                   2
#define mmDOMAIN8_PG_CONFIG                                                                            0x0090
#define mmDOMAIN8_PG_CONFIG_BASE_IDX                                                                   2
#define mmDOMAIN8_PG_STATUS                                                                            0x0091
#define mmDOMAIN8_PG_STATUS_BASE_IDX                                                                   2
#define mmDOMAIN9_PG_CONFIG                                                                            0x0092
#define mmDOMAIN9_PG_CONFIG_BASE_IDX                                                                   2
#define mmDOMAIN9_PG_STATUS                                                                            0x0093
#define mmDOMAIN9_PG_STATUS_BASE_IDX                                                                   2
#define mmDOMAIN10_PG_CONFIG                                                                           0x0094
#define mmDOMAIN10_PG_CONFIG_BASE_IDX                                                                  2
#define mmDOMAIN10_PG_STATUS                                                                           0x0095
#define mmDOMAIN10_PG_STATUS_BASE_IDX                                                                  2
#define mmDOMAIN11_PG_CONFIG                                                                           0x0096
#define mmDOMAIN11_PG_CONFIG_BASE_IDX                                                                  2
#define mmDOMAIN11_PG_STATUS                                                                           0x0097
#define mmDOMAIN11_PG_STATUS_BASE_IDX                                                                  2
#define mmDOMAIN16_PG_CONFIG                                                                           0x00a1
#define mmDOMAIN16_PG_CONFIG_BASE_IDX                                                                  2
#define mmDOMAIN16_PG_STATUS                                                                           0x00a2
#define mmDOMAIN16_PG_STATUS_BASE_IDX                                                                  2
#define mmDOMAIN17_PG_CONFIG                                                                           0x00a3
#define mmDOMAIN17_PG_CONFIG_BASE_IDX                                                                  2
#define mmDOMAIN17_PG_STATUS                                                                           0x00a4
#define mmDOMAIN17_PG_STATUS_BASE_IDX                                                                  2
#define mmDOMAIN18_PG_CONFIG                                                                           0x00a5
#define mmDOMAIN18_PG_CONFIG_BASE_IDX                                                                  2
#define mmDOMAIN18_PG_STATUS                                                                           0x00a6
#define mmDOMAIN18_PG_STATUS_BASE_IDX                                                                  2
#define mmDOMAIN19_PG_CONFIG                                                                           0x00a7
#define mmDOMAIN19_PG_CONFIG_BASE_IDX                                                                  2
#define mmDOMAIN19_PG_STATUS                                                                           0x00a8
#define mmDOMAIN19_PG_STATUS_BASE_IDX                                                                  2
#define mmDOMAIN20_PG_CONFIG                                                                           0x00a9
#define mmDOMAIN20_PG_CONFIG_BASE_IDX                                                                  2
#define mmDOMAIN20_PG_STATUS                                                                           0x00aa
#define mmDOMAIN20_PG_STATUS_BASE_IDX                                                                  2
#define mmDOMAIN21_PG_CONFIG                                                                           0x00ab
#define mmDOMAIN21_PG_CONFIG_BASE_IDX                                                                  2
#define mmDOMAIN21_PG_STATUS                                                                           0x00ac
#define mmDOMAIN21_PG_STATUS_BASE_IDX                                                                  2
#define mmDCPG_INTERRUPT_STATUS                                                                        0x00ad
#define mmDCPG_INTERRUPT_STATUS_BASE_IDX                                                               2
#define mmDCPG_INTERRUPT_STATUS_2                                                                      0x00ae
#define mmDCPG_INTERRUPT_STATUS_2_BASE_IDX                                                             2
#define mmDCPG_INTERRUPT_CONTROL_1                                                                     0x00af
#define mmDCPG_INTERRUPT_CONTROL_1_BASE_IDX                                                            2
#define mmDCPG_INTERRUPT_CONTROL_2                                                                     0x00b0
#define mmDCPG_INTERRUPT_CONTROL_2_BASE_IDX                                                            2
#define mmDCPG_INTERRUPT_CONTROL_3                                                                     0x00b1
#define mmDCPG_INTERRUPT_CONTROL_3_BASE_IDX                                                            2
#define mmDC_IP_REQUEST_CNTL                                                                           0x00b2
#define mmDC_IP_REQUEST_CNTL_BASE_IDX                                                                  2


// addressBlock: dce_dc_dmu_dmu_dcperfmon_dc_perfmon_dispdec
// base address: 0x2f8
#define mmDC_PERFMON2_PERFCOUNTER_CNTL                                                                 0x00be
#define mmDC_PERFMON2_PERFCOUNTER_CNTL_BASE_IDX                                                        2
#define mmDC_PERFMON2_PERFCOUNTER_CNTL2                                                                0x00bf
#define mmDC_PERFMON2_PERFCOUNTER_CNTL2_BASE_IDX                                                       2
#define mmDC_PERFMON2_PERFCOUNTER_STATE                                                                0x00c0
#define mmDC_PERFMON2_PERFCOUNTER_STATE_BASE_IDX                                                       2
#define mmDC_PERFMON2_PERFMON_CNTL                                                                     0x00c1
#define mmDC_PERFMON2_PERFMON_CNTL_BASE_IDX                                                            2
#define mmDC_PERFMON2_PERFMON_CNTL2                                                                    0x00c2
#define mmDC_PERFMON2_PERFMON_CNTL2_BASE_IDX                                                           2
#define mmDC_PERFMON2_PERFMON_CVALUE_INT_MISC                                                          0x00c3
#define mmDC_PERFMON2_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                 2
#define mmDC_PERFMON2_PERFMON_CVALUE_LOW                                                               0x00c4
#define mmDC_PERFMON2_PERFMON_CVALUE_LOW_BASE_IDX                                                      2
#define mmDC_PERFMON2_PERFMON_HI                                                                       0x00c5
#define mmDC_PERFMON2_PERFMON_HI_BASE_IDX                                                              2
#define mmDC_PERFMON2_PERFMON_LOW                                                                      0x00c6
#define mmDC_PERFMON2_PERFMON_LOW_BASE_IDX                                                             2


// addressBlock: dce_dc_dmu_dmu_misc_dispdec
// base address: 0x0
#define mmCC_DC_PIPE_DIS                                                                               0x00ca
#define mmCC_DC_PIPE_DIS_BASE_IDX                                                                      2
#define mmDMU_CLK_CNTL                                                                                 0x00cb
#define mmDMU_CLK_CNTL_BASE_IDX                                                                        2
#define mmDMU_MEM_PWR_CNTL                                                                             0x00cc
#define mmDMU_MEM_PWR_CNTL_BASE_IDX                                                                    2
#define mmDMCU_SMU_INTERRUPT_CNTL                                                                      0x00cd
#define mmDMCU_SMU_INTERRUPT_CNTL_BASE_IDX                                                             2
#define mmSMU_INTERRUPT_CONTROL                                                                        0x00ce
#define mmSMU_INTERRUPT_CONTROL_BASE_IDX                                                               2
#define mmDMU_MISC_ALLOW_DS_FORCE                                                                      0x00d6
#define mmDMU_MISC_ALLOW_DS_FORCE_BASE_IDX                                                             2


// addressBlock: dce_dc_dmu_dmcu_dispdec
// base address: 0x0
#define mmDMCU_CTRL                                                                                    0x00da
#define mmDMCU_CTRL_BASE_IDX                                                                           2
#define mmDMCU_STATUS                                                                                  0x00db
#define mmDMCU_STATUS_BASE_IDX                                                                         2
#define mmDMCU_PC_START_ADDR                                                                           0x00dc
#define mmDMCU_PC_START_ADDR_BASE_IDX                                                                  2
#define mmDMCU_FW_START_ADDR                                                                           0x00dd
#define mmDMCU_FW_START_ADDR_BASE_IDX                                                                  2
#define mmDMCU_FW_END_ADDR                                                                             0x00de
#define mmDMCU_FW_END_ADDR_BASE_IDX                                                                    2
#define mmDMCU_FW_ISR_START_ADDR                                                                       0x00df
#define mmDMCU_FW_ISR_START_ADDR_BASE_IDX                                                              2
#define mmDMCU_FW_CS_HI                                                                                0x00e0
#define mmDMCU_FW_CS_HI_BASE_IDX                                                                       2
#define mmDMCU_FW_CS_LO                                                                                0x00e1
#define mmDMCU_FW_CS_LO_BASE_IDX                                                                       2
#define mmDMCU_RAM_ACCESS_CTRL                                                                         0x00e2
#define mmDMCU_RAM_ACCESS_CTRL_BASE_IDX                                                                2
#define mmDMCU_ERAM_WR_CTRL                                                                            0x00e3
#define mmDMCU_ERAM_WR_CTRL_BASE_IDX                                                                   2
#define mmDMCU_ERAM_WR_DATA                                                                            0x00e4
#define mmDMCU_ERAM_WR_DATA_BASE_IDX                                                                   2
#define mmDMCU_ERAM_RD_CTRL                                                                            0x00e5
#define mmDMCU_ERAM_RD_CTRL_BASE_IDX                                                                   2
#define mmDMCU_ERAM_RD_DATA                                                                            0x00e6
#define mmDMCU_ERAM_RD_DATA_BASE_IDX                                                                   2
#define mmDMCU_IRAM_WR_CTRL                                                                            0x00e7
#define mmDMCU_IRAM_WR_CTRL_BASE_IDX                                                                   2
#define mmDMCU_IRAM_WR_DATA                                                                            0x00e8
#define mmDMCU_IRAM_WR_DATA_BASE_IDX                                                                   2
#define mmDMCU_IRAM_RD_CTRL                                                                            0x00e9
#define mmDMCU_IRAM_RD_CTRL_BASE_IDX                                                                   2
#define mmDMCU_IRAM_RD_DATA                                                                            0x00ea
#define mmDMCU_IRAM_RD_DATA_BASE_IDX                                                                   2
#define mmDMCU_EVENT_TRIGGER                                                                           0x00eb
#define mmDMCU_EVENT_TRIGGER_BASE_IDX                                                                  2
#define mmDMCU_UC_INTERNAL_INT_STATUS                                                                  0x00ec
#define mmDMCU_UC_INTERNAL_INT_STATUS_BASE_IDX                                                         2
#define mmDMCU_SS_INTERRUPT_CNTL_STATUS                                                                0x00ed
#define mmDMCU_SS_INTERRUPT_CNTL_STATUS_BASE_IDX                                                       2
#define mmDMCU_INTERRUPT_STATUS                                                                        0x00ee
#define mmDMCU_INTERRUPT_STATUS_BASE_IDX                                                               2
#define mmDMCU_INTERRUPT_STATUS_1                                                                      0x00ef
#define mmDMCU_INTERRUPT_STATUS_1_BASE_IDX                                                             2
#define mmDMCU_INTERRUPT_TO_HOST_EN_MASK                                                               0x00f0
#define mmDMCU_INTERRUPT_TO_HOST_EN_MASK_BASE_IDX                                                      2
#define mmDMCU_INTERRUPT_TO_UC_EN_MASK                                                                 0x00f1
#define mmDMCU_INTERRUPT_TO_UC_EN_MASK_BASE_IDX                                                        2
#define mmDMCU_INTERRUPT_TO_UC_EN_MASK_1                                                               0x00f2
#define mmDMCU_INTERRUPT_TO_UC_EN_MASK_1_BASE_IDX                                                      2
#define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL                                                            0x00f3
#define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL_BASE_IDX                                                   2
#define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL_1                                                          0x00f4
#define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL_1_BASE_IDX                                                 2
#define mmDC_DMCU_SCRATCH                                                                              0x00f5
#define mmDC_DMCU_SCRATCH_BASE_IDX                                                                     2
#define mmDMCU_INT_CNT                                                                                 0x00f6
#define mmDMCU_INT_CNT_BASE_IDX                                                                        2
#define mmDMCU_FW_CHECKSUM_SMPL_BYTE_POS                                                               0x00f7
#define mmDMCU_FW_CHECKSUM_SMPL_BYTE_POS_BASE_IDX                                                      2
#define mmDMCU_UC_CLK_GATING_CNTL                                                                      0x00f8
#define mmDMCU_UC_CLK_GATING_CNTL_BASE_IDX                                                             2
#define mmMASTER_COMM_DATA_REG1                                                                        0x00f9
#define mmMASTER_COMM_DATA_REG1_BASE_IDX                                                               2
#define mmMASTER_COMM_DATA_REG2                                                                        0x00fa
#define mmMASTER_COMM_DATA_REG2_BASE_IDX                                                               2
#define mmMASTER_COMM_DATA_REG3                                                                        0x00fb
#define mmMASTER_COMM_DATA_REG3_BASE_IDX                                                               2
#define mmMASTER_COMM_CMD_REG                                                                          0x00fc
#define mmMASTER_COMM_CMD_REG_BASE_IDX                                                                 2
#define mmMASTER_COMM_CNTL_REG                                                                         0x00fd
#define mmMASTER_COMM_CNTL_REG_BASE_IDX                                                                2
#define mmSLAVE_COMM_DATA_REG1                                                                         0x00fe
#define mmSLAVE_COMM_DATA_REG1_BASE_IDX                                                                2
#define mmSLAVE_COMM_DATA_REG2                                                                         0x00ff
#define mmSLAVE_COMM_DATA_REG2_BASE_IDX                                                                2
#define mmSLAVE_COMM_DATA_REG3                                                                         0x0100
#define mmSLAVE_COMM_DATA_REG3_BASE_IDX                                                                2
#define mmSLAVE_COMM_CMD_REG                                                                           0x0101
#define mmSLAVE_COMM_CMD_REG_BASE_IDX                                                                  2
#define mmSLAVE_COMM_CNTL_REG                                                                          0x0102
#define mmSLAVE_COMM_CNTL_REG_BASE_IDX                                                                 2
#define mmDMCU_PERFMON_INTERRUPT_STATUS1                                                               0x0105
#define mmDMCU_PERFMON_INTERRUPT_STATUS1_BASE_IDX                                                      2
#define mmDMCU_PERFMON_INTERRUPT_STATUS2                                                               0x0106
#define mmDMCU_PERFMON_INTERRUPT_STATUS2_BASE_IDX                                                      2
#define mmDMCU_PERFMON_INTERRUPT_STATUS3                                                               0x0107
#define mmDMCU_PERFMON_INTERRUPT_STATUS3_BASE_IDX                                                      2
#define mmDMCU_PERFMON_INTERRUPT_STATUS4                                                               0x0108
#define mmDMCU_PERFMON_INTERRUPT_STATUS4_BASE_IDX                                                      2
#define mmDMCU_PERFMON_INTERRUPT_STATUS5                                                               0x0109
#define mmDMCU_PERFMON_INTERRUPT_STATUS5_BASE_IDX                                                      2
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1                                                        0x010a
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK1_BASE_IDX                                               2
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK2                                                        0x010b
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK2_BASE_IDX                                               2
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK3                                                        0x010c
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK3_BASE_IDX                                               2
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4                                                        0x010d
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4_BASE_IDX                                               2
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5                                                        0x010e
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5_BASE_IDX                                               2
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL1                                                   0x010f
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL1_BASE_IDX                                          2
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL2                                                   0x0110
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL2_BASE_IDX                                          2
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL3                                                   0x0111
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL3_BASE_IDX                                          2
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4                                                   0x0112
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4_BASE_IDX                                          2
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL5                                                   0x0113
#define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL5_BASE_IDX                                          2
#define mmDMCU_DPRX_INTERRUPT_STATUS1                                                                  0x0114
#define mmDMCU_DPRX_INTERRUPT_STATUS1_BASE_IDX                                                         2
#define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1                                                           0x0115
#define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1_BASE_IDX                                                  2
#define mmDMCU_DPRX_INTERRUPT_TO_UC_XIRQ_IRQ_SEL1                                                      0x0116
#define mmDMCU_DPRX_INTERRUPT_TO_UC_XIRQ_IRQ_SEL1_BASE_IDX                                             2
#define mmDMCU_INTERRUPT_STATUS_CONTINUE                                                               0x0119
#define mmDMCU_INTERRUPT_STATUS_CONTINUE_BASE_IDX                                                      2
#define mmDMCU_INTERRUPT_TO_UC_EN_MASK_CONTINUE                                                        0x011a
#define mmDMCU_INTERRUPT_TO_UC_EN_MASK_CONTINUE_BASE_IDX                                               2
#define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL_CONTINUE                                                   0x011b
#define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL_CONTINUE_BASE_IDX                                          2
#define mmDMCU_INT_CNT_CONTINUE                                                                        0x011c
#define mmDMCU_INT_CNT_CONTINUE_BASE_IDX                                                               2
#define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL_CONT2                                                      0x011d
#define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL_CONT2_BASE_IDX                                             2
#define mmDMCU_INTERRUPT_STATUS_2                                                                      0x011e
#define mmDMCU_INTERRUPT_STATUS_2_BASE_IDX                                                             2
#define mmDMCU_INTERRUPT_TO_UC_EN_MASK_2                                                               0x011f
#define mmDMCU_INTERRUPT_TO_UC_EN_MASK_2_BASE_IDX                                                      2


// addressBlock: dce_dc_dmu_ihc_dispdec
// base address: 0x0
#define mmDC_GPU_TIMER_START_POSITION_V_UPDATE                                                         0x0126
#define mmDC_GPU_TIMER_START_POSITION_V_UPDATE_BASE_IDX                                                2
#define mmDC_GPU_TIMER_START_POSITION_VSTARTUP                                                         0x0127
#define mmDC_GPU_TIMER_START_POSITION_VSTARTUP_BASE_IDX                                                2
#define mmDC_GPU_TIMER_READ                                                                            0x0128
#define mmDC_GPU_TIMER_READ_BASE_IDX                                                                   2
#define mmDC_GPU_TIMER_READ_CNTL                                                                       0x0129
#define mmDC_GPU_TIMER_READ_CNTL_BASE_IDX                                                              2
#define mmDISP_INTERRUPT_STATUS                                                                        0x012a
#define mmDISP_INTERRUPT_STATUS_BASE_IDX                                                               2
#define mmDISP_INTERRUPT_STATUS_CONTINUE                                                               0x012b
#define mmDISP_INTERRUPT_STATUS_CONTINUE_BASE_IDX                                                      2
#define mmDISP_INTERRUPT_STATUS_CONTINUE2                                                              0x012c
#define mmDISP_INTERRUPT_STATUS_CONTINUE2_BASE_IDX                                                     2
#define mmDISP_INTERRUPT_STATUS_CONTINUE3                                                              0x012d
#define mmDISP_INTERRUPT_STATUS_CONTINUE3_BASE_IDX                                                     2
#define mmDISP_INTERRUPT_STATUS_CONTINUE4                                                              0x012e
#define mmDISP_INTERRUPT_STATUS_CONTINUE4_BASE_IDX                                                     2
#define mmDISP_INTERRUPT_STATUS_CONTINUE5                                                              0x012f
#define mmDISP_INTERRUPT_STATUS_CONTINUE5_BASE_IDX                                                     2
#define mmDISP_INTERRUPT_STATUS_CONTINUE6                                                              0x0130
#define mmDISP_INTERRUPT_STATUS_CONTINUE6_BASE_IDX                                                     2
#define mmDISP_INTERRUPT_STATUS_CONTINUE7                                                              0x0131
#define mmDISP_INTERRUPT_STATUS_CONTINUE7_BASE_IDX                                                     2
#define mmDISP_INTERRUPT_STATUS_CONTINUE8                                                              0x0132
#define mmDISP_INTERRUPT_STATUS_CONTINUE8_BASE_IDX                                                     2
#define mmDISP_INTERRUPT_STATUS_CONTINUE9                                                              0x0133
#define mmDISP_INTERRUPT_STATUS_CONTINUE9_BASE_IDX                                                     2
#define mmDISP_INTERRUPT_STATUS_CONTINUE10                                                             0x0134
#define mmDISP_INTERRUPT_STATUS_CONTINUE10_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE11                                                             0x0135
#define mmDISP_INTERRUPT_STATUS_CONTINUE11_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE12                                                             0x0136
#define mmDISP_INTERRUPT_STATUS_CONTINUE12_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE13                                                             0x0137
#define mmDISP_INTERRUPT_STATUS_CONTINUE13_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE14                                                             0x0138
#define mmDISP_INTERRUPT_STATUS_CONTINUE14_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE15                                                             0x0139
#define mmDISP_INTERRUPT_STATUS_CONTINUE15_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE16                                                             0x013a
#define mmDISP_INTERRUPT_STATUS_CONTINUE16_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE17                                                             0x013b
#define mmDISP_INTERRUPT_STATUS_CONTINUE17_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE18                                                             0x013c
#define mmDISP_INTERRUPT_STATUS_CONTINUE18_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE19                                                             0x013d
#define mmDISP_INTERRUPT_STATUS_CONTINUE19_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE20                                                             0x013e
#define mmDISP_INTERRUPT_STATUS_CONTINUE20_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE21                                                             0x013f
#define mmDISP_INTERRUPT_STATUS_CONTINUE21_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE22                                                             0x0140
#define mmDISP_INTERRUPT_STATUS_CONTINUE22_BASE_IDX                                                    2
#define mmDC_GPU_TIMER_START_POSITION_VREADY                                                           0x0141
#define mmDC_GPU_TIMER_START_POSITION_VREADY_BASE_IDX                                                  2
#define mmDC_GPU_TIMER_START_POSITION_FLIP                                                             0x0142
#define mmDC_GPU_TIMER_START_POSITION_FLIP_BASE_IDX                                                    2
#define mmDC_GPU_TIMER_START_POSITION_V_UPDATE_NO_LOCK                                                 0x0143
#define mmDC_GPU_TIMER_START_POSITION_V_UPDATE_NO_LOCK_BASE_IDX                                        2
#define mmDC_GPU_TIMER_START_POSITION_FLIP_AWAY                                                        0x0144
#define mmDC_GPU_TIMER_START_POSITION_FLIP_AWAY_BASE_IDX                                               2
#define mmDISP_INTERRUPT_STATUS_CONTINUE23                                                             0x0145
#define mmDISP_INTERRUPT_STATUS_CONTINUE23_BASE_IDX                                                    2
#define mmDISP_INTERRUPT_STATUS_CONTINUE24                                                             0x0146
#define mmDISP_INTERRUPT_STATUS_CONTINUE24_BASE_IDX                                                    2
#define mmDCCG_INTERRUPT_DEST                                                                          0x0147
#define mmDCCG_INTERRUPT_DEST_BASE_IDX                                                                 2
#define mmDMU_INTERRUPT_DEST                                                                           0x0148
#define mmDMU_INTERRUPT_DEST_BASE_IDX                                                                  2
#define mmDCPG_INTERRUPT_DEST                                                                          0x0149
#define mmDCPG_INTERRUPT_DEST_BASE_IDX                                                                 2
#define mmDCPG_INTERRUPT_DEST2                                                                         0x014a
#define mmDCPG_INTERRUPT_DEST2_BASE_IDX                                                                2
#define mmMMHUBBUB_INTERRUPT_DEST                                                                      0x014b
#define mmMMHUBBUB_INTERRUPT_DEST_BASE_IDX                                                             2
#define mmWB_INTERRUPT_DEST                                                                            0x014c
#define mmWB_INTERRUPT_DEST_BASE_IDX                                                                   2
#define mmDCHUB_INTERRUPT_DEST                                                                         0x014d
#define mmDCHUB_INTERRUPT_DEST_BASE_IDX                                                                2
#define mmDCHUB_PERFCOUNTER_INTERRUPT_DEST                                                             0x014e
#define mmDCHUB_PERFCOUNTER_INTERRUPT_DEST_BASE_IDX                                                    2
#define mmDCHUB_INTERRUPT_DEST2                                                                        0x014f
#define mmDCHUB_INTERRUPT_DEST2_BASE_IDX                                                               2
#define mmDPP_PERFCOUNTER_INTERRUPT_DEST                                                               0x0150
#define mmDPP_PERFCOUNTER_INTERRUPT_DEST_BASE_IDX                                                      2
#define mmMPC_INTERRUPT_DEST                                                                           0x0151
#define mmMPC_INTERRUPT_DEST_BASE_IDX                                                                  2
#define mmOPP_INTERRUPT_DEST                                                                           0x0152
#define mmOPP_INTERRUPT_DEST_BASE_IDX                                                                  2
#define mmOPTC_INTERRUPT_DEST                                                                          0x0153
#define mmOPTC_INTERRUPT_DEST_BASE_IDX                                                                 2
#define mmOTG0_INTERRUPT_DEST                                                                          0x0154
#define mmOTG0_INTERRUPT_DEST_BASE_IDX                                                                 2
#define mmOTG1_INTERRUPT_DEST                                                                          0x0155
#define mmOTG1_INTERRUPT_DEST_BASE_IDX                                                                 2
#define mmOTG2_INTERRUPT_DEST                                                                          0x0156
#define mmOTG2_INTERRUPT_DEST_BASE_IDX                                                                 2
#define mmOTG3_INTERRUPT_DEST                                                                          0x0157
#define mmOTG3_INTERRUPT_DEST_BASE_IDX                                                                 2
#define mmOTG4_INTERRUPT_DEST                                                                          0x0158
#define mmOTG4_INTERRUPT_DEST_BASE_IDX                                                                 2
#define mmOTG5_INTERRUPT_DEST                                                                          0x0159
#define mmOTG5_INTERRUPT_DEST_BASE_IDX                                                                 2
#define mmDIG_INTERRUPT_DEST                                                                           0x015a
#define mmDIG_INTERRUPT_DEST_BASE_IDX                                                                  2
#define mmI2C_DDC_HPD_INTERRUPT_DEST                                                                   0x015b
#define mmI2C_DDC_HPD_INTERRUPT_DEST_BASE_IDX                                                          2
#define mmDIO_INTERRUPT_DEST                                                                           0x015d
#define mmDIO_INTERRUPT_DEST_BASE_IDX                                                                  2
#define mmDCIO_INTERRUPT_DEST                                                                          0x015e
#define mmDCIO_INTERRUPT_DEST_BASE_IDX                                                                 2
#define mmHPD_INTERRUPT_DEST                                                                           0x015f
#define mmHPD_INTERRUPT_DEST_BASE_IDX                                                                  2
#define mmAZ_INTERRUPT_DEST                                                                            0x0160
#define mmAZ_INTERRUPT_DEST_BASE_IDX                                                                   2
#define mmAUX_INTERRUPT_DEST                                                                           0x0161
#define mmAUX_INTERRUPT_DEST_BASE_IDX                                                                  2
#define mmDSC_INTERRUPT_DEST                                                                           0x0162
#define mmDSC_INTERRUPT_DEST_BASE_IDX                                                                  2


// addressBlock: dce_dc_wb0_dispdec_cnv_dispdec
// base address: 0x0
#define mmWB_ENABLE                                                                                    0x01da
#define mmWB_ENABLE_BASE_IDX                                                                           2
#define mmWB_EC_CONFIG                                                                                 0x01db
#define mmWB_EC_CONFIG_BASE_IDX                                                                        2
#define mmCNV_MODE                                                                                     0x01dc
#define mmCNV_MODE_BASE_IDX                                                                            2
#define mmCNV_WINDOW_START                                                                             0x01dd
#define mmCNV_WINDOW_START_BASE_IDX                                                                    2
#define mmCNV_WINDOW_SIZE                                                                              0x01de
#define mmCNV_WINDOW_SIZE_BASE_IDX                                                                     2
#define mmCNV_UPDATE                                                                                   0x01df
#define mmCNV_UPDATE_BASE_IDX                                                                          2
#define mmCNV_SOURCE_SIZE                                                                              0x01e0
#define mmCNV_SOURCE_SIZE_BASE_IDX                                                                     2
#define mmCNV_TEST_CNTL                                                                                0x01ee
#define mmCNV_TEST_CNTL_BASE_IDX                                                                       2
#define mmCNV_TEST_CRC_RED                                                                             0x01ef
#define mmCNV_TEST_CRC_RED_BASE_IDX                                                                    2
#define mmCNV_TEST_CRC_GREEN                                                                           0x01f0
#define mmCNV_TEST_CRC_GREEN_BASE_IDX                                                                  2
#define mmCNV_TEST_CRC_BLUE                                                                            0x01f1
#define mmCNV_TEST_CRC_BLUE_BASE_IDX                                                                   2
#define mmWB_DEBUG_CTRL                                                                                0x01f2
#define mmWB_DEBUG_CTRL_BASE_IDX                                                                       2
#define mmWB_DBG_MODE                                                                                  0x01f3
#define mmWB_DBG_MODE_BASE_IDX                                                                         2
#define mmWB_HW_DEBUG                                                                                  0x01f4
#define mmWB_HW_DEBUG_BASE_IDX                                                                         2
#define mmWB_SOFT_RESET                                                                                0x01f5
#define mmWB_SOFT_RESET_BASE_IDX                                                                       2
#define mmWB_WARM_UP_MODE_CTL1                                                                         0x01f6
#define mmWB_WARM_UP_MODE_CTL1_BASE_IDX                                                                2
#define mmWB_WARM_UP_MODE_CTL2                                                                         0x01f7
#define mmWB_WARM_UP_MODE_CTL2_BASE_IDX                                                                2
#define mmCNV_TEST_DEBUG_INDEX                                                                         0x01f8
#define mmCNV_TEST_DEBUG_INDEX_BASE_IDX                                                                2
#define mmCNV_TEST_DEBUG_DATA                                                                          0x01f9
#define mmCNV_TEST_DEBUG_DATA_BASE_IDX                                                                 2


// addressBlock: dce_dc_wb0_dispdec_wbscl_dispdec
// base address: 0x0
#define mmWBSCL_COEF_RAM_SELECT                                                                        0x020a
#define mmWBSCL_COEF_RAM_SELECT_BASE_IDX                                                               2
#define mmWBSCL_COEF_RAM_TAP_DATA                                                                      0x020b
#define mmWBSCL_COEF_RAM_TAP_DATA_BASE_IDX                                                             2
#define mmWBSCL_MODE                                                                                   0x020c
#define mmWBSCL_MODE_BASE_IDX                                                                          2
#define mmWBSCL_TAP_CONTROL                                                                            0x020d
#define mmWBSCL_TAP_CONTROL_BASE_IDX                                                                   2
#define mmWBSCL_DEST_SIZE                                                                              0x020e
#define mmWBSCL_DEST_SIZE_BASE_IDX                                                                     2
#define mmWBSCL_HORZ_FILTER_SCALE_RATIO                                                                0x020f
#define mmWBSCL_HORZ_FILTER_SCALE_RATIO_BASE_IDX                                                       2
#define mmWBSCL_HORZ_FILTER_INIT_Y_RGB                                                                 0x0210
#define mmWBSCL_HORZ_FILTER_INIT_Y_RGB_BASE_IDX                                                        2
#define mmWBSCL_HORZ_FILTER_INIT_CBCR                                                                  0x0211
#define mmWBSCL_HORZ_FILTER_INIT_CBCR_BASE_IDX                                                         2
#define mmWBSCL_VERT_FILTER_SCALE_RATIO                                                                0x0212
#define mmWBSCL_VERT_FILTER_SCALE_RATIO_BASE_IDX                                                       2
#define mmWBSCL_VERT_FILTER_INIT_Y_RGB                                                                 0x0213
#define mmWBSCL_VERT_FILTER_INIT_Y_RGB_BASE_IDX                                                        2
#define mmWBSCL_VERT_FILTER_INIT_CBCR                                                                  0x0214
#define mmWBSCL_VERT_FILTER_INIT_CBCR_BASE_IDX                                                         2
#define mmWBSCL_ROUND_OFFSET                                                                           0x0215
#define mmWBSCL_ROUND_OFFSET_BASE_IDX                                                                  2
#define mmWBSCL_OVERFLOW_STATUS                                                                        0x0216
#define mmWBSCL_OVERFLOW_STATUS_BASE_IDX                                                               2
#define mmWBSCL_COEF_RAM_CONFLICT_STATUS                                                               0x0217
#define mmWBSCL_COEF_RAM_CONFLICT_STATUS_BASE_IDX                                                      2
#define mmWBSCL_TEST_CNTL                                                                              0x0218
#define mmWBSCL_TEST_CNTL_BASE_IDX                                                                     2
#define mmWBSCL_TEST_CRC_RED                                                                           0x0219
#define mmWBSCL_TEST_CRC_RED_BASE_IDX                                                                  2
#define mmWBSCL_TEST_CRC_GREEN                                                                         0x021a
#define mmWBSCL_TEST_CRC_GREEN_BASE_IDX                                                                2
#define mmWBSCL_TEST_CRC_BLUE                                                                          0x021b
#define mmWBSCL_TEST_CRC_BLUE_BASE_IDX                                                                 2
#define mmWBSCL_BACKPRESSURE_CNT_EN                                                                    0x021c
#define mmWBSCL_BACKPRESSURE_CNT_EN_BASE_IDX                                                           2
#define mmWB_MCIF_BACKPRESSURE_CNT                                                                     0x021d
#define mmWB_MCIF_BACKPRESSURE_CNT_BASE_IDX                                                            2
#define mmWBSCL_CLAMP_Y_RGB                                                                            0x021e
#define mmWBSCL_CLAMP_Y_RGB_BASE_IDX                                                                   2
#define mmWBSCL_CLAMP_CBCR                                                                             0x021f
#define mmWBSCL_CLAMP_CBCR_BASE_IDX                                                                    2
#define mmWBSCL_OUTSIDE_PIX_STRATEGY                                                                   0x0220
#define mmWBSCL_OUTSIDE_PIX_STRATEGY_BASE_IDX                                                          2
#define mmWBSCL_OUTSIDE_PIX_STRATEGY_CBCR                                                              0x0221
#define mmWBSCL_OUTSIDE_PIX_STRATEGY_CBCR_BASE_IDX                                                     2
#define mmWBSCL_DEBUG                                                                                  0x0222
#define mmWBSCL_DEBUG_BASE_IDX                                                                         2
#define mmWBSCL_TEST_DEBUG_INDEX                                                                       0x0223
#define mmWBSCL_TEST_DEBUG_INDEX_BASE_IDX                                                              2
#define mmWBSCL_TEST_DEBUG_DATA                                                                        0x0224
#define mmWBSCL_TEST_DEBUG_DATA_BASE_IDX                                                               2


// addressBlock: dce_dc_wb0_dispdec_wb_dcperfmon_dc_perfmon_dispdec
// base address: 0x8e8
#define mmDC_PERFMON3_PERFCOUNTER_CNTL                                                                 0x023a
#define mmDC_PERFMON3_PERFCOUNTER_CNTL_BASE_IDX                                                        2
#define mmDC_PERFMON3_PERFCOUNTER_CNTL2                                                                0x023b
#define mmDC_PERFMON3_PERFCOUNTER_CNTL2_BASE_IDX                                                       2
#define mmDC_PERFMON3_PERFCOUNTER_STATE                                                                0x023c
#define mmDC_PERFMON3_PERFCOUNTER_STATE_BASE_IDX                                                       2
#define mmDC_PERFMON3_PERFMON_CNTL                                                                     0x023d
#define mmDC_PERFMON3_PERFMON_CNTL_BASE_IDX                                                            2
#define mmDC_PERFMON3_PERFMON_CNTL2                                                                    0x023e
#define mmDC_PERFMON3_PERFMON_CNTL2_BASE_IDX                                                           2
#define mmDC_PERFMON3_PERFMON_CVALUE_INT_MISC                                                          0x023f
#define mmDC_PERFMON3_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                 2
#define mmDC_PERFMON3_PERFMON_CVALUE_LOW                                                               0x0240
#define mmDC_PERFMON3_PERFMON_CVALUE_LOW_BASE_IDX                                                      2
#define mmDC_PERFMON3_PERFMON_HI                                                                       0x0241
#define mmDC_PERFMON3_PERFMON_HI_BASE_IDX                                                              2
#define mmDC_PERFMON3_PERFMON_LOW                                                                      0x0242
#define mmDC_PERFMON3_PERFMON_LOW_BASE_IDX                                                             2


// addressBlock: dce_dc_mmhubbub_mcif_wb0_dispdec
// base address: 0x0
#define mmMCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL                                                           0x02b2
#define mmMCIF_WB0_MCIF_WB_BUFMGR_SW_CONTROL_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_BUFMGR_CUR_LINE_R                                                           0x02b3
#define mmMCIF_WB0_MCIF_WB_BUFMGR_CUR_LINE_R_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_BUFMGR_STATUS                                                               0x02b4
#define mmMCIF_WB0_MCIF_WB_BUFMGR_STATUS_BASE_IDX                                                      2
#define mmMCIF_WB0_MCIF_WB_BUF_PITCH                                                                   0x02b5
#define mmMCIF_WB0_MCIF_WB_BUF_PITCH_BASE_IDX                                                          2
#define mmMCIF_WB0_MCIF_WB_BUF_1_STATUS                                                                0x02b6
#define mmMCIF_WB0_MCIF_WB_BUF_1_STATUS_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_1_STATUS2                                                               0x02b7

#define mmMCIF_WB0_MCIF_WB_BUF_1_STATUS2_BASE_IDX                                                      2
#define mmMCIF_WB0_MCIF_WB_BUF_2_STATUS                                                                0x02b8
#define mmMCIF_WB0_MCIF_WB_BUF_2_STATUS_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_2_STATUS2                                                               0x02b9
#define mmMCIF_WB0_MCIF_WB_BUF_2_STATUS2_BASE_IDX                                                      2
#define mmMCIF_WB0_MCIF_WB_BUF_3_STATUS                                                                0x02ba
#define mmMCIF_WB0_MCIF_WB_BUF_3_STATUS_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_3_STATUS2                                                               0x02bb
#define mmMCIF_WB0_MCIF_WB_BUF_3_STATUS2_BASE_IDX                                                      2
#define mmMCIF_WB0_MCIF_WB_BUF_4_STATUS                                                                0x02bc
#define mmMCIF_WB0_MCIF_WB_BUF_4_STATUS_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_4_STATUS2                                                               0x02bd
#define mmMCIF_WB0_MCIF_WB_BUF_4_STATUS2_BASE_IDX                                                      2
#define mmMCIF_WB0_MCIF_WB_ARBITRATION_CONTROL                                                         0x02be
#define mmMCIF_WB0_MCIF_WB_ARBITRATION_CONTROL_BASE_IDX                                                2
#define mmMCIF_WB0_MCIF_WB_SCLK_CHANGE                                                                 0x02bf
#define mmMCIF_WB0_MCIF_WB_SCLK_CHANGE_BASE_IDX                                                        2
#define mmMCIF_WB0_MCIF_WB_TEST_DEBUG_INDEX                                                            0x02c0
#define mmMCIF_WB0_MCIF_WB_TEST_DEBUG_INDEX_BASE_IDX                                                   2
#define mmMCIF_WB0_MCIF_WB_TEST_DEBUG_DATA                                                             0x02c1
#define mmMCIF_WB0_MCIF_WB_TEST_DEBUG_DATA_BASE_IDX                                                    2
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_Y                                                                0x02c2
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_Y_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_Y_OFFSET                                                         0x02c3
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_Y_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_C                                                                0x02c4
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_C_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_C_OFFSET                                                         0x02c5
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_C_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_Y                                                                0x02c6
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_Y_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_Y_OFFSET                                                         0x02c7
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_Y_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_C                                                                0x02c8
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_C_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_C_OFFSET                                                         0x02c9
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_C_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_Y                                                                0x02ca
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_Y_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_Y_OFFSET                                                         0x02cb
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_Y_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_C                                                                0x02cc
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_C_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_C_OFFSET                                                         0x02cd
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_C_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_Y                                                                0x02ce
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_Y_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_Y_OFFSET                                                         0x02cf
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_Y_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_C                                                                0x02d0
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_C_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_C_OFFSET                                                         0x02d1
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_C_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB0_MCIF_WB_BUFMGR_VCE_CONTROL                                                          0x02d2
#define mmMCIF_WB0_MCIF_WB_BUFMGR_VCE_CONTROL_BASE_IDX                                                 2
#define mmMCIF_WB0_MCIF_WB_NB_PSTATE_LATENCY_WATERMARK                                                 0x02d3
#define mmMCIF_WB0_MCIF_WB_NB_PSTATE_LATENCY_WATERMARK_BASE_IDX                                        2
#define mmMCIF_WB0_MCIF_WB_NB_PSTATE_CONTROL                                                           0x02d4
#define mmMCIF_WB0_MCIF_WB_NB_PSTATE_CONTROL_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_WATERMARK                                                                   0x02d5
#define mmMCIF_WB0_MCIF_WB_WATERMARK_BASE_IDX                                                          2
#define mmMCIF_WB0_MCIF_WB_CLOCK_GATER_CONTROL                                                         0x02d6
#define mmMCIF_WB0_MCIF_WB_CLOCK_GATER_CONTROL_BASE_IDX                                                2
#define mmMCIF_WB0_MCIF_WB_WARM_UP_CNTL                                                                0x02d7
#define mmMCIF_WB0_MCIF_WB_WARM_UP_CNTL_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_SELF_REFRESH_CONTROL                                                        0x02d8
#define mmMCIF_WB0_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX                                               2
#define mmMCIF_WB0_MULTI_LEVEL_QOS_CTRL                                                                0x02d9
#define mmMCIF_WB0_MULTI_LEVEL_QOS_CTRL_BASE_IDX                                                       2
#define mmMCIF_WB0_MCIF_WB_SECURITY_LEVEL                                                              0x02da
#define mmMCIF_WB0_MCIF_WB_SECURITY_LEVEL_BASE_IDX                                                     2
#define mmMCIF_WB0_MCIF_WB_BUF_LUMA_SIZE                                                               0x02db
#define mmMCIF_WB0_MCIF_WB_BUF_LUMA_SIZE_BASE_IDX                                                      2
#define mmMCIF_WB0_MCIF_WB_BUF_CHROMA_SIZE                                                             0x02dc
#define mmMCIF_WB0_MCIF_WB_BUF_CHROMA_SIZE_BASE_IDX                                                    2
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_Y_HIGH                                                           0x02dd
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_Y_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_C_HIGH                                                           0x02de
#define mmMCIF_WB0_MCIF_WB_BUF_1_ADDR_C_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_Y_HIGH                                                           0x02df
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_Y_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_C_HIGH                                                           0x02e0
#define mmMCIF_WB0_MCIF_WB_BUF_2_ADDR_C_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_Y_HIGH                                                           0x02e1
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_Y_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_C_HIGH                                                           0x02e2
#define mmMCIF_WB0_MCIF_WB_BUF_3_ADDR_C_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_Y_HIGH                                                           0x02e3
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_Y_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_C_HIGH                                                           0x02e4
#define mmMCIF_WB0_MCIF_WB_BUF_4_ADDR_C_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB0_MCIF_WB_BUF_1_RESOLUTION                                                            0x02e5
#define mmMCIF_WB0_MCIF_WB_BUF_1_RESOLUTION_BASE_IDX                                                   2
#define mmMCIF_WB0_MCIF_WB_BUF_2_RESOLUTION                                                            0x02e6
#define mmMCIF_WB0_MCIF_WB_BUF_2_RESOLUTION_BASE_IDX                                                   2
#define mmMCIF_WB0_MCIF_WB_BUF_3_RESOLUTION                                                            0x02e7
#define mmMCIF_WB0_MCIF_WB_BUF_3_RESOLUTION_BASE_IDX                                                   2
#define mmMCIF_WB0_MCIF_WB_BUF_4_RESOLUTION                                                            0x02e8
#define mmMCIF_WB0_MCIF_WB_BUF_4_RESOLUTION_BASE_IDX                                                   2


// addressBlock: dce_dc_mmhubbub_mcif_wb1_dispdec
// base address: 0x100
#define mmMCIF_WB1_MCIF_WB_BUFMGR_SW_CONTROL                                                           0x02f2
#define mmMCIF_WB1_MCIF_WB_BUFMGR_SW_CONTROL_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_BUFMGR_CUR_LINE_R                                                           0x02f3
#define mmMCIF_WB1_MCIF_WB_BUFMGR_CUR_LINE_R_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_BUFMGR_STATUS                                                               0x02f4
#define mmMCIF_WB1_MCIF_WB_BUFMGR_STATUS_BASE_IDX                                                      2
#define mmMCIF_WB1_MCIF_WB_BUF_PITCH                                                                   0x02f5
#define mmMCIF_WB1_MCIF_WB_BUF_PITCH_BASE_IDX                                                          2
#define mmMCIF_WB1_MCIF_WB_BUF_1_STATUS                                                                0x02f6
#define mmMCIF_WB1_MCIF_WB_BUF_1_STATUS_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_1_STATUS2                                                               0x02f7
#define mmMCIF_WB1_MCIF_WB_BUF_1_STATUS2_BASE_IDX                                                      2
#define mmMCIF_WB1_MCIF_WB_BUF_2_STATUS                                                                0x02f8
#define mmMCIF_WB1_MCIF_WB_BUF_2_STATUS_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_2_STATUS2                                                               0x02f9
#define mmMCIF_WB1_MCIF_WB_BUF_2_STATUS2_BASE_IDX                                                      2
#define mmMCIF_WB1_MCIF_WB_BUF_3_STATUS                                                                0x02fa
#define mmMCIF_WB1_MCIF_WB_BUF_3_STATUS_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_3_STATUS2                                                               0x02fb
#define mmMCIF_WB1_MCIF_WB_BUF_3_STATUS2_BASE_IDX                                                      2
#define mmMCIF_WB1_MCIF_WB_BUF_4_STATUS                                                                0x02fc
#define mmMCIF_WB1_MCIF_WB_BUF_4_STATUS_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_4_STATUS2                                                               0x02fd
#define mmMCIF_WB1_MCIF_WB_BUF_4_STATUS2_BASE_IDX                                                      2
#define mmMCIF_WB1_MCIF_WB_ARBITRATION_CONTROL                                                         0x02fe
#define mmMCIF_WB1_MCIF_WB_ARBITRATION_CONTROL_BASE_IDX                                                2
#define mmMCIF_WB1_MCIF_WB_SCLK_CHANGE                                                                 0x02ff
#define mmMCIF_WB1_MCIF_WB_SCLK_CHANGE_BASE_IDX                                                        2
#define mmMCIF_WB1_MCIF_WB_TEST_DEBUG_INDEX                                                            0x0300
#define mmMCIF_WB1_MCIF_WB_TEST_DEBUG_INDEX_BASE_IDX                                                   2
#define mmMCIF_WB1_MCIF_WB_TEST_DEBUG_DATA                                                             0x0301
#define mmMCIF_WB1_MCIF_WB_TEST_DEBUG_DATA_BASE_IDX                                                    2
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y                                                                0x0302
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_OFFSET                                                         0x0303
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_C                                                                0x0304
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_C_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_C_OFFSET                                                         0x0305
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_C_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_Y                                                                0x0306
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_Y_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_Y_OFFSET                                                         0x0307
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_Y_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_C                                                                0x0308
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_C_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_C_OFFSET                                                         0x0309
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_C_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_Y                                                                0x030a
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_Y_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_Y_OFFSET                                                         0x030b
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_Y_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_C                                                                0x030c
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_C_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_C_OFFSET                                                         0x030d
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_C_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_Y                                                                0x030e
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_Y_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_Y_OFFSET                                                         0x030f
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_Y_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_C                                                                0x0310
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_C_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_C_OFFSET                                                         0x0311
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_C_OFFSET_BASE_IDX                                                2
#define mmMCIF_WB1_MCIF_WB_BUFMGR_VCE_CONTROL                                                          0x0312
#define mmMCIF_WB1_MCIF_WB_BUFMGR_VCE_CONTROL_BASE_IDX                                                 2
#define mmMCIF_WB1_MCIF_WB_NB_PSTATE_LATENCY_WATERMARK                                                 0x0313
#define mmMCIF_WB1_MCIF_WB_NB_PSTATE_LATENCY_WATERMARK_BASE_IDX                                        2
#define mmMCIF_WB1_MCIF_WB_NB_PSTATE_CONTROL                                                           0x0314
#define mmMCIF_WB1_MCIF_WB_NB_PSTATE_CONTROL_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_WATERMARK                                                                   0x0315
#define mmMCIF_WB1_MCIF_WB_WATERMARK_BASE_IDX                                                          2
#define mmMCIF_WB1_MCIF_WB_CLOCK_GATER_CONTROL                                                         0x0316
#define mmMCIF_WB1_MCIF_WB_CLOCK_GATER_CONTROL_BASE_IDX                                                2
#define mmMCIF_WB1_MCIF_WB_WARM_UP_CNTL                                                                0x0317
#define mmMCIF_WB1_MCIF_WB_WARM_UP_CNTL_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL                                                        0x0318
#define mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX                                               2
#define mmMCIF_WB1_MULTI_LEVEL_QOS_CTRL                                                                0x0319
#define mmMCIF_WB1_MULTI_LEVEL_QOS_CTRL_BASE_IDX                                                       2
#define mmMCIF_WB1_MCIF_WB_BUF_LUMA_SIZE                                                               0x031b
#define mmMCIF_WB1_MCIF_WB_BUF_LUMA_SIZE_BASE_IDX                                                      2
#define mmMCIF_WB1_MCIF_WB_BUF_CHROMA_SIZE                                                             0x031c
#define mmMCIF_WB1_MCIF_WB_BUF_CHROMA_SIZE_BASE_IDX                                                    2
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_HIGH                                                           0x031d
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_Y_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_C_HIGH                                                           0x031e
#define mmMCIF_WB1_MCIF_WB_BUF_1_ADDR_C_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_Y_HIGH                                                           0x031f
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_Y_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_C_HIGH                                                           0x0320
#define mmMCIF_WB1_MCIF_WB_BUF_2_ADDR_C_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_Y_HIGH                                                           0x0321
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_Y_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_C_HIGH                                                           0x0322
#define mmMCIF_WB1_MCIF_WB_BUF_3_ADDR_C_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_Y_HIGH                                                           0x0323
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_Y_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_C_HIGH                                                           0x0324
#define mmMCIF_WB1_MCIF_WB_BUF_4_ADDR_C_HIGH_BASE_IDX                                                  2
#define mmMCIF_WB1_MCIF_WB_BUF_1_RESOLUTION                                                            0x0325
#define mmMCIF_WB1_MCIF_WB_BUF_1_RESOLUTION_BASE_IDX                                                   2
#define mmMCIF_WB1_MCIF_WB_BUF_2_RESOLUTION                                                            0x0326
#define mmMCIF_WB1_MCIF_WB_BUF_2_RESOLUTION_BASE_IDX                                                   2
#define mmMCIF_WB1_MCIF_WB_BUF_3_RESOLUTION                                                            0x0327
#define mmMCIF_WB1_MCIF_WB_BUF_3_RESOLUTION_BASE_IDX                                                   2
#define mmMCIF_WB1_MCIF_WB_BUF_4_RESOLUTION                                                            0x0328
#define mmMCIF_WB1_MCIF_WB_BUF_4_RESOLUTION_BASE_IDX                                                   2


// addressBlock: dce_dc_mmhubbub_mmhubbub_dispdec
// base address: 0x0
#define mmWBIF0_MISC_CTRL                                                                              0x0333
#define mmWBIF0_MISC_CTRL_BASE_IDX                                                                     2
#define mmWBIF0_SMU_WM_CONTROL                                                                         0x0334
#define mmWBIF0_SMU_WM_CONTROL_BASE_IDX                                                                2
#define mmWBIF0_PHASE0_OUTSTANDING_COUNTER                                                             0x0335
#define mmWBIF0_PHASE0_OUTSTANDING_COUNTER_BASE_IDX                                                    2
#define mmWBIF0_PHASE1_OUTSTANDING_COUNTER                                                             0x0336
#define mmWBIF0_PHASE1_OUTSTANDING_COUNTER_BASE_IDX                                                    2
#define mmVGA_SRC_SPLIT_CNTL                                                                           0x033f
#define mmVGA_SRC_SPLIT_CNTL_BASE_IDX                                                                  2
#define mmMMHUBBUB_MEM_PWR_STATUS                                                                      0x0340
#define mmMMHUBBUB_MEM_PWR_STATUS_BASE_IDX                                                             2
#define mmMMHUBBUB_MEM_PWR_CNTL                                                                        0x0341
#define mmMMHUBBUB_MEM_PWR_CNTL_BASE_IDX                                                               2
#define mmMMHUBBUB_CLOCK_CNTL                                                                          0x0342
#define mmMMHUBBUB_CLOCK_CNTL_BASE_IDX                                                                 2
#define mmMMHUBBUB_SOFT_RESET                                                                          0x0343
#define mmMMHUBBUB_SOFT_RESET_BASE_IDX                                                                 2
#define mmDMU_IF_ERR_STATUS                                                                            0x0347
#define mmDMU_IF_ERR_STATUS_BASE_IDX                                                                   2
#define mmMMHUBBUB_CLIENT_UNIT_ID                                                                      0x0348
#define mmMMHUBBUB_CLIENT_UNIT_ID_BASE_IDX                                                             2


// addressBlock: dce_dc_mmhubbub_vgaif_dispdec
// base address: 0x0
#define mmMCIF_CONTROL                                                                                 0x034a
#define mmMCIF_CONTROL_BASE_IDX                                                                        2
#define mmMCIF_WRITE_COMBINE_CONTROL                                                                   0x034b
#define mmMCIF_WRITE_COMBINE_CONTROL_BASE_IDX                                                          2
#define mmMCIF_PHASE0_OUTSTANDING_COUNTER                                                              0x034e
#define mmMCIF_PHASE0_OUTSTANDING_COUNTER_BASE_IDX                                                     2
#define mmMCIF_PHASE1_OUTSTANDING_COUNTER                                                              0x034f
#define mmMCIF_PHASE1_OUTSTANDING_COUNTER_BASE_IDX                                                     2
#define mmMCIF_PHASE2_OUTSTANDING_COUNTER                                                              0x0350
#define mmMCIF_PHASE2_OUTSTANDING_COUNTER_BASE_IDX                                                     2


// addressBlock: dce_dc_mmhubbub_mmhubbub_dcperfmon_dc_perfmon_dispdec
// base address: 0xd48
#define mmDC_PERFMON4_PERFCOUNTER_CNTL                                                                 0x0352
#define mmDC_PERFMON4_PERFCOUNTER_CNTL_BASE_IDX                                                        2
#define mmDC_PERFMON4_PERFCOUNTER_CNTL2                                                                0x0353
#define mmDC_PERFMON4_PERFCOUNTER_CNTL2_BASE_IDX                                                       2
#define mmDC_PERFMON4_PERFCOUNTER_STATE                                                                0x0354
#define mmDC_PERFMON4_PERFCOUNTER_STATE_BASE_IDX                                                       2
#define mmDC_PERFMON4_PERFMON_CNTL                                                                     0x0355
#define mmDC_PERFMON4_PERFMON_CNTL_BASE_IDX                                                            2
#define mmDC_PERFMON4_PERFMON_CNTL2                                                                    0x0356
#define mmDC_PERFMON4_PERFMON_CNTL2_BASE_IDX                                                           2
#define mmDC_PERFMON4_PERFMON_CVALUE_INT_MISC                                                          0x0357
#define mmDC_PERFMON4_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                 2
#define mmDC_PERFMON4_PERFMON_CVALUE_LOW                                                               0x0358
#define mmDC_PERFMON4_PERFMON_CVALUE_LOW_BASE_IDX                                                      2
#define mmDC_PERFMON4_PERFMON_HI                                                                       0x0359
#define mmDC_PERFMON4_PERFMON_HI_BASE_IDX                                                              2
#define mmDC_PERFMON4_PERFMON_LOW                                                                      0x035a
#define mmDC_PERFMON4_PERFMON_LOW_BASE_IDX                                                             2


// addressBlock: dce_dc_hda_azf0stream0_dispdec
// base address: 0x0
#define mmAZF0STREAM0_AZALIA_STREAM_INDEX                                                              0x035e
#define mmAZF0STREAM0_AZALIA_STREAM_INDEX_BASE_IDX                                                     2
#define mmAZF0STREAM0_AZALIA_STREAM_DATA                                                               0x035f
#define mmAZF0STREAM0_AZALIA_STREAM_DATA_BASE_IDX                                                      2


// addressBlock: dce_dc_hda_azf0stream1_dispdec
// base address: 0x8
#define mmAZF0STREAM1_AZALIA_STREAM_INDEX                                                              0x0360
#define mmAZF0STREAM1_AZALIA_STREAM_INDEX_BASE_IDX                                                     2
#define mmAZF0STREAM1_AZALIA_STREAM_DATA                                                               0x0361
#define mmAZF0STREAM1_AZALIA_STREAM_DATA_BASE_IDX                                                      2


// addressBlock: dce_dc_hda_azf0stream2_dispdec
// base address: 0x10
#define mmAZF0STREAM2_AZALIA_STREAM_INDEX                                                              0x0362
#define mmAZF0STREAM2_AZALIA_STREAM_INDEX_BASE_IDX                                                     2
#define mmAZF0STREAM2_AZALIA_STREAM_DATA                                                               0x0363
#define mmAZF0STREAM2_AZALIA_STREAM_DATA_BASE_IDX                                                      2


// addressBlock: dce_dc_hda_azf0stream3_dispdec
// base address: 0x18
#define mmAZF0STREAM3_AZALIA_STREAM_INDEX                                                              0x0364
#define mmAZF0STREAM3_AZALIA_STREAM_INDEX_BASE_IDX                                                     2
#define mmAZF0STREAM3_AZALIA_STREAM_DATA                                                               0x0365
#define mmAZF0STREAM3_AZALIA_STREAM_DATA_BASE_IDX                                                      2


// addressBlock: dce_dc_hda_azf0stream4_dispdec
// base address: 0x20
#define mmAZF0STREAM4_AZALIA_STREAM_INDEX                                                              0x0366
#define mmAZF0STREAM4_AZALIA_STREAM_INDEX_BASE_IDX                                                     2
#define mmAZF0STREAM4_AZALIA_STREAM_DATA                                                               0x0367
#define mmAZF0STREAM4_AZALIA_STREAM_DATA_BASE_IDX                                                      2


// addressBlock: dce_dc_hda_azf0stream5_dispdec
// base address: 0x28
#define mmAZF0STREAM5_AZALIA_STREAM_INDEX                                                              0x0368
#define mmAZF0STREAM5_AZALIA_STREAM_INDEX_BASE_IDX                                                     2
#define mmAZF0STREAM5_AZALIA_STREAM_DATA                                                               0x0369
#define mmAZF0STREAM5_AZALIA_STREAM_DATA_BASE_IDX                                                      2


// addressBlock: dce_dc_hda_azf0stream6_dispdec
// base address: 0x30
#define mmAZF0STREAM6_AZALIA_STREAM_INDEX                                                              0x036a
#define mmAZF0STREAM6_AZALIA_STREAM_INDEX_BASE_IDX                                                     2
#define mmAZF0STREAM6_AZALIA_STREAM_DATA                                                               0x036b
#define mmAZF0STREAM6_AZALIA_STREAM_DATA_BASE_IDX                                                      2


// addressBlock: dce_dc_hda_azf0stream7_dispdec
// base address: 0x38
#define mmAZF0STREAM7_AZALIA_STREAM_INDEX                                                              0x036c
#define mmAZF0STREAM7_AZALIA_STREAM_INDEX_BASE_IDX                                                     2
#define mmAZF0STREAM7_AZALIA_STREAM_DATA                                                               0x036d
#define mmAZF0STREAM7_AZALIA_STREAM_DATA_BASE_IDX                                                      2


// addressBlock: dce_dc_hda_az_misc_dispdec
// base address: 0x0
#define mmAZ_CLOCK_CNTL                                                                                0x0372
#define mmAZ_CLOCK_CNTL_BASE_IDX                                                                       2


// addressBlock: dce_dc_hda_az_dcperfmon_dc_perfmon_dispdec
// base address: 0xde8
#define mmDC_PERFMON5_PERFCOUNTER_CNTL                                                                 0x037a
#define mmDC_PERFMON5_PERFCOUNTER_CNTL_BASE_IDX                                                        2
#define mmDC_PERFMON5_PERFCOUNTER_CNTL2                                                                0x037b
#define mmDC_PERFMON5_PERFCOUNTER_CNTL2_BASE_IDX                                                       2
#define mmDC_PERFMON5_PERFCOUNTER_STATE                                                                0x037c
#define mmDC_PERFMON5_PERFCOUNTER_STATE_BASE_IDX                                                       2
#define mmDC_PERFMON5_PERFMON_CNTL                                                                     0x037d
#define mmDC_PERFMON5_PERFMON_CNTL_BASE_IDX                                                            2
#define mmDC_PERFMON5_PERFMON_CNTL2                                                                    0x037e
#define mmDC_PERFMON5_PERFMON_CNTL2_BASE_IDX                                                           2
#define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC                                                          0x037f
#define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                 2
#define mmDC_PERFMON5_PERFMON_CVALUE_LOW                                                               0x0380
#define mmDC_PERFMON5_PERFMON_CVALUE_LOW_BASE_IDX                                                      2
#define mmDC_PERFMON5_PERFMON_HI                                                                       0x0381
#define mmDC_PERFMON5_PERFMON_HI_BASE_IDX                                                              2
#define mmDC_PERFMON5_PERFMON_LOW                                                                      0x0382
#define mmDC_PERFMON5_PERFMON_LOW_BASE_IDX                                                             2


// addressBlock: dce_dc_hda_azf0endpoint0_dispdec
// base address: 0x0
#define mmAZF0ENDPOINT0_AZALIA_F0_CODEC_ENDPOINT_INDEX                                                 0x0386
#define mmAZF0ENDPOINT0_AZALIA_F0_CODEC_ENDPOINT_INDEX_BASE_IDX                                        2
#define mmAZF0ENDPOINT0_AZALIA_F0_CODEC_ENDPOINT_DATA                                                  0x0387
#define mmAZF0ENDPOINT0_AZALIA_F0_CODEC_ENDPOINT_DATA_BASE_IDX                                         2


// addressBlock: dce_dc_hda_azf0endpoint1_dispdec
// base address: 0x18
#define mmAZF0ENDPOINT1_AZALIA_F0_CODEC_ENDPOINT_INDEX                                                 0x038c
#define mmAZF0ENDPOINT1_AZALIA_F0_CODEC_ENDPOINT_INDEX_BASE_IDX                                        2
#define mmAZF0ENDPOINT1_AZALIA_F0_CODEC_ENDPOINT_DATA                                                  0x038d
#define mmAZF0ENDPOINT1_AZALIA_F0_CODEC_ENDPOINT_DATA_BASE_IDX                                         2


// addressBlock: dce_dc_hda_azf0endpoint2_dispdec
// base address: 0x30
#define mmAZF0ENDPOINT2_AZALIA_F0_CODEC_ENDPOINT_INDEX                                                 0x0392
#define mmAZF0ENDPOINT2_AZALIA_F0_CODEC_ENDPOINT_INDEX_BASE_IDX                                        2
#define mmAZF0ENDPOINT2_AZALIA_F0_CODEC_ENDPOINT_DATA                                                  0x0393
#define mmAZF0ENDPOINT2_AZALIA_F0_CODEC_ENDPOINT_DATA_BASE_IDX                                         2


// addressBlock: dce_dc_hda_azf0endpoint3_dispdec
// base address: 0x48
#define mmAZF0ENDPOINT3_AZALIA_F0_CODEC_ENDPOINT_INDEX                                                 0x0398
#define mmAZF0ENDPOINT3_AZALIA_F0_CODEC_ENDPOINT_INDEX_BASE_IDX                                        2
#define mmAZF0ENDPOINT3_AZALIA_F0_CODEC_ENDPOINT_DATA                                                  0x0399
#define mmAZF0ENDPOINT3_AZALIA_F0_CODEC_ENDPOINT_DATA_BASE_IDX                                         2


// addressBlock: dce_dc_hda_azf0endpoint4_dispdec
// base address: 0x60
#define mmAZF0ENDPOINT4_AZALIA_F0_CODEC_ENDPOINT_INDEX                                                 0x039e
#define mmAZF0ENDPOINT4_AZALIA_F0_CODEC_ENDPOINT_INDEX_BASE_IDX                                        2
#define mmAZF0ENDPOINT4_AZALIA_F0_CODEC_ENDPOINT_DATA                                                  0x039f
#define mmAZF0ENDPOINT4_AZALIA_F0_CODEC_ENDPOINT_DATA_BASE_IDX                                         2


// addressBlock: dce_dc_hda_azf0endpoint5_dispdec
// base address: 0x78
#define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX                                                 0x03a4
#define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX_BASE_IDX                                        2
#define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_DATA                                                  0x03a5
#define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_DATA_BASE_IDX                                         2


// addressBlock: dce_dc_hda_azf0endpoint6_dispdec
// base address: 0x90
#define mmAZF0ENDPOINT6_AZALIA_F0_CODEC_ENDPOINT_INDEX                                                 0x03aa
#define mmAZF0ENDPOINT6_AZALIA_F0_CODEC_ENDPOINT_INDEX_BASE_IDX                                        2
#define mmAZF0ENDPOINT6_AZALIA_F0_CODEC_ENDPOINT_DATA                                                  0x03ab
#define mmAZF0ENDPOINT6_AZALIA_F0_CODEC_ENDPOINT_DATA_BASE_IDX                                         2


// addressBlock: dce_dc_hda_azf0endpoint7_dispdec
// base address: 0xa8
#define mmAZF0ENDPOINT7_AZALIA_F0_CODEC_ENDPOINT_INDEX                                                 0x03b0
#define mmAZF0ENDPOINT7_AZALIA_F0_CODEC_ENDPOINT_INDEX_BASE_IDX                                        2
#define mmAZF0ENDPOINT7_AZALIA_F0_CODEC_ENDPOINT_DATA                                                  0x03b1
#define mmAZF0ENDPOINT7_AZALIA_F0_CODEC_ENDPOINT_DATA_BASE_IDX                                         2


// addressBlock: dce_dc_hda_azf0controller_dispdec
// base address: 0x0
#define mmAZALIA_CONTROLLER_CLOCK_GATING                                                               0x03c2
#define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX                                                      2
#define mmAZALIA_AUDIO_DTO                                                                             0x03c3
#define mmAZALIA_AUDIO_DTO_BASE_IDX                                                                    2
#define mmAZALIA_AUDIO_DTO_CONTROL                                                                     0x03c4
#define mmAZALIA_AUDIO_DTO_CONTROL_BASE_IDX                                                            2
#define mmAZALIA_SOCCLK_CONTROL                                                                        0x03c5
#define mmAZALIA_SOCCLK_CONTROL_BASE_IDX                                                               2
#define mmAZALIA_UNDERFLOW_FILLER_SAMPLE                                                               0x03c6
#define mmAZALIA_UNDERFLOW_FILLER_SAMPLE_BASE_IDX                                                      2
#define mmAZALIA_DATA_DMA_CONTROL                                                                      0x03c7
#define mmAZALIA_DATA_DMA_CONTROL_BASE_IDX                                                             2
#define mmAZALIA_BDL_DMA_CONTROL                                                                       0x03c8
#define mmAZALIA_BDL_DMA_CONTROL_BASE_IDX                                                              2
#define mmAZALIA_RIRB_AND_DP_CONTROL                                                                   0x03c9
#define mmAZALIA_RIRB_AND_DP_CONTROL_BASE_IDX                                                          2
#define mmAZALIA_CORB_DMA_CONTROL                                                                      0x03ca
#define mmAZALIA_CORB_DMA_CONTROL_BASE_IDX                                                             2
#define mmAZALIA_APPLICATION_POSITION_IN_CYCLIC_BUFFER                                                 0x03d1
#define mmAZALIA_APPLICATION_POSITION_IN_CYCLIC_BUFFER_BASE_IDX                                        2
#define mmAZALIA_CYCLIC_BUFFER_SYNC                                                                    0x03d2
#define mmAZALIA_CYCLIC_BUFFER_SYNC_BASE_IDX                                                           2
#define mmAZALIA_GLOBAL_CAPABILITIES                                                                   0x03d3
#define mmAZALIA_GLOBAL_CAPABILITIES_BASE_IDX                                                          2
#define mmAZALIA_OUTPUT_PAYLOAD_CAPABILITY                                                             0x03d4
#define mmAZALIA_OUTPUT_PAYLOAD_CAPABILITY_BASE_IDX                                                    2
#define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL                                                         0x03d5
#define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL_BASE_IDX                                                2
#define mmAZALIA_INPUT_PAYLOAD_CAPABILITY                                                              0x03d6
#define mmAZALIA_INPUT_PAYLOAD_CAPABILITY_BASE_IDX                                                     2
#define mmAZALIA_INPUT_CRC0_CONTROL0                                                                   0x03d9
#define mmAZALIA_INPUT_CRC0_CONTROL0_BASE_IDX                                                          2
#define mmAZALIA_INPUT_CRC0_CONTROL1                                                                   0x03da
#define mmAZALIA_INPUT_CRC0_CONTROL1_BASE_IDX                                                          2
#define mmAZALIA_INPUT_CRC0_CONTROL2                                                                   0x03db
#define mmAZALIA_INPUT_CRC0_CONTROL2_BASE_IDX                                                          2
#define mmAZALIA_INPUT_CRC0_CONTROL3                                                                   0x03dc
#define mmAZALIA_INPUT_CRC0_CONTROL3_BASE_IDX                                                          2
#define mmAZALIA_INPUT_CRC0_RESULT                                                                     0x03dd
#define mmAZALIA_INPUT_CRC0_RESULT_BASE_IDX                                                            2
#define mmAZALIA_INPUT_CRC1_CONTROL0                                                                   0x03de
#define mmAZALIA_INPUT_CRC1_CONTROL0_BASE_IDX                                                          2
#define mmAZALIA_INPUT_CRC1_CONTROL1                                                                   0x03df
#define mmAZALIA_INPUT_CRC1_CONTROL1_BASE_IDX                                                          2
#define mmAZALIA_INPUT_CRC1_CONTROL2                                                                   0x03e0
#define mmAZALIA_INPUT_CRC1_CONTROL2_BASE_IDX                                                          2
#define mmAZALIA_INPUT_CRC1_CONTROL3                                                                   0x03e1
#define mmAZALIA_INPUT_CRC1_CONTROL3_BASE_IDX                                                          2
#define mmAZALIA_INPUT_CRC1_RESULT                                                                     0x03e2
#define mmAZALIA_INPUT_CRC1_RESULT_BASE_IDX                                                            2
#define mmAZALIA_CRC0_CONTROL0                                                                         0x03e3
#define mmAZALIA_CRC0_CONTROL0_BASE_IDX                                                                2
#define mmAZALIA_CRC0_CONTROL1                                                                         0x03e4
#define mmAZALIA_CRC0_CONTROL1_BASE_IDX                                                                2
#define mmAZALIA_CRC0_CONTROL2                                                                         0x03e5
#define mmAZALIA_CRC0_CONTROL2_BASE_IDX                                                                2
#define mmAZALIA_CRC0_CONTROL3                                                                         0x03e6
#define mmAZALIA_CRC0_CONTROL3_BASE_IDX                                                                2
#define mmAZALIA_CRC0_RESULT                                                                           0x03e7
#define mmAZALIA_CRC0_RESULT_BASE_IDX                                                                  2
#define mmAZALIA_CRC1_CONTROL0                                                                         0x03e8
#define mmAZALIA_CRC1_CONTROL0_BASE_IDX                                                                2
#define mmAZALIA_CRC1_CONTROL1                                                                         0x03e9
#define mmAZALIA_CRC1_CONTROL1_BASE_IDX                                                                2
#define mmAZALIA_CRC1_CONTROL2                                                                         0x03ea
#define mmAZALIA_CRC1_CONTROL2_BASE_IDX                                                                2
#define mmAZALIA_CRC1_CONTROL3                                                                         0x03eb
#define mmAZALIA_CRC1_CONTROL3_BASE_IDX                                                                2
#define mmAZALIA_CRC1_RESULT                                                                           0x03ec
#define mmAZALIA_CRC1_RESULT_BASE_IDX                                                                  2
#define mmAZALIA_MEM_PWR_CTRL                                                                          0x03ee
#define mmAZALIA_MEM_PWR_CTRL_BASE_IDX                                                                 2
#define mmAZALIA_MEM_PWR_STATUS                                                                        0x03ef
#define mmAZALIA_MEM_PWR_STATUS_BASE_IDX                                                               2


// addressBlock: dce_dc_hda_azf0root_dispdec
// base address: 0x0
#define mmAZALIA_F0_CODEC_ROOT_PARAMETER_VENDOR_AND_DEVICE_ID                                          0x0406
#define mmAZALIA_F0_CODEC_ROOT_PARAMETER_VENDOR_AND_DEVICE_ID_BASE_IDX                                 2
#define mmAZALIA_F0_CODEC_ROOT_PARAMETER_REVISION_ID                                                   0x0407
#define mmAZALIA_F0_CODEC_ROOT_PARAMETER_REVISION_ID_BASE_IDX                                          2
#define mmAZALIA_F0_CODEC_CHANNEL_COUNT_CONTROL                                                        0x0408
#define mmAZALIA_F0_CODEC_CHANNEL_COUNT_CONTROL_BASE_IDX                                               2
#define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL                                                          0x0409
#define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL_BASE_IDX                                                 2
#define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_GROUP_TYPE                                                0x040a
#define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_GROUP_TYPE_BASE_IDX                                       2
#define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES                                      0x040b
#define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES_BASE_IDX                             2
#define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS                                            0x040c
#define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS_BASE_IDX                                   2
#define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES                                              0x040d
#define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES_BASE_IDX                                     2
#define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE                                                 0x040e
#define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE_BASE_IDX                                        2
#define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET                                                       0x040f
#define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET_BASE_IDX                                              2
#define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID                                       0x0410
#define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID_BASE_IDX                              2
#define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_CONVERTER_SYNCHRONIZATION                                   0x0411
#define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_CONVERTER_SYNCHRONIZATION_BASE_IDX                          2
#define mmCC_RCU_DC_AUDIO_PORT_CONNECTIVITY                                                            0x0412
#define mmCC_RCU_DC_AUDIO_PORT_CONNECTIVITY_BASE_IDX                                                   2
#define mmCC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY                                                      0x0413
#define mmCC_RCU_DC_AUDIO_INPUT_PORT_CONNECTIVITY_BASE_IDX                                             2
#define mmAZALIA_F0_GTC_GROUP_OFFSET0                                                                  0x0415
#define mmAZALIA_F0_GTC_GROUP_OFFSET0_BASE_IDX                                                         2
#define mmAZALIA_F0_GTC_GROUP_OFFSET1                                                                  0x0416
#define mmAZALIA_F0_GTC_GROUP_OFFSET1_BASE_IDX                                                         2
#define mmAZALIA_F0_GTC_GROUP_OFFSET2                                                                  0x0417
#define mmAZALIA_F0_GTC_GROUP_OFFSET2_BASE_IDX                                                         2
#define mmAZALIA_F0_GTC_GROUP_OFFSET3                                                                  0x0418
#define mmAZALIA_F0_GTC_GROUP_OFFSET3_BASE_IDX                                                         2
#define mmAZALIA_F0_GTC_GROUP_OFFSET4                                                                  0x0419
#define mmAZALIA_F0_GTC_GROUP_OFFSET4_BASE_IDX                                                         2
#define mmAZALIA_F0_GTC_GROUP_OFFSET5                                                                  0x041a
#define mmAZALIA_F0_GTC_GROUP_OFFSET5_BASE_IDX                                                         2
#define mmAZALIA_F0_GTC_GROUP_OFFSET6                                                                  0x041b
#define mmAZALIA_F0_GTC_GROUP_OFFSET6_BASE_IDX                                                         2
#define mmREG_DC_AUDIO_PORT_CONNECTIVITY                                                               0x041c
#define mmREG_DC_AUDIO_PORT_CONNECTIVITY_BASE_IDX                                                      2
#define mmREG_DC_AUDIO_INPUT_PORT_CONNECTIVITY                                                         0x041d
#define mmREG_DC_AUDIO_INPUT_PORT_CONNECTIVITY_BASE_IDX                                                2


// addressBlock: dce_dc_hda_azf0stream8_dispdec
// base address: 0x320
#define mmAZF0STREAM8_AZALIA_STREAM_INDEX                                                              0x0426
#define mmAZF0STREAM8_AZALIA_STREAM_INDEX_BASE_IDX                                                     2
#define mmAZF0STREAM8_AZALIA_STREAM_DATA                                                               0x0427
#define mmAZF0STREAM8_AZALIA_STREAM_DATA_BASE_IDX                                                      2


// addressBlock: dce_dc_hda_azf0stream9_dispdec
// base address: 0x328
#define mmAZF0STREAM9_AZALIA_STREAM_INDEX                                                              0x0428
#define mmAZF0STREAM9_AZALIA_STREAM_INDEX_BASE_IDX                                                     2
#define mmAZF0STREAM9_AZALIA_STREAM_DATA                                                               0x0429
#define mmAZF0STREAM9_AZALIA_STREAM_DATA_BASE_IDX                                                      2


// addressBlock: dce_dc_hda_azf0stream10_dispdec
// base address: 0x330
#define mmAZF0STREAM10_AZALIA_STREAM_INDEX                                                             0x042a
#define mmAZF0STREAM10_AZALIA_STREAM_INDEX_BASE_IDX                                                    2
#define mmAZF0STREAM10_AZALIA_STREAM_DATA                                                              0x042b
#define mmAZF0STREAM10_AZALIA_STREAM_DATA_BASE_IDX                                                     2


// addressBlock: dce_dc_hda_azf0stream11_dispdec
// base address: 0x338
#define mmAZF0STREAM11_AZALIA_STREAM_INDEX                                                             0x042c
#define mmAZF0STREAM11_AZALIA_STREAM_INDEX_BASE_IDX                                                    2
#define mmAZF0STREAM11_AZALIA_STREAM_DATA                                                              0x042d
#define mmAZF0STREAM11_AZALIA_STREAM_DATA_BASE_IDX                                                     2


// addressBlock: dce_dc_hda_azf0stream12_dispdec
// base address: 0x340
#define mmAZF0STREAM12_AZALIA_STREAM_INDEX                                                             0x042e
#define mmAZF0STREAM12_AZALIA_STREAM_INDEX_BASE_IDX                                                    2
#define mmAZF0STREAM12_AZALIA_STREAM_DATA                                                              0x042f
#define mmAZF0STREAM12_AZALIA_STREAM_DATA_BASE_IDX                                                     2


// addressBlock: dce_dc_hda_azf0stream13_dispdec
// base address: 0x348
#define mmAZF0STREAM13_AZALIA_STREAM_INDEX                                                             0x0430
#define mmAZF0STREAM13_AZALIA_STREAM_INDEX_BASE_IDX                                                    2
#define mmAZF0STREAM13_AZALIA_STREAM_DATA                                                              0x0431
#define mmAZF0STREAM13_AZALIA_STREAM_DATA_BASE_IDX                                                     2


// addressBlock: dce_dc_hda_azf0stream14_dispdec
// base address: 0x350
#define mmAZF0STREAM14_AZALIA_STREAM_INDEX                                                             0x0432
#define mmAZF0STREAM14_AZALIA_STREAM_INDEX_BASE_IDX                                                    2
#define mmAZF0STREAM14_AZALIA_STREAM_DATA                                                              0x0433
#define mmAZF0STREAM14_AZALIA_STREAM_DATA_BASE_IDX                                                     2


// addressBlock: dce_dc_hda_azf0stream15_dispdec
// base address: 0x358
#define mmAZF0STREAM15_AZALIA_STREAM_INDEX                                                             0x0434
#define mmAZF0STREAM15_AZALIA_STREAM_INDEX_BASE_IDX                                                    2
#define mmAZF0STREAM15_AZALIA_STREAM_DATA                                                              0x0435
#define mmAZF0STREAM15_AZALIA_STREAM_DATA_BASE_IDX                                                     2


// addressBlock: dce_dc_hda_azf0inputendpoint0_dispdec
// base address: 0x0
#define mmAZF0INPUTENDPOINT0_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX                                      0x043a
#define mmAZF0INPUTENDPOINT0_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX_BASE_IDX                             2
#define mmAZF0INPUTENDPOINT0_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA                                       0x043b
#define mmAZF0INPUTENDPOINT0_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA_BASE_IDX                              2


// addressBlock: dce_dc_hda_azf0inputendpoint1_dispdec
// base address: 0x10
#define mmAZF0INPUTENDPOINT1_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX                                      0x043e
#define mmAZF0INPUTENDPOINT1_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX_BASE_IDX                             2
#define mmAZF0INPUTENDPOINT1_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA                                       0x043f
#define mmAZF0INPUTENDPOINT1_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA_BASE_IDX                              2


// addressBlock: dce_dc_hda_azf0inputendpoint2_dispdec
// base address: 0x20
#define mmAZF0INPUTENDPOINT2_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX                                      0x0442
#define mmAZF0INPUTENDPOINT2_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX_BASE_IDX                             2
#define mmAZF0INPUTENDPOINT2_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA                                       0x0443
#define mmAZF0INPUTENDPOINT2_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA_BASE_IDX                              2


// addressBlock: dce_dc_hda_azf0inputendpoint3_dispdec
// base address: 0x30
#define mmAZF0INPUTENDPOINT3_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX                                      0x0446
#define mmAZF0INPUTENDPOINT3_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX_BASE_IDX                             2
#define mmAZF0INPUTENDPOINT3_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA                                       0x0447
#define mmAZF0INPUTENDPOINT3_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA_BASE_IDX                              2


// addressBlock: dce_dc_hda_azf0inputendpoint4_dispdec
// base address: 0x40
#define mmAZF0INPUTENDPOINT4_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX                                      0x044a
#define mmAZF0INPUTENDPOINT4_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX_BASE_IDX                             2
#define mmAZF0INPUTENDPOINT4_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA                                       0x044b
#define mmAZF0INPUTENDPOINT4_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA_BASE_IDX                              2


// addressBlock: dce_dc_hda_azf0inputendpoint5_dispdec
// base address: 0x50
#define mmAZF0INPUTENDPOINT5_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX                                      0x044e
#define mmAZF0INPUTENDPOINT5_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX_BASE_IDX                             2
#define mmAZF0INPUTENDPOINT5_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA                                       0x044f
#define mmAZF0INPUTENDPOINT5_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA_BASE_IDX                              2


// addressBlock: dce_dc_hda_azf0inputendpoint6_dispdec
// base address: 0x60
#define mmAZF0INPUTENDPOINT6_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX                                      0x0452
#define mmAZF0INPUTENDPOINT6_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX_BASE_IDX                             2
#define mmAZF0INPUTENDPOINT6_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA                                       0x0453
#define mmAZF0INPUTENDPOINT6_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA_BASE_IDX                              2


// addressBlock: dce_dc_hda_azf0inputendpoint7_dispdec
// base address: 0x70
#define mmAZF0INPUTENDPOINT7_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX                                      0x0456
#define mmAZF0INPUTENDPOINT7_AZALIA_F0_CODEC_INPUT_ENDPOINT_INDEX_BASE_IDX                             2
#define mmAZF0INPUTENDPOINT7_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA                                       0x0457
#define mmAZF0INPUTENDPOINT7_AZALIA_F0_CODEC_INPUT_ENDPOINT_DATA_BASE_IDX                              2


// addressBlock: dce_dc_dchubbub_hubbub_sdpif_dispdec
// base address: 0x0
#define mmDCHUBBUB_SDPIF_CFG0                                                                          0x048f
#define mmDCHUBBUB_SDPIF_CFG0_BASE_IDX                                                                 2
#define mmVM_REQUEST_PHYSICAL                                                                          0x0490
#define mmVM_REQUEST_PHYSICAL_BASE_IDX                                                                 2
#define mmDCHUBBUB_FORCE_IO_STATUS_0                                                                   0x0491
#define mmDCHUBBUB_FORCE_IO_STATUS_0_BASE_IDX                                                          2
#define mmDCHUBBUB_FORCE_IO_STATUS_1                                                                   0x0492
#define mmDCHUBBUB_FORCE_IO_STATUS_1_BASE_IDX                                                          2
#define mmDCN_VM_FB_LOCATION_BASE                                                                      0x0493
#define mmDCN_VM_FB_LOCATION_BASE_BASE_IDX                                                             2
#define mmDCN_VM_FB_LOCATION_TOP                                                                       0x0494
#define mmDCN_VM_FB_LOCATION_TOP_BASE_IDX                                                              2
#define mmDCN_VM_FB_OFFSET                                                                             0x0495
#define mmDCN_VM_FB_OFFSET_BASE_IDX                                                                    2
#define mmDCN_VM_AGP_BOT                                                                               0x0496
#define mmDCN_VM_AGP_BOT_BASE_IDX                                                                      2
#define mmDCN_VM_AGP_TOP                                                                               0x0497
#define mmDCN_VM_AGP_TOP_BASE_IDX                                                                      2
#define mmDCN_VM_AGP_BASE                                                                              0x0498
#define mmDCN_VM_AGP_BASE_BASE_IDX                                                                     2
#define mmDCN_VM_LOCAL_HBM_ADDRESS_START                                                               0x0499
#define mmDCN_VM_LOCAL_HBM_ADDRESS_START_BASE_IDX                                                      2
#define mmDCN_VM_LOCAL_HBM_ADDRESS_END                                                                 0x049a
#define mmDCN_VM_LOCAL_HBM_ADDRESS_END_BASE_IDX                                                        2
#define mmDCN_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL                                                           0x049b
#define mmDCN_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL_BASE_IDX                                                  2
#define mmDCHUBBUB_SDPIF_PIPE_SEC_LVL                                                                  0x04b8
#define mmDCHUBBUB_SDPIF_PIPE_SEC_LVL_BASE_IDX                                                         2
#define mmDCHUBBUB_SDPIF_PIPE_DMDATA_SEC_LVL                                                           0x04b9
#define mmDCHUBBUB_SDPIF_PIPE_DMDATA_SEC_LVL_BASE_IDX                                                  2
#define mmDCHUBBUB_SDPIF_MEM_PWR_CTRL                                                                  0x04ba
#define mmDCHUBBUB_SDPIF_MEM_PWR_CTRL_BASE_IDX                                                         2
#define mmDCHUBBUB_SDPIF_MEM_PWR_STATUS                                                                0x04bb
#define mmDCHUBBUB_SDPIF_MEM_PWR_STATUS_BASE_IDX                                                       2
#define mmDCHUBBUB_SDPIF_CFG1                                                                          0x04bf
#define mmDCHUBBUB_SDPIF_CFG1_BASE_IDX                                                                 2


// addressBlock: dce_dc_dchubbub_hubbub_ret_path_dispdec
// base address: 0x0
#define mmDCHUBBUB_RET_PATH_DCC_CFG                                                                    0x04cf
#define mmDCHUBBUB_RET_PATH_DCC_CFG_BASE_IDX                                                           2
#define mmDCHUBBUB_RET_PATH_DCC_CFG0_0                                                                 0x04d0
#define mmDCHUBBUB_RET_PATH_DCC_CFG0_0_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG0_1                                                                 0x04d1
#define mmDCHUBBUB_RET_PATH_DCC_CFG0_1_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG1_0                                                                 0x04d2
#define mmDCHUBBUB_RET_PATH_DCC_CFG1_0_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG1_1                                                                 0x04d3
#define mmDCHUBBUB_RET_PATH_DCC_CFG1_1_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG2_0                                                                 0x04d4
#define mmDCHUBBUB_RET_PATH_DCC_CFG2_0_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG2_1                                                                 0x04d5
#define mmDCHUBBUB_RET_PATH_DCC_CFG2_1_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG3_0                                                                 0x04d6
#define mmDCHUBBUB_RET_PATH_DCC_CFG3_0_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG3_1                                                                 0x04d7
#define mmDCHUBBUB_RET_PATH_DCC_CFG3_1_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG4_0                                                                 0x04d8
#define mmDCHUBBUB_RET_PATH_DCC_CFG4_0_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG4_1                                                                 0x04d9
#define mmDCHUBBUB_RET_PATH_DCC_CFG4_1_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG5_0                                                                 0x04da
#define mmDCHUBBUB_RET_PATH_DCC_CFG5_0_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG5_1                                                                 0x04db
#define mmDCHUBBUB_RET_PATH_DCC_CFG5_1_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG6_0                                                                 0x04dc
#define mmDCHUBBUB_RET_PATH_DCC_CFG6_0_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG6_1                                                                 0x04dd
#define mmDCHUBBUB_RET_PATH_DCC_CFG6_1_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG7_0                                                                 0x04de
#define mmDCHUBBUB_RET_PATH_DCC_CFG7_0_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG7_1                                                                 0x04df
#define mmDCHUBBUB_RET_PATH_DCC_CFG7_1_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG8_0                                                                 0x04e0
#define mmDCHUBBUB_RET_PATH_DCC_CFG8_0_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG8_1                                                                 0x04e1
#define mmDCHUBBUB_RET_PATH_DCC_CFG8_1_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG9_0                                                                 0x04e2
#define mmDCHUBBUB_RET_PATH_DCC_CFG9_0_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG9_1                                                                 0x04e3
#define mmDCHUBBUB_RET_PATH_DCC_CFG9_1_BASE_IDX                                                        2
#define mmDCHUBBUB_RET_PATH_DCC_CFG10_0                                                                0x04e4
#define mmDCHUBBUB_RET_PATH_DCC_CFG10_0_BASE_IDX                                                       2
#define mmDCHUBBUB_RET_PATH_DCC_CFG10_1                                                                0x04e5
#define mmDCHUBBUB_RET_PATH_DCC_CFG10_1_BASE_IDX                                                       2
#define mmDCHUBBUB_RET_PATH_DCC_CFG11_0                                                                0x04e6
#define mmDCHUBBUB_RET_PATH_DCC_CFG11_0_BASE_IDX                                                       2
#define mmDCHUBBUB_RET_PATH_DCC_CFG11_1                                                                0x04e7
#define mmDCHUBBUB_RET_PATH_DCC_CFG11_1_BASE_IDX                                                       2
#define mmDCHUBBUB_RET_PATH_MEM_PWR_CTRL                                                               0x04ef
#define mmDCHUBBUB_RET_PATH_MEM_PWR_CTRL_BASE_IDX                                                      2
#define mmDCHUBBUB_RET_PATH_MEM_PWR_STATUS                                                             0x04f0
#define mmDCHUBBUB_RET_PATH_MEM_PWR_STATUS_BASE_IDX                                                    2
#define mmDCHUBBUB_CRC_CTRL                                                                            0x04f1
#define mmDCHUBBUB_CRC_CTRL_BASE_IDX                                                                   2
#define mmDCHUBBUB_CRC0_VAL_R_G                                                                        0x04f2
#define mmDCHUBBUB_CRC0_VAL_R_G_BASE_IDX                                                               2
#define mmDCHUBBUB_CRC0_VAL_B_A                                                                        0x04f3
#define mmDCHUBBUB_CRC0_VAL_B_A_BASE_IDX                                                               2
#define mmDCHUBBUB_CRC1_VAL_R_G                                                                        0x04f4
#define mmDCHUBBUB_CRC1_VAL_R_G_BASE_IDX                                                               2
#define mmDCHUBBUB_CRC1_VAL_B_A                                                                        0x04f5
#define mmDCHUBBUB_CRC1_VAL_B_A_BASE_IDX                                                               2


// addressBlock: dce_dc_dchubbub_hubbub_dispdec
// base address: 0x0
#define mmDCHUBBUB_ARB_DF_REQ_OUTSTAND                                                                 0x0505
#define mmDCHUBBUB_ARB_DF_REQ_OUTSTAND_BASE_IDX                                                        2
#define mmDCHUBBUB_ARB_SAT_LEVEL                                                                       0x0506
#define mmDCHUBBUB_ARB_SAT_LEVEL_BASE_IDX                                                              2
#define mmDCHUBBUB_ARB_QOS_FORCE                                                                       0x0507
#define mmDCHUBBUB_ARB_QOS_FORCE_BASE_IDX                                                              2
#define mmDCHUBBUB_ARB_DRAM_STATE_CNTL                                                                 0x0508
#define mmDCHUBBUB_ARB_DRAM_STATE_CNTL_BASE_IDX                                                        2
#define mmDCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A                                                        0x0509
#define mmDCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A_BASE_IDX                                               2
#define mmDCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A                                                    0x050a
#define mmDCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A_BASE_IDX                                           2
#define mmDCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A                                                      0x050b
#define mmDCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A_BASE_IDX                                             2
#define mmDCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A                                                       0x050c
#define mmDCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A_BASE_IDX                                              2
#define mmDCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A                                               0x050d
#define mmDCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A_BASE_IDX                                      2
#define mmDCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B                                                        0x050e
#define mmDCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B_BASE_IDX                                               2
#define mmDCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B                                                    0x050f
#define mmDCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B_BASE_IDX                                           2
#define mmDCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B                                                      0x0510
#define mmDCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B_BASE_IDX                                             2
#define mmDCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B                                                       0x0511
#define mmDCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B_BASE_IDX                                              2
#define mmDCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B                                               0x0512
#define mmDCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B_BASE_IDX                                      2
#define mmDCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C                                                        0x0513
#define mmDCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C_BASE_IDX                                               2
#define mmDCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C                                                    0x0514
#define mmDCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C_BASE_IDX                                           2
#define mmDCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C                                                      0x0515
#define mmDCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C_BASE_IDX                                             2
#define mmDCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C                                                       0x0516
#define mmDCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C_BASE_IDX                                              2
#define mmDCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C                                               0x0517
#define mmDCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C_BASE_IDX                                      2
#define mmDCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D                                                        0x0518
#define mmDCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D_BASE_IDX                                               2
#define mmDCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D                                                    0x0519
#define mmDCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D_BASE_IDX                                           2
#define mmDCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D                                                      0x051a
#define mmDCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D_BASE_IDX                                             2
#define mmDCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D                                                       0x051b
#define mmDCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D_BASE_IDX                                              2
#define mmDCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D                                               0x051c
#define mmDCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D_BASE_IDX                                      2
#define mmDCHUBBUB_ARB_WATERMARK_CHANGE_CNTL                                                           0x051d
#define mmDCHUBBUB_ARB_WATERMARK_CHANGE_CNTL_BASE_IDX                                                  2
#define mmDCHUBBUB_ARB_TIMEOUT_ENABLE                                                                  0x051e
#define mmDCHUBBUB_ARB_TIMEOUT_ENABLE_BASE_IDX                                                         2
#define mmDCHUBBUB_GLOBAL_TIMER_CNTL                                                                   0x051f
#define mmDCHUBBUB_GLOBAL_TIMER_CNTL_BASE_IDX                                                          2
#define mmSURFACE_CHECK0_ADDRESS_LSB                                                                   0x0520
#define mmSURFACE_CHECK0_ADDRESS_LSB_BASE_IDX                                                          2
#define mmSURFACE_CHECK0_ADDRESS_MSB                                                                   0x0521
#define mmSURFACE_CHECK0_ADDRESS_MSB_BASE_IDX                                                          2
#define mmSURFACE_CHECK1_ADDRESS_LSB                                                                   0x0522
#define mmSURFACE_CHECK1_ADDRESS_LSB_BASE_IDX                                                          2
#define mmSURFACE_CHECK1_ADDRESS_MSB                                                                   0x0523
#define mmSURFACE_CHECK1_ADDRESS_MSB_BASE_IDX                                                          2
#define mmSURFACE_CHECK2_ADDRESS_LSB                                                                   0x0524
#define mmSURFACE_CHECK2_ADDRESS_LSB_BASE_IDX                                                          2
#define mmSURFACE_CHECK2_ADDRESS_MSB                                                                   0x0525
#define mmSURFACE_CHECK2_ADDRESS_MSB_BASE_IDX                                                          2
#define mmSURFACE_CHECK3_ADDRESS_LSB                                                                   0x0526
#define mmSURFACE_CHECK3_ADDRESS_LSB_BASE_IDX                                                          2
#define mmSURFACE_CHECK3_ADDRESS_MSB                                                                   0x0527
#define mmSURFACE_CHECK3_ADDRESS_MSB_BASE_IDX                                                          2
#define mmVTG0_CONTROL                                                                                 0x0528
#define mmVTG0_CONTROL_BASE_IDX                                                                        2
#define mmVTG1_CONTROL                                                                                 0x0529
#define mmVTG1_CONTROL_BASE_IDX                                                                        2
#define mmVTG2_CONTROL                                                                                 0x052a
#define mmVTG2_CONTROL_BASE_IDX                                                                        2
#define mmVTG3_CONTROL                                                                                 0x052b
#define mmVTG3_CONTROL_BASE_IDX                                                                        2
#define mmVTG4_CONTROL                                                                                 0x052c
#define mmVTG4_CONTROL_BASE_IDX                                                                        2
#define mmVTG5_CONTROL                                                                                 0x052d
#define mmVTG5_CONTROL_BASE_IDX                                                                        2
#define mmDCHUBBUB_SOFT_RESET                                                                          0x052e
#define mmDCHUBBUB_SOFT_RESET_BASE_IDX                                                                 2
#define mmDCHUBBUB_CLOCK_CNTL                                                                          0x052f
#define mmDCHUBBUB_CLOCK_CNTL_BASE_IDX                                                                 2
#define mmDCFCLK_CNTL                                                                                  0x0530
#define mmDCFCLK_CNTL_BASE_IDX                                                                         2
#define mmDCHUBBUB_PERFORMANCE_MEASUREMENT_CNTL                                                        0x0531
#define mmDCHUBBUB_PERFORMANCE_MEASUREMENT_CNTL_BASE_IDX                                               2
#define mmDCHUBBUB_PERFORMANCE_MEASUREMENT_CNTL2                                                       0x0532
#define mmDCHUBBUB_PERFORMANCE_MEASUREMENT_CNTL2_BASE_IDX                                              2
#define mmDCHUBBUB_VLINE_SNAPSHOT                                                                      0x0533
#define mmDCHUBBUB_VLINE_SNAPSHOT_BASE_IDX                                                             2
#define mmDCHUBBUB_CTRL_STATUS                                                                         0x0534
#define mmDCHUBBUB_CTRL_STATUS_BASE_IDX                                                                2
#define mmDCHUBBUB_TIMEOUT_DETECTION_CTRL1                                                             0x053a
#define mmDCHUBBUB_TIMEOUT_DETECTION_CTRL1_BASE_IDX                                                    2
#define mmDCHUBBUB_TIMEOUT_DETECTION_CTRL2                                                             0x053b
#define mmDCHUBBUB_TIMEOUT_DETECTION_CTRL2_BASE_IDX                                                    2
#define mmDCHUBBUB_TIMEOUT_INTERRUPT_STATUS                                                            0x053c
#define mmDCHUBBUB_TIMEOUT_INTERRUPT_STATUS_BASE_IDX                                                   2
#define mmDCHUBBUB_TEST_DEBUG_INDEX                                                                    0x053d
#define mmDCHUBBUB_TEST_DEBUG_INDEX_BASE_IDX                                                           2
#define mmDCHUBBUB_TEST_DEBUG_DATA                                                                     0x053e
#define mmDCHUBBUB_TEST_DEBUG_DATA_BASE_IDX                                                            2
#define mmFMON_CTRL                                                                                    0x0548
#define mmFMON_CTRL_BASE_IDX                                                                           2


// addressBlock: dce_dc_dchubbub_dchubbub_dcperfmon_dc_perfmon_dispdec
// base address: 0x1534
#define mmDC_PERFMON6_PERFCOUNTER_CNTL                                                                 0x054d
#define mmDC_PERFMON6_PERFCOUNTER_CNTL_BASE_IDX                                                        2
#define mmDC_PERFMON6_PERFCOUNTER_CNTL2                                                                0x054e
#define mmDC_PERFMON6_PERFCOUNTER_CNTL2_BASE_IDX                                                       2
#define mmDC_PERFMON6_PERFCOUNTER_STATE                                                                0x054f
#define mmDC_PERFMON6_PERFCOUNTER_STATE_BASE_IDX                                                       2
#define mmDC_PERFMON6_PERFMON_CNTL                                                                     0x0550
#define mmDC_PERFMON6_PERFMON_CNTL_BASE_IDX                                                            2
#define mmDC_PERFMON6_PERFMON_CNTL2                                                                    0x0551
#define mmDC_PERFMON6_PERFMON_CNTL2_BASE_IDX                                                           2
#define mmDC_PERFMON6_PERFMON_CVALUE_INT_MISC                                                          0x0552
#define mmDC_PERFMON6_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                 2
#define mmDC_PERFMON6_PERFMON_CVALUE_LOW                                                               0x0553
#define mmDC_PERFMON6_PERFMON_CVALUE_LOW_BASE_IDX                                                      2
#define mmDC_PERFMON6_PERFMON_HI                                                                       0x0554
#define mmDC_PERFMON6_PERFMON_HI_BASE_IDX                                                              2
#define mmDC_PERFMON6_PERFMON_LOW                                                                      0x0555
#define mmDC_PERFMON6_PERFMON_LOW_BASE_IDX                                                             2


// addressBlock: dce_dc_dchubbub_hubbub_vmrq_if_dispdec
// base address: 0x0
#define mmDCN_VM_CONTEXT0_CNTL                                                                         0x0559
#define mmDCN_VM_CONTEXT0_CNTL_BASE_IDX                                                                2
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32                                                    0x055a
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32                                                    0x055b
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32                                                   0x055c
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32                                                   0x055d
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32                                                     0x055e
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32                                                     0x055f
#define mmDCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT1_CNTL                                                                         0x0560
#define mmDCN_VM_CONTEXT1_CNTL_BASE_IDX                                                                2
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32                                                    0x0561
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32                                                    0x0562
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32                                                   0x0563
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32                                                   0x0564
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32                                                     0x0565
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32                                                     0x0566
#define mmDCN_VM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT2_CNTL                                                                         0x0567
#define mmDCN_VM_CONTEXT2_CNTL_BASE_IDX                                                                2
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32                                                    0x0568
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32                                                    0x0569
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32                                                   0x056a
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32                                                   0x056b
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32                                                     0x056c
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32                                                     0x056d
#define mmDCN_VM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT3_CNTL                                                                         0x056e
#define mmDCN_VM_CONTEXT3_CNTL_BASE_IDX                                                                2
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32                                                    0x056f
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32                                                    0x0570
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32                                                   0x0571
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32                                                   0x0572
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32                                                     0x0573
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32                                                     0x0574
#define mmDCN_VM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT4_CNTL                                                                         0x0575
#define mmDCN_VM_CONTEXT4_CNTL_BASE_IDX                                                                2
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32                                                    0x0576
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32                                                    0x0577
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32                                                   0x0578
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32                                                   0x0579
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32                                                     0x057a
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32                                                     0x057b

#define mmDCN_VM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT5_CNTL                                                                         0x057c
#define mmDCN_VM_CONTEXT5_CNTL_BASE_IDX                                                                2
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32                                                    0x057d
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32                                                    0x057e
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32                                                   0x057f
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32                                                   0x0580
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32                                                     0x0581
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32                                                     0x0582
#define mmDCN_VM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT6_CNTL                                                                         0x0583
#define mmDCN_VM_CONTEXT6_CNTL_BASE_IDX                                                                2
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32                                                    0x0584
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32                                                    0x0585
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32                                                   0x0586
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32                                                   0x0587
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32                                                     0x0588
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32                                                     0x0589
#define mmDCN_VM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT7_CNTL                                                                         0x058a
#define mmDCN_VM_CONTEXT7_CNTL_BASE_IDX                                                                2
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32                                                    0x058b
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32                                                    0x058c
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32                                                   0x058d
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32                                                   0x058e
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32                                                     0x058f
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32                                                     0x0590
#define mmDCN_VM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT8_CNTL                                                                         0x0591
#define mmDCN_VM_CONTEXT8_CNTL_BASE_IDX                                                                2
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32                                                    0x0592
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32                                                    0x0593
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32                                                   0x0594
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32                                                   0x0595
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32                                                     0x0596
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32                                                     0x0597
#define mmDCN_VM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT9_CNTL                                                                         0x0598
#define mmDCN_VM_CONTEXT9_CNTL_BASE_IDX                                                                2
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32                                                    0x0599
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32                                                    0x059a
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32                                                   0x059b
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32                                                   0x059c
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32                                                     0x059d
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32                                                     0x059e
#define mmDCN_VM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                            2
#define mmDCN_VM_CONTEXT10_CNTL                                                                        0x059f
#define mmDCN_VM_CONTEXT10_CNTL_BASE_IDX                                                               2
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32                                                   0x05a0
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32                                                   0x05a1
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32                                                  0x05a2
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32                                                  0x05a3
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32                                                    0x05a4
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32                                                    0x05a5
#define mmDCN_VM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT11_CNTL                                                                        0x05a6
#define mmDCN_VM_CONTEXT11_CNTL_BASE_IDX                                                               2
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32                                                   0x05a7
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32                                                   0x05a8
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32                                                  0x05a9
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32                                                  0x05aa
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32                                                    0x05ab
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32                                                    0x05ac
#define mmDCN_VM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT12_CNTL                                                                        0x05ad
#define mmDCN_VM_CONTEXT12_CNTL_BASE_IDX                                                               2
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32                                                   0x05ae
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32                                                   0x05af
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32                                                  0x05b0
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32                                                  0x05b1
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32                                                    0x05b2
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32                                                    0x05b3
#define mmDCN_VM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT13_CNTL                                                                        0x05b4
#define mmDCN_VM_CONTEXT13_CNTL_BASE_IDX                                                               2
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32                                                   0x05b5
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32                                                   0x05b6
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32                                                  0x05b7
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32                                                  0x05b8
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32                                                    0x05b9
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32                                                    0x05ba
#define mmDCN_VM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT14_CNTL                                                                        0x05bb
#define mmDCN_VM_CONTEXT14_CNTL_BASE_IDX                                                               2
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32                                                   0x05bc
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32                                                   0x05bd
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32                                                  0x05be
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32                                                  0x05bf
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32                                                    0x05c0
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32                                                    0x05c1
#define mmDCN_VM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT15_CNTL                                                                        0x05c2
#define mmDCN_VM_CONTEXT15_CNTL_BASE_IDX                                                               2
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32                                                   0x05c3
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32                                                   0x05c4
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX                                          2
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32                                                  0x05c5
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32                                                  0x05c6
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32_BASE_IDX                                         2
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32                                                    0x05c7
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32_BASE_IDX                                           2
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32                                                    0x05c8
#define mmDCN_VM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32_BASE_IDX                                           2
#define mmDCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB                                                      0x05c9
#define mmDCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_BASE_IDX                                             2
#define mmDCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB                                                      0x05ca
#define mmDCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_BASE_IDX                                             2
#define mmDCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB                                                     0x05cb
#define mmDCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB_BASE_IDX                                            2
#define mmDCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB                                                     0x05cc
#define mmDCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB_BASE_IDX                                            2
#define mmDCN_VM_FAULT_CNTL                                                                            0x05cd
#define mmDCN_VM_FAULT_CNTL_BASE_IDX                                                                   2
#define mmDCN_VM_FAULT_STATUS                                                                          0x05ce
#define mmDCN_VM_FAULT_STATUS_BASE_IDX                                                                 2
#define mmDCN_VM_FAULT_ADDR_MSB                                                                        0x05cf
#define mmDCN_VM_FAULT_ADDR_MSB_BASE_IDX                                                               2
#define mmDCN_VM_FAULT_ADDR_LSB                                                                        0x05d0
#define mmDCN_VM_FAULT_ADDR_LSB_BASE_IDX                                                               2


// addressBlock: dce_dc_dcbubp0_dispdec_hubp_dispdec
// base address: 0x0
#define mmHUBP0_DCSURF_SURFACE_CONFIG                                                                  0x05e5
#define mmHUBP0_DCSURF_SURFACE_CONFIG_BASE_IDX                                                         2
#define mmHUBP0_DCSURF_ADDR_CONFIG                                                                     0x05e6
#define mmHUBP0_DCSURF_ADDR_CONFIG_BASE_IDX                                                            2
#define mmHUBP0_DCSURF_TILING_CONFIG                                                                   0x05e7
#define mmHUBP0_DCSURF_TILING_CONFIG_BASE_IDX                                                          2
#define mmHUBP0_DCSURF_PRI_VIEWPORT_START                                                              0x05e9
#define mmHUBP0_DCSURF_PRI_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION                                                          0x05ea
#define mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP0_DCSURF_PRI_VIEWPORT_START_C                                                            0x05eb
#define mmHUBP0_DCSURF_PRI_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_C                                                        0x05ec
#define mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP0_DCSURF_SEC_VIEWPORT_START                                                              0x05ed
#define mmHUBP0_DCSURF_SEC_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP0_DCSURF_SEC_VIEWPORT_DIMENSION                                                          0x05ee
#define mmHUBP0_DCSURF_SEC_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP0_DCSURF_SEC_VIEWPORT_START_C                                                            0x05ef
#define mmHUBP0_DCSURF_SEC_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP0_DCSURF_SEC_VIEWPORT_DIMENSION_C                                                        0x05f0
#define mmHUBP0_DCSURF_SEC_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP0_DCHUBP_REQ_SIZE_CONFIG                                                                 0x05f1
#define mmHUBP0_DCHUBP_REQ_SIZE_CONFIG_BASE_IDX                                                        2
#define mmHUBP0_DCHUBP_REQ_SIZE_CONFIG_C                                                               0x05f2
#define mmHUBP0_DCHUBP_REQ_SIZE_CONFIG_C_BASE_IDX                                                      2
#define mmHUBP0_DCHUBP_CNTL                                                                            0x05f3
#define mmHUBP0_DCHUBP_CNTL_BASE_IDX                                                                   2
#define mmHUBP0_HUBP_CLK_CNTL                                                                          0x05f4
#define mmHUBP0_HUBP_CLK_CNTL_BASE_IDX                                                                 2
#define mmHUBP0_DCHUBP_VMPG_CONFIG                                                                     0x05f5
#define mmHUBP0_DCHUBP_VMPG_CONFIG_BASE_IDX                                                            2
#define mmHUBP0_HUBPREQ_DEBUG_DB                                                                       0x05f6
#define mmHUBP0_HUBPREQ_DEBUG_DB_BASE_IDX                                                              2
#define mmHUBP0_HUBPREQ_DEBUG                                                                          0x05f7
#define mmHUBP0_HUBPREQ_DEBUG_BASE_IDX                                                                 2
#define mmHUBP0_HUBP_MEASURE_WIN_CTRL_DCFCLK                                                           0x05fb
#define mmHUBP0_HUBP_MEASURE_WIN_CTRL_DCFCLK_BASE_IDX                                                  2
#define mmHUBP0_HUBP_MEASURE_WIN_CTRL_DPPCLK                                                           0x05fc
#define mmHUBP0_HUBP_MEASURE_WIN_CTRL_DPPCLK_BASE_IDX                                                  2


// addressBlock: dce_dc_dcbubp0_dispdec_hubpreq_dispdec
// base address: 0x0
#define mmHUBPREQ0_DCSURF_SURFACE_PITCH                                                                0x0607
#define mmHUBPREQ0_DCSURF_SURFACE_PITCH_BASE_IDX                                                       2
#define mmHUBPREQ0_DCSURF_SURFACE_PITCH_C                                                              0x0608
#define mmHUBPREQ0_DCSURF_SURFACE_PITCH_C_BASE_IDX                                                     2
#define mmHUBPREQ0_VMID_SETTINGS_0                                                                     0x0609
#define mmHUBPREQ0_VMID_SETTINGS_0_BASE_IDX                                                            2
#define mmHUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS                                                      0x060a
#define mmHUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_BASE_IDX                                             2
#define mmHUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH                                                 0x060b
#define mmHUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                        2
#define mmHUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_C                                                    0x060c
#define mmHUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_C_BASE_IDX                                           2
#define mmHUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C                                               0x060d
#define mmHUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                      2
#define mmHUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS                                                    0x060e
#define mmHUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_BASE_IDX                                           2
#define mmHUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH                                               0x060f
#define mmHUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                      2
#define mmHUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_C                                                  0x0610
#define mmHUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_C_BASE_IDX                                         2
#define mmHUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C                                             0x0611
#define mmHUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                    2
#define mmHUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS                                                 0x0612
#define mmHUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_BASE_IDX                                        2
#define mmHUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH                                            0x0613
#define mmHUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                   2
#define mmHUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C                                               0x0614
#define mmHUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C_BASE_IDX                                      2
#define mmHUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C                                          0x0615
#define mmHUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                 2
#define mmHUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS                                               0x0616
#define mmHUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_BASE_IDX                                      2
#define mmHUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH                                          0x0617
#define mmHUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                 2
#define mmHUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C                                             0x0618
#define mmHUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C_BASE_IDX                                    2
#define mmHUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C                                        0x0619
#define mmHUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                               2
#define mmHUBPREQ0_DCSURF_SURFACE_CONTROL                                                              0x061a
#define mmHUBPREQ0_DCSURF_SURFACE_CONTROL_BASE_IDX                                                     2
#define mmHUBPREQ0_DCSURF_FLIP_CONTROL                                                                 0x061b
#define mmHUBPREQ0_DCSURF_FLIP_CONTROL_BASE_IDX                                                        2
#define mmHUBPREQ0_DCSURF_FLIP_CONTROL2                                                                0x061c
#define mmHUBPREQ0_DCSURF_FLIP_CONTROL2_BASE_IDX                                                       2
#define mmHUBPREQ0_DCSURF_QUEUE_CONTROL                                                                0x061d
#define mmHUBPREQ0_DCSURF_QUEUE_CONTROL_BASE_IDX                                                       2
#define mmHUBPREQ0_DCSURF_FRAME_PACING_TIME                                                            0x061e
#define mmHUBPREQ0_DCSURF_FRAME_PACING_TIME_BASE_IDX                                                   2
#define mmHUBPREQ0_SURFACE_CURRENT_PACING_COUNTER                                                      0x061f
#define mmHUBPREQ0_SURFACE_CURRENT_PACING_COUNTER_BASE_IDX                                             2
#define mmHUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT                                                       0x0620
#define mmHUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT_BASE_IDX                                              2
#define mmHUBPREQ0_DCSURF_SURFACE_INUSE                                                                0x0621
#define mmHUBPREQ0_DCSURF_SURFACE_INUSE_BASE_IDX                                                       2
#define mmHUBPREQ0_DCSURF_SURFACE_INUSE_HIGH                                                           0x0622
#define mmHUBPREQ0_DCSURF_SURFACE_INUSE_HIGH_BASE_IDX                                                  2
#define mmHUBPREQ0_DCSURF_SURFACE_INUSE_C                                                              0x0623
#define mmHUBPREQ0_DCSURF_SURFACE_INUSE_C_BASE_IDX                                                     2
#define mmHUBPREQ0_DCSURF_SURFACE_INUSE_HIGH_C                                                         0x0624
#define mmHUBPREQ0_DCSURF_SURFACE_INUSE_HIGH_C_BASE_IDX                                                2
#define mmHUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE                                                       0x0625
#define mmHUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_BASE_IDX                                              2
#define mmHUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH                                                  0x0626
#define mmHUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_BASE_IDX                                         2
#define mmHUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_C                                                     0x0627
#define mmHUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_C_BASE_IDX                                            2
#define mmHUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C                                                0x0628
#define mmHUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C_BASE_IDX                                       2
#define mmHUBPREQ0_DCN_EXPANSION_MODE                                                                  0x062c
#define mmHUBPREQ0_DCN_EXPANSION_MODE_BASE_IDX                                                         2
#define mmHUBPREQ0_DCN_TTU_QOS_WM                                                                      0x062d
#define mmHUBPREQ0_DCN_TTU_QOS_WM_BASE_IDX                                                             2
#define mmHUBPREQ0_DCN_GLOBAL_TTU_CNTL                                                                 0x062e
#define mmHUBPREQ0_DCN_GLOBAL_TTU_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ0_DCN_SURF0_TTU_CNTL0                                                                 0x062f
#define mmHUBPREQ0_DCN_SURF0_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ0_DCN_SURF0_TTU_CNTL1                                                                 0x0630
#define mmHUBPREQ0_DCN_SURF0_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ0_DCN_SURF1_TTU_CNTL0                                                                 0x0631
#define mmHUBPREQ0_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ0_DCN_SURF1_TTU_CNTL1                                                                 0x0632
#define mmHUBPREQ0_DCN_SURF1_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ0_DCN_CUR0_TTU_CNTL0                                                                  0x0633
#define mmHUBPREQ0_DCN_CUR0_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ0_DCN_CUR0_TTU_CNTL1                                                                  0x0634
#define mmHUBPREQ0_DCN_CUR0_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ0_DCN_CUR1_TTU_CNTL0                                                                  0x0635
#define mmHUBPREQ0_DCN_CUR1_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ0_DCN_CUR1_TTU_CNTL1                                                                  0x0636
#define mmHUBPREQ0_DCN_CUR1_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ0_DCN_VM_SYSTEM_APERTURE_LOW_ADDR                                                     0x0637
#define mmHUBPREQ0_DCN_VM_SYSTEM_APERTURE_LOW_ADDR_BASE_IDX                                            2
#define mmHUBPREQ0_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR                                                    0x0638
#define mmHUBPREQ0_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_BASE_IDX                                           2
#define mmHUBPREQ0_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB                                              0x0639
#define mmHUBPREQ0_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ0_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB                                              0x063a
#define mmHUBPREQ0_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ0_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB                                    0x063b
#define mmHUBPREQ0_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB_BASE_IDX                           2
#define mmHUBPREQ0_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB                                    0x063c
#define mmHUBPREQ0_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB_BASE_IDX                           2
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB                                             0x063d
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB_BASE_IDX                                    2
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB                                             0x063e
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB_BASE_IDX                                    2
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB                                            0x063f
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB                                            0x0640
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB_BASE_IDX                                   2
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB                                              0x0641
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB                                              0x0642
#define mmHUBPREQ0_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ0_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB                                            0x0643
#define mmHUBPREQ0_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ0_DC_VM_CONTEXT0_CNTL                                                                 0x0644
#define mmHUBPREQ0_DC_VM_CONTEXT0_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ0_DCN_VM_MX_L1_TLB_CNTL                                                               0x0645
#define mmHUBPREQ0_DCN_VM_MX_L1_TLB_CNTL_BASE_IDX                                                      2
#define mmHUBPREQ0_BLANK_OFFSET_0                                                                      0x0646
#define mmHUBPREQ0_BLANK_OFFSET_0_BASE_IDX                                                             2
#define mmHUBPREQ0_BLANK_OFFSET_1                                                                      0x0647
#define mmHUBPREQ0_BLANK_OFFSET_1_BASE_IDX                                                             2
#define mmHUBPREQ0_DST_DIMENSIONS                                                                      0x0648
#define mmHUBPREQ0_DST_DIMENSIONS_BASE_IDX                                                             2
#define mmHUBPREQ0_DST_AFTER_SCALER                                                                    0x0649
#define mmHUBPREQ0_DST_AFTER_SCALER_BASE_IDX                                                           2
#define mmHUBPREQ0_PREFETCH_SETTINGS                                                                   0x064a
#define mmHUBPREQ0_PREFETCH_SETTINGS_BASE_IDX                                                          2
#define mmHUBPREQ0_PREFETCH_SETTINGS_C                                                                 0x064b
#define mmHUBPREQ0_PREFETCH_SETTINGS_C_BASE_IDX                                                        2
#define mmHUBPREQ0_VBLANK_PARAMETERS_0                                                                 0x064c
#define mmHUBPREQ0_VBLANK_PARAMETERS_0_BASE_IDX                                                        2
#define mmHUBPREQ0_VBLANK_PARAMETERS_1                                                                 0x064d
#define mmHUBPREQ0_VBLANK_PARAMETERS_1_BASE_IDX                                                        2
#define mmHUBPREQ0_VBLANK_PARAMETERS_2                                                                 0x064e
#define mmHUBPREQ0_VBLANK_PARAMETERS_2_BASE_IDX                                                        2
#define mmHUBPREQ0_VBLANK_PARAMETERS_3                                                                 0x064f
#define mmHUBPREQ0_VBLANK_PARAMETERS_3_BASE_IDX                                                        2
#define mmHUBPREQ0_VBLANK_PARAMETERS_4                                                                 0x0650
#define mmHUBPREQ0_VBLANK_PARAMETERS_4_BASE_IDX                                                        2
#define mmHUBPREQ0_FLIP_PARAMETERS_0                                                                   0x0651
#define mmHUBPREQ0_FLIP_PARAMETERS_0_BASE_IDX                                                          2
#define mmHUBPREQ0_FLIP_PARAMETERS_1                                                                   0x0652
#define mmHUBPREQ0_FLIP_PARAMETERS_1_BASE_IDX                                                          2
#define mmHUBPREQ0_FLIP_PARAMETERS_2                                                                   0x0653
#define mmHUBPREQ0_FLIP_PARAMETERS_2_BASE_IDX                                                          2
#define mmHUBPREQ0_NOM_PARAMETERS_0                                                                    0x0654
#define mmHUBPREQ0_NOM_PARAMETERS_0_BASE_IDX                                                           2
#define mmHUBPREQ0_NOM_PARAMETERS_1                                                                    0x0655
#define mmHUBPREQ0_NOM_PARAMETERS_1_BASE_IDX                                                           2
#define mmHUBPREQ0_NOM_PARAMETERS_2                                                                    0x0656
#define mmHUBPREQ0_NOM_PARAMETERS_2_BASE_IDX                                                           2
#define mmHUBPREQ0_NOM_PARAMETERS_3                                                                    0x0657
#define mmHUBPREQ0_NOM_PARAMETERS_3_BASE_IDX                                                           2
#define mmHUBPREQ0_NOM_PARAMETERS_4                                                                    0x0658
#define mmHUBPREQ0_NOM_PARAMETERS_4_BASE_IDX                                                           2
#define mmHUBPREQ0_NOM_PARAMETERS_5                                                                    0x0659
#define mmHUBPREQ0_NOM_PARAMETERS_5_BASE_IDX                                                           2
#define mmHUBPREQ0_NOM_PARAMETERS_6                                                                    0x065a
#define mmHUBPREQ0_NOM_PARAMETERS_6_BASE_IDX                                                           2
#define mmHUBPREQ0_NOM_PARAMETERS_7                                                                    0x065b
#define mmHUBPREQ0_NOM_PARAMETERS_7_BASE_IDX                                                           2
#define mmHUBPREQ0_PER_LINE_DELIVERY_PRE                                                               0x065c
#define mmHUBPREQ0_PER_LINE_DELIVERY_PRE_BASE_IDX                                                      2
#define mmHUBPREQ0_PER_LINE_DELIVERY                                                                   0x065d
#define mmHUBPREQ0_PER_LINE_DELIVERY_BASE_IDX                                                          2
#define mmHUBPREQ0_CURSOR_SETTINGS                                                                     0x065e
#define mmHUBPREQ0_CURSOR_SETTINGS_BASE_IDX                                                            2
#define mmHUBPREQ0_REF_FREQ_TO_PIX_FREQ                                                                0x065f
#define mmHUBPREQ0_REF_FREQ_TO_PIX_FREQ_BASE_IDX                                                       2
#define mmHUBPREQ0_DST_Y_DELTA_DRQ_LIMIT                                                               0x0660
#define mmHUBPREQ0_DST_Y_DELTA_DRQ_LIMIT_BASE_IDX                                                      2
#define mmHUBPREQ0_HUBPREQ_MEM_PWR_CTRL                                                                0x0661
#define mmHUBPREQ0_HUBPREQ_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPREQ0_HUBPREQ_MEM_PWR_STATUS                                                              0x0662
#define mmHUBPREQ0_HUBPREQ_MEM_PWR_STATUS_BASE_IDX                                                     2


// addressBlock: dce_dc_dcbubp0_dispdec_hubpret_dispdec
// base address: 0x0
#define mmHUBPRET0_HUBPRET_CONTROL                                                                     0x066c
#define mmHUBPRET0_HUBPRET_CONTROL_BASE_IDX                                                            2
#define mmHUBPRET0_HUBPRET_MEM_PWR_CTRL                                                                0x066d
#define mmHUBPRET0_HUBPRET_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPRET0_HUBPRET_MEM_PWR_STATUS                                                              0x066e
#define mmHUBPRET0_HUBPRET_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmHUBPRET0_HUBPRET_READ_LINE_CTRL0                                                             0x066f
#define mmHUBPRET0_HUBPRET_READ_LINE_CTRL0_BASE_IDX                                                    2
#define mmHUBPRET0_HUBPRET_READ_LINE_CTRL1                                                             0x0670
#define mmHUBPRET0_HUBPRET_READ_LINE_CTRL1_BASE_IDX                                                    2
#define mmHUBPRET0_HUBPRET_READ_LINE0                                                                  0x0671
#define mmHUBPRET0_HUBPRET_READ_LINE0_BASE_IDX                                                         2
#define mmHUBPRET0_HUBPRET_READ_LINE1                                                                  0x0672
#define mmHUBPRET0_HUBPRET_READ_LINE1_BASE_IDX                                                         2
#define mmHUBPRET0_HUBPRET_INTERRUPT                                                                   0x0673
#define mmHUBPRET0_HUBPRET_INTERRUPT_BASE_IDX                                                          2
#define mmHUBPRET0_HUBPRET_READ_LINE_VALUE                                                             0x0674
#define mmHUBPRET0_HUBPRET_READ_LINE_VALUE_BASE_IDX                                                    2
#define mmHUBPRET0_HUBPRET_READ_LINE_STATUS                                                            0x0675
#define mmHUBPRET0_HUBPRET_READ_LINE_STATUS_BASE_IDX                                                   2


// addressBlock: dce_dc_dcbubp0_dispdec_cursor0_dispdec
// base address: 0x0
#define mmCURSOR0_0_CURSOR_CONTROL                                                                     0x0678
#define mmCURSOR0_0_CURSOR_CONTROL_BASE_IDX                                                            2
#define mmCURSOR0_0_CURSOR_SURFACE_ADDRESS                                                             0x0679
#define mmCURSOR0_0_CURSOR_SURFACE_ADDRESS_BASE_IDX                                                    2
#define mmCURSOR0_0_CURSOR_SURFACE_ADDRESS_HIGH                                                        0x067a
#define mmCURSOR0_0_CURSOR_SURFACE_ADDRESS_HIGH_BASE_IDX                                               2
#define mmCURSOR0_0_CURSOR_SIZE                                                                        0x067b
#define mmCURSOR0_0_CURSOR_SIZE_BASE_IDX                                                               2
#define mmCURSOR0_0_CURSOR_POSITION                                                                    0x067c
#define mmCURSOR0_0_CURSOR_POSITION_BASE_IDX                                                           2
#define mmCURSOR0_0_CURSOR_HOT_SPOT                                                                    0x067d
#define mmCURSOR0_0_CURSOR_HOT_SPOT_BASE_IDX                                                           2
#define mmCURSOR0_0_CURSOR_STEREO_CONTROL                                                              0x067e
#define mmCURSOR0_0_CURSOR_STEREO_CONTROL_BASE_IDX                                                     2
#define mmCURSOR0_0_CURSOR_DST_OFFSET                                                                  0x067f
#define mmCURSOR0_0_CURSOR_DST_OFFSET_BASE_IDX                                                         2
#define mmCURSOR0_0_CURSOR_MEM_PWR_CTRL                                                                0x0680
#define mmCURSOR0_0_CURSOR_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmCURSOR0_0_CURSOR_MEM_PWR_STATUS                                                              0x0681
#define mmCURSOR0_0_CURSOR_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmCURSOR0_0_DMDATA_ADDRESS_HIGH                                                                0x0682
#define mmCURSOR0_0_DMDATA_ADDRESS_HIGH_BASE_IDX                                                       2
#define mmCURSOR0_0_DMDATA_ADDRESS_LOW                                                                 0x0683
#define mmCURSOR0_0_DMDATA_ADDRESS_LOW_BASE_IDX                                                        2
#define mmCURSOR0_0_DMDATA_CNTL                                                                        0x0684
#define mmCURSOR0_0_DMDATA_CNTL_BASE_IDX                                                               2
#define mmCURSOR0_0_DMDATA_QOS_CNTL                                                                    0x0685
#define mmCURSOR0_0_DMDATA_QOS_CNTL_BASE_IDX                                                           2
#define mmCURSOR0_0_DMDATA_STATUS                                                                      0x0686
#define mmCURSOR0_0_DMDATA_STATUS_BASE_IDX                                                             2
#define mmCURSOR0_0_DMDATA_SW_CNTL                                                                     0x0687
#define mmCURSOR0_0_DMDATA_SW_CNTL_BASE_IDX                                                            2
#define mmCURSOR0_0_DMDATA_SW_DATA                                                                     0x0688
#define mmCURSOR0_0_DMDATA_SW_DATA_BASE_IDX                                                            2


// addressBlock: dce_dc_dcbubp0_dispdec_hubp_dcperfmon_dc_perfmon_dispdec
// base address: 0x1a74
#define mmDC_PERFMON7_PERFCOUNTER_CNTL                                                                 0x069d
#define mmDC_PERFMON7_PERFCOUNTER_CNTL_BASE_IDX                                                        2
#define mmDC_PERFMON7_PERFCOUNTER_CNTL2                                                                0x069e
#define mmDC_PERFMON7_PERFCOUNTER_CNTL2_BASE_IDX                                                       2
#define mmDC_PERFMON7_PERFCOUNTER_STATE                                                                0x069f
#define mmDC_PERFMON7_PERFCOUNTER_STATE_BASE_IDX                                                       2
#define mmDC_PERFMON7_PERFMON_CNTL                                                                     0x06a0
#define mmDC_PERFMON7_PERFMON_CNTL_BASE_IDX                                                            2
#define mmDC_PERFMON7_PERFMON_CNTL2                                                                    0x06a1
#define mmDC_PERFMON7_PERFMON_CNTL2_BASE_IDX                                                           2
#define mmDC_PERFMON7_PERFMON_CVALUE_INT_MISC                                                          0x06a2
#define mmDC_PERFMON7_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                 2
#define mmDC_PERFMON7_PERFMON_CVALUE_LOW                                                               0x06a3
#define mmDC_PERFMON7_PERFMON_CVALUE_LOW_BASE_IDX                                                      2
#define mmDC_PERFMON7_PERFMON_HI                                                                       0x06a4
#define mmDC_PERFMON7_PERFMON_HI_BASE_IDX                                                              2
#define mmDC_PERFMON7_PERFMON_LOW                                                                      0x06a5
#define mmDC_PERFMON7_PERFMON_LOW_BASE_IDX                                                             2


// addressBlock: dce_dc_dcbubp0_dispdec_hubpxfc_dispdec
// base address: 0x0
#define mmHUBPXFC0_HUBP_XFC_CNTL                                                                       0x06a9
#define mmHUBPXFC0_HUBP_XFC_CNTL_BASE_IDX                                                              2
#define mmHUBPXFC0_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB                                                     0x06aa
#define mmHUBPXFC0_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC0_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB                                                     0x06ab
#define mmHUBPXFC0_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC0_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB                                                     0x06ac
#define mmHUBPXFC0_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC0_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB                                                     0x06ad
#define mmHUBPXFC0_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC0_HUBP_XFC_XBUF_RD_PITCH                                                              0x06ae
#define mmHUBPXFC0_HUBP_XFC_XBUF_RD_PITCH_BASE_IDX                                                     2
#define mmHUBPXFC0_HUBP_XFC_DELAY_CONFIG0                                                              0x06af
#define mmHUBPXFC0_HUBP_XFC_DELAY_CONFIG0_BASE_IDX                                                     2
#define mmHUBPXFC0_HUBP_XFC_DELAY_CONFIG1                                                              0x06b0
#define mmHUBPXFC0_HUBP_XFC_DELAY_CONFIG1_BASE_IDX                                                     2
#define mmHUBPXFC0_HUBP_XFC_DELAY_CONFIG2                                                              0x06b1
#define mmHUBPXFC0_HUBP_XFC_DELAY_CONFIG2_BASE_IDX                                                     2
#define mmHUBPXFC0_HUBP_XFC_UNDERFLOW_STATUS                                                           0x06b2
#define mmHUBPXFC0_HUBP_XFC_UNDERFLOW_STATUS_BASE_IDX                                                  2
#define mmHUBPXFC0_HUBP_XFC_SLV_VTG_CONFIG0                                                            0x06b3
#define mmHUBPXFC0_HUBP_XFC_SLV_VTG_CONFIG0_BASE_IDX                                                   2
#define mmHUBPXFC0_HUBP_XFC_SLV_VTG_CONFIG1                                                            0x06b4
#define mmHUBPXFC0_HUBP_XFC_SLV_VTG_CONFIG1_BASE_IDX                                                   2
#define mmHUBPXFC0_HUBP_XFC_SLV_SCALER_CONFIG0                                                         0x06b5
#define mmHUBPXFC0_HUBP_XFC_SLV_SCALER_CONFIG0_BASE_IDX                                                2
#define mmHUBPXFC0_HUBP_XFC_SLV_SCALER_CONFIG1                                                         0x06b6
#define mmHUBPXFC0_HUBP_XFC_SLV_SCALER_CONFIG1_BASE_IDX                                                2
#define mmHUBPXFC0_HUBP_XFC_MPC_CONFIG                                                                 0x06b7
#define mmHUBPXFC0_HUBP_XFC_MPC_CONFIG_BASE_IDX                                                        2


// addressBlock: dce_dc_dcbubp1_dispdec_hubp_dispdec
// base address: 0x370
#define mmHUBP1_DCSURF_SURFACE_CONFIG                                                                  0x06c1
#define mmHUBP1_DCSURF_SURFACE_CONFIG_BASE_IDX                                                         2
#define mmHUBP1_DCSURF_ADDR_CONFIG                                                                     0x06c2
#define mmHUBP1_DCSURF_ADDR_CONFIG_BASE_IDX                                                            2
#define mmHUBP1_DCSURF_TILING_CONFIG                                                                   0x06c3
#define mmHUBP1_DCSURF_TILING_CONFIG_BASE_IDX                                                          2
#define mmHUBP1_DCSURF_PRI_VIEWPORT_START                                                              0x06c5
#define mmHUBP1_DCSURF_PRI_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP1_DCSURF_PRI_VIEWPORT_DIMENSION                                                          0x06c6
#define mmHUBP1_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP1_DCSURF_PRI_VIEWPORT_START_C                                                            0x06c7
#define mmHUBP1_DCSURF_PRI_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP1_DCSURF_PRI_VIEWPORT_DIMENSION_C                                                        0x06c8
#define mmHUBP1_DCSURF_PRI_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP1_DCSURF_SEC_VIEWPORT_START                                                              0x06c9
#define mmHUBP1_DCSURF_SEC_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP1_DCSURF_SEC_VIEWPORT_DIMENSION                                                          0x06ca
#define mmHUBP1_DCSURF_SEC_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP1_DCSURF_SEC_VIEWPORT_START_C                                                            0x06cb
#define mmHUBP1_DCSURF_SEC_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP1_DCSURF_SEC_VIEWPORT_DIMENSION_C                                                        0x06cc
#define mmHUBP1_DCSURF_SEC_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP1_DCHUBP_REQ_SIZE_CONFIG                                                                 0x06cd
#define mmHUBP1_DCHUBP_REQ_SIZE_CONFIG_BASE_IDX                                                        2
#define mmHUBP1_DCHUBP_REQ_SIZE_CONFIG_C                                                               0x06ce
#define mmHUBP1_DCHUBP_REQ_SIZE_CONFIG_C_BASE_IDX                                                      2
#define mmHUBP1_DCHUBP_CNTL                                                                            0x06cf
#define mmHUBP1_DCHUBP_CNTL_BASE_IDX                                                                   2
#define mmHUBP1_HUBP_CLK_CNTL                                                                          0x06d0
#define mmHUBP1_HUBP_CLK_CNTL_BASE_IDX                                                                 2
#define mmHUBP1_DCHUBP_VMPG_CONFIG                                                                     0x06d1
#define mmHUBP1_DCHUBP_VMPG_CONFIG_BASE_IDX                                                            2
#define mmHUBP1_HUBPREQ_DEBUG_DB                                                                       0x06d2
#define mmHUBP1_HUBPREQ_DEBUG_DB_BASE_IDX                                                              2
#define mmHUBP1_HUBPREQ_DEBUG                                                                          0x06d3
#define mmHUBP1_HUBPREQ_DEBUG_BASE_IDX                                                                 2
#define mmHUBP1_HUBP_MEASURE_WIN_CTRL_DCFCLK                                                           0x06d7
#define mmHUBP1_HUBP_MEASURE_WIN_CTRL_DCFCLK_BASE_IDX                                                  2
#define mmHUBP1_HUBP_MEASURE_WIN_CTRL_DPPCLK                                                           0x06d8
#define mmHUBP1_HUBP_MEASURE_WIN_CTRL_DPPCLK_BASE_IDX                                                  2


// addressBlock: dce_dc_dcbubp1_dispdec_hubpreq_dispdec
// base address: 0x370
#define mmHUBPREQ1_DCSURF_SURFACE_PITCH                                                                0x06e3
#define mmHUBPREQ1_DCSURF_SURFACE_PITCH_BASE_IDX                                                       2
#define mmHUBPREQ1_DCSURF_SURFACE_PITCH_C                                                              0x06e4
#define mmHUBPREQ1_DCSURF_SURFACE_PITCH_C_BASE_IDX                                                     2
#define mmHUBPREQ1_VMID_SETTINGS_0                                                                     0x06e5
#define mmHUBPREQ1_VMID_SETTINGS_0_BASE_IDX                                                            2
#define mmHUBPREQ1_DCSURF_PRIMARY_SURFACE_ADDRESS                                                      0x06e6
#define mmHUBPREQ1_DCSURF_PRIMARY_SURFACE_ADDRESS_BASE_IDX                                             2
#define mmHUBPREQ1_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH                                                 0x06e7
#define mmHUBPREQ1_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                        2
#define mmHUBPREQ1_DCSURF_PRIMARY_SURFACE_ADDRESS_C                                                    0x06e8
#define mmHUBPREQ1_DCSURF_PRIMARY_SURFACE_ADDRESS_C_BASE_IDX                                           2
#define mmHUBPREQ1_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C                                               0x06e9
#define mmHUBPREQ1_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                      2
#define mmHUBPREQ1_DCSURF_SECONDARY_SURFACE_ADDRESS                                                    0x06ea
#define mmHUBPREQ1_DCSURF_SECONDARY_SURFACE_ADDRESS_BASE_IDX                                           2
#define mmHUBPREQ1_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH                                               0x06eb
#define mmHUBPREQ1_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                      2
#define mmHUBPREQ1_DCSURF_SECONDARY_SURFACE_ADDRESS_C                                                  0x06ec
#define mmHUBPREQ1_DCSURF_SECONDARY_SURFACE_ADDRESS_C_BASE_IDX                                         2
#define mmHUBPREQ1_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C                                             0x06ed
#define mmHUBPREQ1_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                    2
#define mmHUBPREQ1_DCSURF_PRIMARY_META_SURFACE_ADDRESS                                                 0x06ee
#define mmHUBPREQ1_DCSURF_PRIMARY_META_SURFACE_ADDRESS_BASE_IDX                                        2
#define mmHUBPREQ1_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH                                            0x06ef
#define mmHUBPREQ1_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                   2
#define mmHUBPREQ1_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C                                               0x06f0
#define mmHUBPREQ1_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C_BASE_IDX                                      2
#define mmHUBPREQ1_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C                                          0x06f1
#define mmHUBPREQ1_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                 2
#define mmHUBPREQ1_DCSURF_SECONDARY_META_SURFACE_ADDRESS                                               0x06f2
#define mmHUBPREQ1_DCSURF_SECONDARY_META_SURFACE_ADDRESS_BASE_IDX                                      2
#define mmHUBPREQ1_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH                                          0x06f3
#define mmHUBPREQ1_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                 2
#define mmHUBPREQ1_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C                                             0x06f4
#define mmHUBPREQ1_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C_BASE_IDX                                    2
#define mmHUBPREQ1_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C                                        0x06f5
#define mmHUBPREQ1_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                               2
#define mmHUBPREQ1_DCSURF_SURFACE_CONTROL                                                              0x06f6
#define mmHUBPREQ1_DCSURF_SURFACE_CONTROL_BASE_IDX                                                     2
#define mmHUBPREQ1_DCSURF_FLIP_CONTROL                                                                 0x06f7
#define mmHUBPREQ1_DCSURF_FLIP_CONTROL_BASE_IDX                                                        2
#define mmHUBPREQ1_DCSURF_FLIP_CONTROL2                                                                0x06f8
#define mmHUBPREQ1_DCSURF_FLIP_CONTROL2_BASE_IDX                                                       2
#define mmHUBPREQ1_DCSURF_QUEUE_CONTROL                                                                0x06f9
#define mmHUBPREQ1_DCSURF_QUEUE_CONTROL_BASE_IDX                                                       2
#define mmHUBPREQ1_DCSURF_FRAME_PACING_TIME                                                            0x06fa
#define mmHUBPREQ1_DCSURF_FRAME_PACING_TIME_BASE_IDX                                                   2
#define mmHUBPREQ1_SURFACE_CURRENT_PACING_COUNTER                                                      0x06fb
#define mmHUBPREQ1_SURFACE_CURRENT_PACING_COUNTER_BASE_IDX                                             2
#define mmHUBPREQ1_DCSURF_SURFACE_FLIP_INTERRUPT                                                       0x06fc
#define mmHUBPREQ1_DCSURF_SURFACE_FLIP_INTERRUPT_BASE_IDX                                              2
#define mmHUBPREQ1_DCSURF_SURFACE_INUSE                                                                0x06fd
#define mmHUBPREQ1_DCSURF_SURFACE_INUSE_BASE_IDX                                                       2
#define mmHUBPREQ1_DCSURF_SURFACE_INUSE_HIGH                                                           0x06fe
#define mmHUBPREQ1_DCSURF_SURFACE_INUSE_HIGH_BASE_IDX                                                  2
#define mmHUBPREQ1_DCSURF_SURFACE_INUSE_C                                                              0x06ff
#define mmHUBPREQ1_DCSURF_SURFACE_INUSE_C_BASE_IDX                                                     2
#define mmHUBPREQ1_DCSURF_SURFACE_INUSE_HIGH_C                                                         0x0700
#define mmHUBPREQ1_DCSURF_SURFACE_INUSE_HIGH_C_BASE_IDX                                                2
#define mmHUBPREQ1_DCSURF_SURFACE_EARLIEST_INUSE                                                       0x0701
#define mmHUBPREQ1_DCSURF_SURFACE_EARLIEST_INUSE_BASE_IDX                                              2
#define mmHUBPREQ1_DCSURF_SURFACE_EARLIEST_INUSE_HIGH                                                  0x0702
#define mmHUBPREQ1_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_BASE_IDX                                         2
#define mmHUBPREQ1_DCSURF_SURFACE_EARLIEST_INUSE_C                                                     0x0703
#define mmHUBPREQ1_DCSURF_SURFACE_EARLIEST_INUSE_C_BASE_IDX                                            2
#define mmHUBPREQ1_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C                                                0x0704
#define mmHUBPREQ1_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C_BASE_IDX                                       2
#define mmHUBPREQ1_DCN_EXPANSION_MODE                                                                  0x0708
#define mmHUBPREQ1_DCN_EXPANSION_MODE_BASE_IDX                                                         2
#define mmHUBPREQ1_DCN_TTU_QOS_WM                                                                      0x0709
#define mmHUBPREQ1_DCN_TTU_QOS_WM_BASE_IDX                                                             2
#define mmHUBPREQ1_DCN_GLOBAL_TTU_CNTL                                                                 0x070a
#define mmHUBPREQ1_DCN_GLOBAL_TTU_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ1_DCN_SURF0_TTU_CNTL0                                                                 0x070b
#define mmHUBPREQ1_DCN_SURF0_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ1_DCN_SURF0_TTU_CNTL1                                                                 0x070c
#define mmHUBPREQ1_DCN_SURF0_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ1_DCN_SURF1_TTU_CNTL0                                                                 0x070d
#define mmHUBPREQ1_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ1_DCN_SURF1_TTU_CNTL1                                                                 0x070e
#define mmHUBPREQ1_DCN_SURF1_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ1_DCN_CUR0_TTU_CNTL0                                                                  0x070f
#define mmHUBPREQ1_DCN_CUR0_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ1_DCN_CUR0_TTU_CNTL1                                                                  0x0710
#define mmHUBPREQ1_DCN_CUR0_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ1_DCN_CUR1_TTU_CNTL0                                                                  0x0711
#define mmHUBPREQ1_DCN_CUR1_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ1_DCN_CUR1_TTU_CNTL1                                                                  0x0712
#define mmHUBPREQ1_DCN_CUR1_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ1_DCN_VM_SYSTEM_APERTURE_LOW_ADDR                                                     0x0713
#define mmHUBPREQ1_DCN_VM_SYSTEM_APERTURE_LOW_ADDR_BASE_IDX                                            2
#define mmHUBPREQ1_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR                                                    0x0714
#define mmHUBPREQ1_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_BASE_IDX                                           2
#define mmHUBPREQ1_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB                                              0x0715
#define mmHUBPREQ1_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ1_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB                                              0x0716
#define mmHUBPREQ1_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ1_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB                                    0x0717
#define mmHUBPREQ1_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB_BASE_IDX                           2
#define mmHUBPREQ1_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB                                    0x0718
#define mmHUBPREQ1_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB_BASE_IDX                           2
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB                                             0x0719
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB_BASE_IDX                                    2
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB                                             0x071a
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB_BASE_IDX                                    2
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB                                            0x071b
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB                                            0x071c
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB_BASE_IDX                                   2
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB                                              0x071d
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB                                              0x071e
#define mmHUBPREQ1_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ1_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB                                            0x071f
#define mmHUBPREQ1_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ1_DC_VM_CONTEXT0_CNTL                                                                 0x0720
#define mmHUBPREQ1_DC_VM_CONTEXT0_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ1_DCN_VM_MX_L1_TLB_CNTL                                                               0x0721
#define mmHUBPREQ1_DCN_VM_MX_L1_TLB_CNTL_BASE_IDX                                                      2
#define mmHUBPREQ1_BLANK_OFFSET_0                                                                      0x0722
#define mmHUBPREQ1_BLANK_OFFSET_0_BASE_IDX                                                             2
#define mmHUBPREQ1_BLANK_OFFSET_1                                                                      0x0723
#define mmHUBPREQ1_BLANK_OFFSET_1_BASE_IDX                                                             2
#define mmHUBPREQ1_DST_DIMENSIONS                                                                      0x0724
#define mmHUBPREQ1_DST_DIMENSIONS_BASE_IDX                                                             2
#define mmHUBPREQ1_DST_AFTER_SCALER                                                                    0x0725
#define mmHUBPREQ1_DST_AFTER_SCALER_BASE_IDX                                                           2
#define mmHUBPREQ1_PREFETCH_SETTINGS                                                                   0x0726
#define mmHUBPREQ1_PREFETCH_SETTINGS_BASE_IDX                                                          2
#define mmHUBPREQ1_PREFETCH_SETTINGS_C                                                                 0x0727
#define mmHUBPREQ1_PREFETCH_SETTINGS_C_BASE_IDX                                                        2
#define mmHUBPREQ1_VBLANK_PARAMETERS_0                                                                 0x0728
#define mmHUBPREQ1_VBLANK_PARAMETERS_0_BASE_IDX                                                        2
#define mmHUBPREQ1_VBLANK_PARAMETERS_1                                                                 0x0729
#define mmHUBPREQ1_VBLANK_PARAMETERS_1_BASE_IDX                                                        2
#define mmHUBPREQ1_VBLANK_PARAMETERS_2                                                                 0x072a
#define mmHUBPREQ1_VBLANK_PARAMETERS_2_BASE_IDX                                                        2
#define mmHUBPREQ1_VBLANK_PARAMETERS_3                                                                 0x072b
#define mmHUBPREQ1_VBLANK_PARAMETERS_3_BASE_IDX                                                        2
#define mmHUBPREQ1_VBLANK_PARAMETERS_4                                                                 0x072c
#define mmHUBPREQ1_VBLANK_PARAMETERS_4_BASE_IDX                                                        2
#define mmHUBPREQ1_FLIP_PARAMETERS_0                                                                   0x072d
#define mmHUBPREQ1_FLIP_PARAMETERS_0_BASE_IDX                                                          2
#define mmHUBPREQ1_FLIP_PARAMETERS_1                                                                   0x072e
#define mmHUBPREQ1_FLIP_PARAMETERS_1_BASE_IDX                                                          2
#define mmHUBPREQ1_FLIP_PARAMETERS_2                                                                   0x072f
#define mmHUBPREQ1_FLIP_PARAMETERS_2_BASE_IDX                                                          2
#define mmHUBPREQ1_NOM_PARAMETERS_0                                                                    0x0730
#define mmHUBPREQ1_NOM_PARAMETERS_0_BASE_IDX                                                           2
#define mmHUBPREQ1_NOM_PARAMETERS_1                                                                    0x0731
#define mmHUBPREQ1_NOM_PARAMETERS_1_BASE_IDX                                                           2
#define mmHUBPREQ1_NOM_PARAMETERS_2                                                                    0x0732
#define mmHUBPREQ1_NOM_PARAMETERS_2_BASE_IDX                                                           2
#define mmHUBPREQ1_NOM_PARAMETERS_3                                                                    0x0733
#define mmHUBPREQ1_NOM_PARAMETERS_3_BASE_IDX                                                           2
#define mmHUBPREQ1_NOM_PARAMETERS_4                                                                    0x0734
#define mmHUBPREQ1_NOM_PARAMETERS_4_BASE_IDX                                                           2
#define mmHUBPREQ1_NOM_PARAMETERS_5                                                                    0x0735
#define mmHUBPREQ1_NOM_PARAMETERS_5_BASE_IDX                                                           2
#define mmHUBPREQ1_NOM_PARAMETERS_6                                                                    0x0736
#define mmHUBPREQ1_NOM_PARAMETERS_6_BASE_IDX                                                           2
#define mmHUBPREQ1_NOM_PARAMETERS_7                                                                    0x0737
#define mmHUBPREQ1_NOM_PARAMETERS_7_BASE_IDX                                                           2
#define mmHUBPREQ1_PER_LINE_DELIVERY_PRE                                                               0x0738
#define mmHUBPREQ1_PER_LINE_DELIVERY_PRE_BASE_IDX                                                      2
#define mmHUBPREQ1_PER_LINE_DELIVERY                                                                   0x0739
#define mmHUBPREQ1_PER_LINE_DELIVERY_BASE_IDX                                                          2
#define mmHUBPREQ1_CURSOR_SETTINGS                                                                     0x073a
#define mmHUBPREQ1_CURSOR_SETTINGS_BASE_IDX                                                            2
#define mmHUBPREQ1_REF_FREQ_TO_PIX_FREQ                                                                0x073b
#define mmHUBPREQ1_REF_FREQ_TO_PIX_FREQ_BASE_IDX                                                       2
#define mmHUBPREQ1_DST_Y_DELTA_DRQ_LIMIT                                                               0x073c
#define mmHUBPREQ1_DST_Y_DELTA_DRQ_LIMIT_BASE_IDX                                                      2
#define mmHUBPREQ1_HUBPREQ_MEM_PWR_CTRL                                                                0x073d
#define mmHUBPREQ1_HUBPREQ_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPREQ1_HUBPREQ_MEM_PWR_STATUS                                                              0x073e
#define mmHUBPREQ1_HUBPREQ_MEM_PWR_STATUS_BASE_IDX                                                     2


// addressBlock: dce_dc_dcbubp1_dispdec_hubpret_dispdec
// base address: 0x370
#define mmHUBPRET1_HUBPRET_CONTROL                                                                     0x0748
#define mmHUBPRET1_HUBPRET_CONTROL_BASE_IDX                                                            2
#define mmHUBPRET1_HUBPRET_MEM_PWR_CTRL                                                                0x0749
#define mmHUBPRET1_HUBPRET_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPRET1_HUBPRET_MEM_PWR_STATUS                                                              0x074a
#define mmHUBPRET1_HUBPRET_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmHUBPRET1_HUBPRET_READ_LINE_CTRL0                                                             0x074b
#define mmHUBPRET1_HUBPRET_READ_LINE_CTRL0_BASE_IDX                                                    2
#define mmHUBPRET1_HUBPRET_READ_LINE_CTRL1                                                             0x074c
#define mmHUBPRET1_HUBPRET_READ_LINE_CTRL1_BASE_IDX                                                    2
#define mmHUBPRET1_HUBPRET_READ_LINE0                                                                  0x074d
#define mmHUBPRET1_HUBPRET_READ_LINE0_BASE_IDX                                                         2
#define mmHUBPRET1_HUBPRET_READ_LINE1                                                                  0x074e
#define mmHUBPRET1_HUBPRET_READ_LINE1_BASE_IDX                                                         2
#define mmHUBPRET1_HUBPRET_INTERRUPT                                                                   0x074f
#define mmHUBPRET1_HUBPRET_INTERRUPT_BASE_IDX                                                          2
#define mmHUBPRET1_HUBPRET_READ_LINE_VALUE                                                             0x0750
#define mmHUBPRET1_HUBPRET_READ_LINE_VALUE_BASE_IDX                                                    2
#define mmHUBPRET1_HUBPRET_READ_LINE_STATUS                                                            0x0751
#define mmHUBPRET1_HUBPRET_READ_LINE_STATUS_BASE_IDX                                                   2


// addressBlock: dce_dc_dcbubp1_dispdec_cursor0_dispdec
// base address: 0x370
#define mmCURSOR0_1_CURSOR_CONTROL                                                                     0x0754
#define mmCURSOR0_1_CURSOR_CONTROL_BASE_IDX                                                            2
#define mmCURSOR0_1_CURSOR_SURFACE_ADDRESS                                                             0x0755
#define mmCURSOR0_1_CURSOR_SURFACE_ADDRESS_BASE_IDX                                                    2
#define mmCURSOR0_1_CURSOR_SURFACE_ADDRESS_HIGH                                                        0x0756
#define mmCURSOR0_1_CURSOR_SURFACE_ADDRESS_HIGH_BASE_IDX                                               2
#define mmCURSOR0_1_CURSOR_SIZE                                                                        0x0757
#define mmCURSOR0_1_CURSOR_SIZE_BASE_IDX                                                               2
#define mmCURSOR0_1_CURSOR_POSITION                                                                    0x0758
#define mmCURSOR0_1_CURSOR_POSITION_BASE_IDX                                                           2
#define mmCURSOR0_1_CURSOR_HOT_SPOT                                                                    0x0759
#define mmCURSOR0_1_CURSOR_HOT_SPOT_BASE_IDX                                                           2
#define mmCURSOR0_1_CURSOR_STEREO_CONTROL                                                              0x075a
#define mmCURSOR0_1_CURSOR_STEREO_CONTROL_BASE_IDX                                                     2
#define mmCURSOR0_1_CURSOR_DST_OFFSET                                                                  0x075b
#define mmCURSOR0_1_CURSOR_DST_OFFSET_BASE_IDX                                                         2
#define mmCURSOR0_1_CURSOR_MEM_PWR_CTRL                                                                0x075c
#define mmCURSOR0_1_CURSOR_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmCURSOR0_1_CURSOR_MEM_PWR_STATUS                                                              0x075d
#define mmCURSOR0_1_CURSOR_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmCURSOR0_1_DMDATA_ADDRESS_HIGH                                                                0x075e
#define mmCURSOR0_1_DMDATA_ADDRESS_HIGH_BASE_IDX                                                       2
#define mmCURSOR0_1_DMDATA_ADDRESS_LOW                                                                 0x075f
#define mmCURSOR0_1_DMDATA_ADDRESS_LOW_BASE_IDX                                                        2
#define mmCURSOR0_1_DMDATA_CNTL                                                                        0x0760
#define mmCURSOR0_1_DMDATA_CNTL_BASE_IDX                                                               2
#define mmCURSOR0_1_DMDATA_QOS_CNTL                                                                    0x0761
#define mmCURSOR0_1_DMDATA_QOS_CNTL_BASE_IDX                                                           2
#define mmCURSOR0_1_DMDATA_STATUS                                                                      0x0762
#define mmCURSOR0_1_DMDATA_STATUS_BASE_IDX                                                             2
#define mmCURSOR0_1_DMDATA_SW_CNTL                                                                     0x0763
#define mmCURSOR0_1_DMDATA_SW_CNTL_BASE_IDX                                                            2
#define mmCURSOR0_1_DMDATA_SW_DATA                                                                     0x0764
#define mmCURSOR0_1_DMDATA_SW_DATA_BASE_IDX                                                            2


// addressBlock: dce_dc_dcbubp1_dispdec_hubp_dcperfmon_dc_perfmon_dispdec
// base address: 0x1de4
#define mmDC_PERFMON8_PERFCOUNTER_CNTL                                                                 0x0779
#define mmDC_PERFMON8_PERFCOUNTER_CNTL_BASE_IDX                                                        2
#define mmDC_PERFMON8_PERFCOUNTER_CNTL2                                                                0x077a
#define mmDC_PERFMON8_PERFCOUNTER_CNTL2_BASE_IDX                                                       2
#define mmDC_PERFMON8_PERFCOUNTER_STATE                                                                0x077b
#define mmDC_PERFMON8_PERFCOUNTER_STATE_BASE_IDX                                                       2
#define mmDC_PERFMON8_PERFMON_CNTL                                                                     0x077c
#define mmDC_PERFMON8_PERFMON_CNTL_BASE_IDX                                                            2
#define mmDC_PERFMON8_PERFMON_CNTL2                                                                    0x077d
#define mmDC_PERFMON8_PERFMON_CNTL2_BASE_IDX                                                           2
#define mmDC_PERFMON8_PERFMON_CVALUE_INT_MISC                                                          0x077e
#define mmDC_PERFMON8_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                 2
#define mmDC_PERFMON8_PERFMON_CVALUE_LOW                                                               0x077f
#define mmDC_PERFMON8_PERFMON_CVALUE_LOW_BASE_IDX                                                      2
#define mmDC_PERFMON8_PERFMON_HI                                                                       0x0780
#define mmDC_PERFMON8_PERFMON_HI_BASE_IDX                                                              2
#define mmDC_PERFMON8_PERFMON_LOW                                                                      0x0781
#define mmDC_PERFMON8_PERFMON_LOW_BASE_IDX                                                             2


// addressBlock: dce_dc_dcbubp1_dispdec_hubpxfc_dispdec
// base address: 0x370
#define mmHUBPXFC1_HUBP_XFC_CNTL                                                                       0x0785
#define mmHUBPXFC1_HUBP_XFC_CNTL_BASE_IDX                                                              2
#define mmHUBPXFC1_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB                                                     0x0786
#define mmHUBPXFC1_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC1_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB                                                     0x0787
#define mmHUBPXFC1_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC1_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB                                                     0x0788
#define mmHUBPXFC1_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC1_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB                                                     0x0789
#define mmHUBPXFC1_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC1_HUBP_XFC_XBUF_RD_PITCH                                                              0x078a
#define mmHUBPXFC1_HUBP_XFC_XBUF_RD_PITCH_BASE_IDX                                                     2
#define mmHUBPXFC1_HUBP_XFC_DELAY_CONFIG0                                                              0x078b
#define mmHUBPXFC1_HUBP_XFC_DELAY_CONFIG0_BASE_IDX                                                     2
#define mmHUBPXFC1_HUBP_XFC_DELAY_CONFIG1                                                              0x078c
#define mmHUBPXFC1_HUBP_XFC_DELAY_CONFIG1_BASE_IDX                                                     2
#define mmHUBPXFC1_HUBP_XFC_DELAY_CONFIG2                                                              0x078d
#define mmHUBPXFC1_HUBP_XFC_DELAY_CONFIG2_BASE_IDX                                                     2
#define mmHUBPXFC1_HUBP_XFC_UNDERFLOW_STATUS                                                           0x078e
#define mmHUBPXFC1_HUBP_XFC_UNDERFLOW_STATUS_BASE_IDX                                                  2
#define mmHUBPXFC1_HUBP_XFC_SLV_VTG_CONFIG0                                                            0x078f
#define mmHUBPXFC1_HUBP_XFC_SLV_VTG_CONFIG0_BASE_IDX                                                   2
#define mmHUBPXFC1_HUBP_XFC_SLV_VTG_CONFIG1                                                            0x0790
#define mmHUBPXFC1_HUBP_XFC_SLV_VTG_CONFIG1_BASE_IDX                                                   2
#define mmHUBPXFC1_HUBP_XFC_SLV_SCALER_CONFIG0                                                         0x0791
#define mmHUBPXFC1_HUBP_XFC_SLV_SCALER_CONFIG0_BASE_IDX                                                2
#define mmHUBPXFC1_HUBP_XFC_SLV_SCALER_CONFIG1                                                         0x0792
#define mmHUBPXFC1_HUBP_XFC_SLV_SCALER_CONFIG1_BASE_IDX                                                2
#define mmHUBPXFC1_HUBP_XFC_MPC_CONFIG                                                                 0x0793
#define mmHUBPXFC1_HUBP_XFC_MPC_CONFIG_BASE_IDX                                                        2


// addressBlock: dce_dc_dcbubp2_dispdec_hubp_dispdec
// base address: 0x6e0
#define mmHUBP2_DCSURF_SURFACE_CONFIG                                                                  0x079d
#define mmHUBP2_DCSURF_SURFACE_CONFIG_BASE_IDX                                                         2
#define mmHUBP2_DCSURF_ADDR_CONFIG                                                                     0x079e
#define mmHUBP2_DCSURF_ADDR_CONFIG_BASE_IDX                                                            2
#define mmHUBP2_DCSURF_TILING_CONFIG                                                                   0x079f
#define mmHUBP2_DCSURF_TILING_CONFIG_BASE_IDX                                                          2
#define mmHUBP2_DCSURF_PRI_VIEWPORT_START                                                              0x07a1
#define mmHUBP2_DCSURF_PRI_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP2_DCSURF_PRI_VIEWPORT_DIMENSION                                                          0x07a2
#define mmHUBP2_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP2_DCSURF_PRI_VIEWPORT_START_C                                                            0x07a3
#define mmHUBP2_DCSURF_PRI_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP2_DCSURF_PRI_VIEWPORT_DIMENSION_C                                                        0x07a4
#define mmHUBP2_DCSURF_PRI_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP2_DCSURF_SEC_VIEWPORT_START                                                              0x07a5
#define mmHUBP2_DCSURF_SEC_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP2_DCSURF_SEC_VIEWPORT_DIMENSION                                                          0x07a6
#define mmHUBP2_DCSURF_SEC_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP2_DCSURF_SEC_VIEWPORT_START_C                                                            0x07a7
#define mmHUBP2_DCSURF_SEC_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP2_DCSURF_SEC_VIEWPORT_DIMENSION_C                                                        0x07a8
#define mmHUBP2_DCSURF_SEC_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP2_DCHUBP_REQ_SIZE_CONFIG                                                                 0x07a9
#define mmHUBP2_DCHUBP_REQ_SIZE_CONFIG_BASE_IDX                                                        2
#define mmHUBP2_DCHUBP_REQ_SIZE_CONFIG_C                                                               0x07aa
#define mmHUBP2_DCHUBP_REQ_SIZE_CONFIG_C_BASE_IDX                                                      2
#define mmHUBP2_DCHUBP_CNTL                                                                            0x07ab
#define mmHUBP2_DCHUBP_CNTL_BASE_IDX                                                                   2
#define mmHUBP2_HUBP_CLK_CNTL                                                                          0x07ac
#define mmHUBP2_HUBP_CLK_CNTL_BASE_IDX                                                                 2
#define mmHUBP2_DCHUBP_VMPG_CONFIG                                                                     0x07ad
#define mmHUBP2_DCHUBP_VMPG_CONFIG_BASE_IDX                                                            2
#define mmHUBP2_HUBPREQ_DEBUG_DB                                                                       0x07ae
#define mmHUBP2_HUBPREQ_DEBUG_DB_BASE_IDX                                                              2
#define mmHUBP2_HUBPREQ_DEBUG                                                                          0x07af
#define mmHUBP2_HUBPREQ_DEBUG_BASE_IDX                                                                 2
#define mmHUBP2_HUBP_MEASURE_WIN_CTRL_DCFCLK                                                           0x07b3
#define mmHUBP2_HUBP_MEASURE_WIN_CTRL_DCFCLK_BASE_IDX                                                  2
#define mmHUBP2_HUBP_MEASURE_WIN_CTRL_DPPCLK                                                           0x07b4
#define mmHUBP2_HUBP_MEASURE_WIN_CTRL_DPPCLK_BASE_IDX                                                  2


// addressBlock: dce_dc_dcbubp2_dispdec_hubpreq_dispdec
// base address: 0x6e0
#define mmHUBPREQ2_DCSURF_SURFACE_PITCH                                                                0x07bf
#define mmHUBPREQ2_DCSURF_SURFACE_PITCH_BASE_IDX                                                       2
#define mmHUBPREQ2_DCSURF_SURFACE_PITCH_C                                                              0x07c0
#define mmHUBPREQ2_DCSURF_SURFACE_PITCH_C_BASE_IDX                                                     2
#define mmHUBPREQ2_VMID_SETTINGS_0                                                                     0x07c1
#define mmHUBPREQ2_VMID_SETTINGS_0_BASE_IDX                                                            2
#define mmHUBPREQ2_DCSURF_PRIMARY_SURFACE_ADDRESS                                                      0x07c2
#define mmHUBPREQ2_DCSURF_PRIMARY_SURFACE_ADDRESS_BASE_IDX                                             2
#define mmHUBPREQ2_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH                                                 0x07c3
#define mmHUBPREQ2_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                        2
#define mmHUBPREQ2_DCSURF_PRIMARY_SURFACE_ADDRESS_C                                                    0x07c4
#define mmHUBPREQ2_DCSURF_PRIMARY_SURFACE_ADDRESS_C_BASE_IDX                                           2
#define mmHUBPREQ2_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C                                               0x07c5
#define mmHUBPREQ2_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                      2
#define mmHUBPREQ2_DCSURF_SECONDARY_SURFACE_ADDRESS                                                    0x07c6
#define mmHUBPREQ2_DCSURF_SECONDARY_SURFACE_ADDRESS_BASE_IDX                                           2
#define mmHUBPREQ2_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH                                               0x07c7
#define mmHUBPREQ2_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                      2
#define mmHUBPREQ2_DCSURF_SECONDARY_SURFACE_ADDRESS_C                                                  0x07c8
#define mmHUBPREQ2_DCSURF_SECONDARY_SURFACE_ADDRESS_C_BASE_IDX                                         2
#define mmHUBPREQ2_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C                                             0x07c9
#define mmHUBPREQ2_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                    2
#define mmHUBPREQ2_DCSURF_PRIMARY_META_SURFACE_ADDRESS                                                 0x07ca
#define mmHUBPREQ2_DCSURF_PRIMARY_META_SURFACE_ADDRESS_BASE_IDX                                        2
#define mmHUBPREQ2_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH                                            0x07cb
#define mmHUBPREQ2_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                   2
#define mmHUBPREQ2_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C                                               0x07cc
#define mmHUBPREQ2_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C_BASE_IDX                                      2
#define mmHUBPREQ2_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C                                          0x07cd
#define mmHUBPREQ2_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                 2
#define mmHUBPREQ2_DCSURF_SECONDARY_META_SURFACE_ADDRESS                                               0x07ce
#define mmHUBPREQ2_DCSURF_SECONDARY_META_SURFACE_ADDRESS_BASE_IDX                                      2
#define mmHUBPREQ2_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH                                          0x07cf
#define mmHUBPREQ2_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                 2
#define mmHUBPREQ2_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C                                             0x07d0
#define mmHUBPREQ2_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C_BASE_IDX                                    2
#define mmHUBPREQ2_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C                                        0x07d1
#define mmHUBPREQ2_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                               2
#define mmHUBPREQ2_DCSURF_SURFACE_CONTROL                                                              0x07d2
#define mmHUBPREQ2_DCSURF_SURFACE_CONTROL_BASE_IDX                                                     2
#define mmHUBPREQ2_DCSURF_FLIP_CONTROL                                                                 0x07d3
#define mmHUBPREQ2_DCSURF_FLIP_CONTROL_BASE_IDX                                                        2
#define mmHUBPREQ2_DCSURF_FLIP_CONTROL2                                                                0x07d4
#define mmHUBPREQ2_DCSURF_FLIP_CONTROL2_BASE_IDX                                                       2
#define mmHUBPREQ2_DCSURF_QUEUE_CONTROL                                                                0x07d5
#define mmHUBPREQ2_DCSURF_QUEUE_CONTROL_BASE_IDX                                                       2
#define mmHUBPREQ2_DCSURF_FRAME_PACING_TIME                                                            0x07d6
#define mmHUBPREQ2_DCSURF_FRAME_PACING_TIME_BASE_IDX                                                   2
#define mmHUBPREQ2_SURFACE_CURRENT_PACING_COUNTER                                                      0x07d7
#define mmHUBPREQ2_SURFACE_CURRENT_PACING_COUNTER_BASE_IDX                                             2
#define mmHUBPREQ2_DCSURF_SURFACE_FLIP_INTERRUPT                                                       0x07d8
#define mmHUBPREQ2_DCSURF_SURFACE_FLIP_INTERRUPT_BASE_IDX                                              2
#define mmHUBPREQ2_DCSURF_SURFACE_INUSE                                                                0x07d9
#define mmHUBPREQ2_DCSURF_SURFACE_INUSE_BASE_IDX                                                       2
#define mmHUBPREQ2_DCSURF_SURFACE_INUSE_HIGH                                                           0x07da
#define mmHUBPREQ2_DCSURF_SURFACE_INUSE_HIGH_BASE_IDX                                                  2
#define mmHUBPREQ2_DCSURF_SURFACE_INUSE_C                                                              0x07db
#define mmHUBPREQ2_DCSURF_SURFACE_INUSE_C_BASE_IDX                                                     2
#define mmHUBPREQ2_DCSURF_SURFACE_INUSE_HIGH_C                                                         0x07dc
#define mmHUBPREQ2_DCSURF_SURFACE_INUSE_HIGH_C_BASE_IDX                                                2
#define mmHUBPREQ2_DCSURF_SURFACE_EARLIEST_INUSE                                                       0x07dd
#define mmHUBPREQ2_DCSURF_SURFACE_EARLIEST_INUSE_BASE_IDX                                              2
#define mmHUBPREQ2_DCSURF_SURFACE_EARLIEST_INUSE_HIGH                                                  0x07de
#define mmHUBPREQ2_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_BASE_IDX                                         2
#define mmHUBPREQ2_DCSURF_SURFACE_EARLIEST_INUSE_C                                                     0x07df
#define mmHUBPREQ2_DCSURF_SURFACE_EARLIEST_INUSE_C_BASE_IDX                                            2
#define mmHUBPREQ2_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C                                                0x07e0
#define mmHUBPREQ2_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C_BASE_IDX                                       2
#define mmHUBPREQ2_DCN_EXPANSION_MODE                                                                  0x07e4
#define mmHUBPREQ2_DCN_EXPANSION_MODE_BASE_IDX                                                         2
#define mmHUBPREQ2_DCN_TTU_QOS_WM                                                                      0x07e5
#define mmHUBPREQ2_DCN_TTU_QOS_WM_BASE_IDX                                                             2
#define mmHUBPREQ2_DCN_GLOBAL_TTU_CNTL                                                                 0x07e6
#define mmHUBPREQ2_DCN_GLOBAL_TTU_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ2_DCN_SURF0_TTU_CNTL0                                                                 0x07e7
#define mmHUBPREQ2_DCN_SURF0_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ2_DCN_SURF0_TTU_CNTL1                                                                 0x07e8
#define mmHUBPREQ2_DCN_SURF0_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ2_DCN_SURF1_TTU_CNTL0                                                                 0x07e9
#define mmHUBPREQ2_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ2_DCN_SURF1_TTU_CNTL1                                                                 0x07ea
#define mmHUBPREQ2_DCN_SURF1_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ2_DCN_CUR0_TTU_CNTL0                                                                  0x07eb
#define mmHUBPREQ2_DCN_CUR0_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ2_DCN_CUR0_TTU_CNTL1                                                                  0x07ec
#define mmHUBPREQ2_DCN_CUR0_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ2_DCN_CUR1_TTU_CNTL0                                                                  0x07ed
#define mmHUBPREQ2_DCN_CUR1_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ2_DCN_CUR1_TTU_CNTL1                                                                  0x07ee
#define mmHUBPREQ2_DCN_CUR1_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ2_DCN_VM_SYSTEM_APERTURE_LOW_ADDR                                                     0x07ef
#define mmHUBPREQ2_DCN_VM_SYSTEM_APERTURE_LOW_ADDR_BASE_IDX                                            2
#define mmHUBPREQ2_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR                                                    0x07f0

#define mmHUBPREQ2_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_BASE_IDX                                           2
#define mmHUBPREQ2_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB                                              0x07f1
#define mmHUBPREQ2_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ2_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB                                              0x07f2
#define mmHUBPREQ2_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ2_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB                                    0x07f3
#define mmHUBPREQ2_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB_BASE_IDX                           2
#define mmHUBPREQ2_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB                                    0x07f4
#define mmHUBPREQ2_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB_BASE_IDX                           2
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB                                             0x07f5
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB_BASE_IDX                                    2
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB                                             0x07f6
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB_BASE_IDX                                    2
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB                                            0x07f7
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB                                            0x07f8
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB_BASE_IDX                                   2
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB                                              0x07f9
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB                                              0x07fa
#define mmHUBPREQ2_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ2_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB                                            0x07fb
#define mmHUBPREQ2_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ2_DC_VM_CONTEXT0_CNTL                                                                 0x07fc
#define mmHUBPREQ2_DC_VM_CONTEXT0_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ2_DCN_VM_MX_L1_TLB_CNTL                                                               0x07fd
#define mmHUBPREQ2_DCN_VM_MX_L1_TLB_CNTL_BASE_IDX                                                      2
#define mmHUBPREQ2_BLANK_OFFSET_0                                                                      0x07fe
#define mmHUBPREQ2_BLANK_OFFSET_0_BASE_IDX                                                             2
#define mmHUBPREQ2_BLANK_OFFSET_1                                                                      0x07ff
#define mmHUBPREQ2_BLANK_OFFSET_1_BASE_IDX                                                             2
#define mmHUBPREQ2_DST_DIMENSIONS                                                                      0x0800
#define mmHUBPREQ2_DST_DIMENSIONS_BASE_IDX                                                             2
#define mmHUBPREQ2_DST_AFTER_SCALER                                                                    0x0801
#define mmHUBPREQ2_DST_AFTER_SCALER_BASE_IDX                                                           2
#define mmHUBPREQ2_PREFETCH_SETTINGS                                                                   0x0802
#define mmHUBPREQ2_PREFETCH_SETTINGS_BASE_IDX                                                          2
#define mmHUBPREQ2_PREFETCH_SETTINGS_C                                                                 0x0803
#define mmHUBPREQ2_PREFETCH_SETTINGS_C_BASE_IDX                                                        2
#define mmHUBPREQ2_VBLANK_PARAMETERS_0                                                                 0x0804
#define mmHUBPREQ2_VBLANK_PARAMETERS_0_BASE_IDX                                                        2
#define mmHUBPREQ2_VBLANK_PARAMETERS_1                                                                 0x0805
#define mmHUBPREQ2_VBLANK_PARAMETERS_1_BASE_IDX                                                        2
#define mmHUBPREQ2_VBLANK_PARAMETERS_2                                                                 0x0806
#define mmHUBPREQ2_VBLANK_PARAMETERS_2_BASE_IDX                                                        2
#define mmHUBPREQ2_VBLANK_PARAMETERS_3                                                                 0x0807
#define mmHUBPREQ2_VBLANK_PARAMETERS_3_BASE_IDX                                                        2
#define mmHUBPREQ2_VBLANK_PARAMETERS_4                                                                 0x0808
#define mmHUBPREQ2_VBLANK_PARAMETERS_4_BASE_IDX                                                        2
#define mmHUBPREQ2_FLIP_PARAMETERS_0                                                                   0x0809
#define mmHUBPREQ2_FLIP_PARAMETERS_0_BASE_IDX                                                          2
#define mmHUBPREQ2_FLIP_PARAMETERS_1                                                                   0x080a
#define mmHUBPREQ2_FLIP_PARAMETERS_1_BASE_IDX                                                          2
#define mmHUBPREQ2_FLIP_PARAMETERS_2                                                                   0x080b
#define mmHUBPREQ2_FLIP_PARAMETERS_2_BASE_IDX                                                          2
#define mmHUBPREQ2_NOM_PARAMETERS_0                                                                    0x080c
#define mmHUBPREQ2_NOM_PARAMETERS_0_BASE_IDX                                                           2
#define mmHUBPREQ2_NOM_PARAMETERS_1                                                                    0x080d
#define mmHUBPREQ2_NOM_PARAMETERS_1_BASE_IDX                                                           2
#define mmHUBPREQ2_NOM_PARAMETERS_2                                                                    0x080e
#define mmHUBPREQ2_NOM_PARAMETERS_2_BASE_IDX                                                           2
#define mmHUBPREQ2_NOM_PARAMETERS_3                                                                    0x080f
#define mmHUBPREQ2_NOM_PARAMETERS_3_BASE_IDX                                                           2
#define mmHUBPREQ2_NOM_PARAMETERS_4                                                                    0x0810
#define mmHUBPREQ2_NOM_PARAMETERS_4_BASE_IDX                                                           2
#define mmHUBPREQ2_NOM_PARAMETERS_5                                                                    0x0811
#define mmHUBPREQ2_NOM_PARAMETERS_5_BASE_IDX                                                           2
#define mmHUBPREQ2_NOM_PARAMETERS_6                                                                    0x0812
#define mmHUBPREQ2_NOM_PARAMETERS_6_BASE_IDX                                                           2
#define mmHUBPREQ2_NOM_PARAMETERS_7                                                                    0x0813
#define mmHUBPREQ2_NOM_PARAMETERS_7_BASE_IDX                                                           2
#define mmHUBPREQ2_PER_LINE_DELIVERY_PRE                                                               0x0814
#define mmHUBPREQ2_PER_LINE_DELIVERY_PRE_BASE_IDX                                                      2
#define mmHUBPREQ2_PER_LINE_DELIVERY                                                                   0x0815
#define mmHUBPREQ2_PER_LINE_DELIVERY_BASE_IDX                                                          2
#define mmHUBPREQ2_CURSOR_SETTINGS                                                                     0x0816
#define mmHUBPREQ2_CURSOR_SETTINGS_BASE_IDX                                                            2
#define mmHUBPREQ2_REF_FREQ_TO_PIX_FREQ                                                                0x0817
#define mmHUBPREQ2_REF_FREQ_TO_PIX_FREQ_BASE_IDX                                                       2
#define mmHUBPREQ2_DST_Y_DELTA_DRQ_LIMIT                                                               0x0818
#define mmHUBPREQ2_DST_Y_DELTA_DRQ_LIMIT_BASE_IDX                                                      2
#define mmHUBPREQ2_HUBPREQ_MEM_PWR_CTRL                                                                0x0819
#define mmHUBPREQ2_HUBPREQ_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPREQ2_HUBPREQ_MEM_PWR_STATUS                                                              0x081a
#define mmHUBPREQ2_HUBPREQ_MEM_PWR_STATUS_BASE_IDX                                                     2


// addressBlock: dce_dc_dcbubp2_dispdec_hubpret_dispdec
// base address: 0x6e0
#define mmHUBPRET2_HUBPRET_CONTROL                                                                     0x0824
#define mmHUBPRET2_HUBPRET_CONTROL_BASE_IDX                                                            2
#define mmHUBPRET2_HUBPRET_MEM_PWR_CTRL                                                                0x0825
#define mmHUBPRET2_HUBPRET_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPRET2_HUBPRET_MEM_PWR_STATUS                                                              0x0826
#define mmHUBPRET2_HUBPRET_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmHUBPRET2_HUBPRET_READ_LINE_CTRL0                                                             0x0827
#define mmHUBPRET2_HUBPRET_READ_LINE_CTRL0_BASE_IDX                                                    2
#define mmHUBPRET2_HUBPRET_READ_LINE_CTRL1                                                             0x0828
#define mmHUBPRET2_HUBPRET_READ_LINE_CTRL1_BASE_IDX                                                    2
#define mmHUBPRET2_HUBPRET_READ_LINE0                                                                  0x0829
#define mmHUBPRET2_HUBPRET_READ_LINE0_BASE_IDX                                                         2
#define mmHUBPRET2_HUBPRET_READ_LINE1                                                                  0x082a
#define mmHUBPRET2_HUBPRET_READ_LINE1_BASE_IDX                                                         2
#define mmHUBPRET2_HUBPRET_INTERRUPT                                                                   0x082b
#define mmHUBPRET2_HUBPRET_INTERRUPT_BASE_IDX                                                          2
#define mmHUBPRET2_HUBPRET_READ_LINE_VALUE                                                             0x082c
#define mmHUBPRET2_HUBPRET_READ_LINE_VALUE_BASE_IDX                                                    2
#define mmHUBPRET2_HUBPRET_READ_LINE_STATUS                                                            0x082d
#define mmHUBPRET2_HUBPRET_READ_LINE_STATUS_BASE_IDX                                                   2


// addressBlock: dce_dc_dcbubp2_dispdec_cursor0_dispdec
// base address: 0x6e0
#define mmCURSOR0_2_CURSOR_CONTROL                                                                     0x0830
#define mmCURSOR0_2_CURSOR_CONTROL_BASE_IDX                                                            2
#define mmCURSOR0_2_CURSOR_SURFACE_ADDRESS                                                             0x0831
#define mmCURSOR0_2_CURSOR_SURFACE_ADDRESS_BASE_IDX                                                    2
#define mmCURSOR0_2_CURSOR_SURFACE_ADDRESS_HIGH                                                        0x0832
#define mmCURSOR0_2_CURSOR_SURFACE_ADDRESS_HIGH_BASE_IDX                                               2
#define mmCURSOR0_2_CURSOR_SIZE                                                                        0x0833
#define mmCURSOR0_2_CURSOR_SIZE_BASE_IDX                                                               2
#define mmCURSOR0_2_CURSOR_POSITION                                                                    0x0834
#define mmCURSOR0_2_CURSOR_POSITION_BASE_IDX                                                           2
#define mmCURSOR0_2_CURSOR_HOT_SPOT                                                                    0x0835
#define mmCURSOR0_2_CURSOR_HOT_SPOT_BASE_IDX                                                           2
#define mmCURSOR0_2_CURSOR_STEREO_CONTROL                                                              0x0836
#define mmCURSOR0_2_CURSOR_STEREO_CONTROL_BASE_IDX                                                     2
#define mmCURSOR0_2_CURSOR_DST_OFFSET                                                                  0x0837
#define mmCURSOR0_2_CURSOR_DST_OFFSET_BASE_IDX                                                         2
#define mmCURSOR0_2_CURSOR_MEM_PWR_CTRL                                                                0x0838
#define mmCURSOR0_2_CURSOR_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmCURSOR0_2_CURSOR_MEM_PWR_STATUS                                                              0x0839
#define mmCURSOR0_2_CURSOR_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmCURSOR0_2_DMDATA_ADDRESS_HIGH                                                                0x083a
#define mmCURSOR0_2_DMDATA_ADDRESS_HIGH_BASE_IDX                                                       2
#define mmCURSOR0_2_DMDATA_ADDRESS_LOW                                                                 0x083b
#define mmCURSOR0_2_DMDATA_ADDRESS_LOW_BASE_IDX                                                        2
#define mmCURSOR0_2_DMDATA_CNTL                                                                        0x083c
#define mmCURSOR0_2_DMDATA_CNTL_BASE_IDX                                                               2
#define mmCURSOR0_2_DMDATA_QOS_CNTL                                                                    0x083d
#define mmCURSOR0_2_DMDATA_QOS_CNTL_BASE_IDX                                                           2
#define mmCURSOR0_2_DMDATA_STATUS                                                                      0x083e
#define mmCURSOR0_2_DMDATA_STATUS_BASE_IDX                                                             2
#define mmCURSOR0_2_DMDATA_SW_CNTL                                                                     0x083f
#define mmCURSOR0_2_DMDATA_SW_CNTL_BASE_IDX                                                            2
#define mmCURSOR0_2_DMDATA_SW_DATA                                                                     0x0840
#define mmCURSOR0_2_DMDATA_SW_DATA_BASE_IDX                                                            2


// addressBlock: dce_dc_dcbubp2_dispdec_hubp_dcperfmon_dc_perfmon_dispdec
// base address: 0x2154
#define mmDC_PERFMON9_PERFCOUNTER_CNTL                                                                 0x0855
#define mmDC_PERFMON9_PERFCOUNTER_CNTL_BASE_IDX                                                        2
#define mmDC_PERFMON9_PERFCOUNTER_CNTL2                                                                0x0856
#define mmDC_PERFMON9_PERFCOUNTER_CNTL2_BASE_IDX                                                       2
#define mmDC_PERFMON9_PERFCOUNTER_STATE                                                                0x0857
#define mmDC_PERFMON9_PERFCOUNTER_STATE_BASE_IDX                                                       2
#define mmDC_PERFMON9_PERFMON_CNTL                                                                     0x0858
#define mmDC_PERFMON9_PERFMON_CNTL_BASE_IDX                                                            2
#define mmDC_PERFMON9_PERFMON_CNTL2                                                                    0x0859
#define mmDC_PERFMON9_PERFMON_CNTL2_BASE_IDX                                                           2
#define mmDC_PERFMON9_PERFMON_CVALUE_INT_MISC                                                          0x085a
#define mmDC_PERFMON9_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                 2
#define mmDC_PERFMON9_PERFMON_CVALUE_LOW                                                               0x085b
#define mmDC_PERFMON9_PERFMON_CVALUE_LOW_BASE_IDX                                                      2
#define mmDC_PERFMON9_PERFMON_HI                                                                       0x085c
#define mmDC_PERFMON9_PERFMON_HI_BASE_IDX                                                              2
#define mmDC_PERFMON9_PERFMON_LOW                                                                      0x085d
#define mmDC_PERFMON9_PERFMON_LOW_BASE_IDX                                                             2


// addressBlock: dce_dc_dcbubp2_dispdec_hubpxfc_dispdec
// base address: 0x6e0
#define mmHUBPXFC2_HUBP_XFC_CNTL                                                                       0x0861
#define mmHUBPXFC2_HUBP_XFC_CNTL_BASE_IDX                                                              2
#define mmHUBPXFC2_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB                                                     0x0862
#define mmHUBPXFC2_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC2_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB                                                     0x0863
#define mmHUBPXFC2_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC2_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB                                                     0x0864
#define mmHUBPXFC2_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC2_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB                                                     0x0865
#define mmHUBPXFC2_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC2_HUBP_XFC_XBUF_RD_PITCH                                                              0x0866
#define mmHUBPXFC2_HUBP_XFC_XBUF_RD_PITCH_BASE_IDX                                                     2
#define mmHUBPXFC2_HUBP_XFC_DELAY_CONFIG0                                                              0x0867
#define mmHUBPXFC2_HUBP_XFC_DELAY_CONFIG0_BASE_IDX                                                     2
#define mmHUBPXFC2_HUBP_XFC_DELAY_CONFIG1                                                              0x0868
#define mmHUBPXFC2_HUBP_XFC_DELAY_CONFIG1_BASE_IDX                                                     2
#define mmHUBPXFC2_HUBP_XFC_DELAY_CONFIG2                                                              0x0869
#define mmHUBPXFC2_HUBP_XFC_DELAY_CONFIG2_BASE_IDX                                                     2
#define mmHUBPXFC2_HUBP_XFC_UNDERFLOW_STATUS                                                           0x086a
#define mmHUBPXFC2_HUBP_XFC_UNDERFLOW_STATUS_BASE_IDX                                                  2
#define mmHUBPXFC2_HUBP_XFC_SLV_VTG_CONFIG0                                                            0x086b
#define mmHUBPXFC2_HUBP_XFC_SLV_VTG_CONFIG0_BASE_IDX                                                   2
#define mmHUBPXFC2_HUBP_XFC_SLV_VTG_CONFIG1                                                            0x086c
#define mmHUBPXFC2_HUBP_XFC_SLV_VTG_CONFIG1_BASE_IDX                                                   2
#define mmHUBPXFC2_HUBP_XFC_SLV_SCALER_CONFIG0                                                         0x086d
#define mmHUBPXFC2_HUBP_XFC_SLV_SCALER_CONFIG0_BASE_IDX                                                2
#define mmHUBPXFC2_HUBP_XFC_SLV_SCALER_CONFIG1                                                         0x086e
#define mmHUBPXFC2_HUBP_XFC_SLV_SCALER_CONFIG1_BASE_IDX                                                2
#define mmHUBPXFC2_HUBP_XFC_MPC_CONFIG                                                                 0x086f
#define mmHUBPXFC2_HUBP_XFC_MPC_CONFIG_BASE_IDX                                                        2


// addressBlock: dce_dc_dcbubp3_dispdec_hubp_dispdec
// base address: 0xa50
#define mmHUBP3_DCSURF_SURFACE_CONFIG                                                                  0x0879
#define mmHUBP3_DCSURF_SURFACE_CONFIG_BASE_IDX                                                         2
#define mmHUBP3_DCSURF_ADDR_CONFIG                                                                     0x087a
#define mmHUBP3_DCSURF_ADDR_CONFIG_BASE_IDX                                                            2
#define mmHUBP3_DCSURF_TILING_CONFIG                                                                   0x087b
#define mmHUBP3_DCSURF_TILING_CONFIG_BASE_IDX                                                          2
#define mmHUBP3_DCSURF_PRI_VIEWPORT_START                                                              0x087d
#define mmHUBP3_DCSURF_PRI_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP3_DCSURF_PRI_VIEWPORT_DIMENSION                                                          0x087e
#define mmHUBP3_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP3_DCSURF_PRI_VIEWPORT_START_C                                                            0x087f
#define mmHUBP3_DCSURF_PRI_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP3_DCSURF_PRI_VIEWPORT_DIMENSION_C                                                        0x0880
#define mmHUBP3_DCSURF_PRI_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP3_DCSURF_SEC_VIEWPORT_START                                                              0x0881
#define mmHUBP3_DCSURF_SEC_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP3_DCSURF_SEC_VIEWPORT_DIMENSION                                                          0x0882
#define mmHUBP3_DCSURF_SEC_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP3_DCSURF_SEC_VIEWPORT_START_C                                                            0x0883
#define mmHUBP3_DCSURF_SEC_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP3_DCSURF_SEC_VIEWPORT_DIMENSION_C                                                        0x0884
#define mmHUBP3_DCSURF_SEC_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP3_DCHUBP_REQ_SIZE_CONFIG                                                                 0x0885
#define mmHUBP3_DCHUBP_REQ_SIZE_CONFIG_BASE_IDX                                                        2
#define mmHUBP3_DCHUBP_REQ_SIZE_CONFIG_C                                                               0x0886
#define mmHUBP3_DCHUBP_REQ_SIZE_CONFIG_C_BASE_IDX                                                      2
#define mmHUBP3_DCHUBP_CNTL                                                                            0x0887
#define mmHUBP3_DCHUBP_CNTL_BASE_IDX                                                                   2
#define mmHUBP3_HUBP_CLK_CNTL                                                                          0x0888
#define mmHUBP3_HUBP_CLK_CNTL_BASE_IDX                                                                 2
#define mmHUBP3_DCHUBP_VMPG_CONFIG                                                                     0x0889
#define mmHUBP3_DCHUBP_VMPG_CONFIG_BASE_IDX                                                            2
#define mmHUBP3_HUBPREQ_DEBUG_DB                                                                       0x088a
#define mmHUBP3_HUBPREQ_DEBUG_DB_BASE_IDX                                                              2
#define mmHUBP3_HUBPREQ_DEBUG                                                                          0x088b
#define mmHUBP3_HUBPREQ_DEBUG_BASE_IDX                                                                 2
#define mmHUBP3_HUBP_MEASURE_WIN_CTRL_DCFCLK                                                           0x088f
#define mmHUBP3_HUBP_MEASURE_WIN_CTRL_DCFCLK_BASE_IDX                                                  2
#define mmHUBP3_HUBP_MEASURE_WIN_CTRL_DPPCLK                                                           0x0890
#define mmHUBP3_HUBP_MEASURE_WIN_CTRL_DPPCLK_BASE_IDX                                                  2


// addressBlock: dce_dc_dcbubp3_dispdec_hubpreq_dispdec
// base address: 0xa50
#define mmHUBPREQ3_DCSURF_SURFACE_PITCH                                                                0x089b
#define mmHUBPREQ3_DCSURF_SURFACE_PITCH_BASE_IDX                                                       2
#define mmHUBPREQ3_DCSURF_SURFACE_PITCH_C                                                              0x089c
#define mmHUBPREQ3_DCSURF_SURFACE_PITCH_C_BASE_IDX                                                     2
#define mmHUBPREQ3_VMID_SETTINGS_0                                                                     0x089d
#define mmHUBPREQ3_VMID_SETTINGS_0_BASE_IDX                                                            2
#define mmHUBPREQ3_DCSURF_PRIMARY_SURFACE_ADDRESS                                                      0x089e
#define mmHUBPREQ3_DCSURF_PRIMARY_SURFACE_ADDRESS_BASE_IDX                                             2
#define mmHUBPREQ3_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH                                                 0x089f
#define mmHUBPREQ3_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                        2
#define mmHUBPREQ3_DCSURF_PRIMARY_SURFACE_ADDRESS_C                                                    0x08a0
#define mmHUBPREQ3_DCSURF_PRIMARY_SURFACE_ADDRESS_C_BASE_IDX                                           2
#define mmHUBPREQ3_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C                                               0x08a1
#define mmHUBPREQ3_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                      2
#define mmHUBPREQ3_DCSURF_SECONDARY_SURFACE_ADDRESS                                                    0x08a2
#define mmHUBPREQ3_DCSURF_SECONDARY_SURFACE_ADDRESS_BASE_IDX                                           2
#define mmHUBPREQ3_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH                                               0x08a3
#define mmHUBPREQ3_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                      2
#define mmHUBPREQ3_DCSURF_SECONDARY_SURFACE_ADDRESS_C                                                  0x08a4
#define mmHUBPREQ3_DCSURF_SECONDARY_SURFACE_ADDRESS_C_BASE_IDX                                         2
#define mmHUBPREQ3_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C                                             0x08a5
#define mmHUBPREQ3_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                    2
#define mmHUBPREQ3_DCSURF_PRIMARY_META_SURFACE_ADDRESS                                                 0x08a6
#define mmHUBPREQ3_DCSURF_PRIMARY_META_SURFACE_ADDRESS_BASE_IDX                                        2
#define mmHUBPREQ3_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH                                            0x08a7
#define mmHUBPREQ3_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                   2
#define mmHUBPREQ3_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C                                               0x08a8
#define mmHUBPREQ3_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C_BASE_IDX                                      2
#define mmHUBPREQ3_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C                                          0x08a9
#define mmHUBPREQ3_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                 2
#define mmHUBPREQ3_DCSURF_SECONDARY_META_SURFACE_ADDRESS                                               0x08aa
#define mmHUBPREQ3_DCSURF_SECONDARY_META_SURFACE_ADDRESS_BASE_IDX                                      2
#define mmHUBPREQ3_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH                                          0x08ab
#define mmHUBPREQ3_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                 2
#define mmHUBPREQ3_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C                                             0x08ac
#define mmHUBPREQ3_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C_BASE_IDX                                    2
#define mmHUBPREQ3_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C                                        0x08ad
#define mmHUBPREQ3_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                               2
#define mmHUBPREQ3_DCSURF_SURFACE_CONTROL                                                              0x08ae
#define mmHUBPREQ3_DCSURF_SURFACE_CONTROL_BASE_IDX                                                     2
#define mmHUBPREQ3_DCSURF_FLIP_CONTROL                                                                 0x08af
#define mmHUBPREQ3_DCSURF_FLIP_CONTROL_BASE_IDX                                                        2
#define mmHUBPREQ3_DCSURF_FLIP_CONTROL2                                                                0x08b0
#define mmHUBPREQ3_DCSURF_FLIP_CONTROL2_BASE_IDX                                                       2
#define mmHUBPREQ3_DCSURF_QUEUE_CONTROL                                                                0x08b1
#define mmHUBPREQ3_DCSURF_QUEUE_CONTROL_BASE_IDX                                                       2
#define mmHUBPREQ3_DCSURF_FRAME_PACING_TIME                                                            0x08b2
#define mmHUBPREQ3_DCSURF_FRAME_PACING_TIME_BASE_IDX                                                   2
#define mmHUBPREQ3_SURFACE_CURRENT_PACING_COUNTER                                                      0x08b3
#define mmHUBPREQ3_SURFACE_CURRENT_PACING_COUNTER_BASE_IDX                                             2
#define mmHUBPREQ3_DCSURF_SURFACE_FLIP_INTERRUPT                                                       0x08b4
#define mmHUBPREQ3_DCSURF_SURFACE_FLIP_INTERRUPT_BASE_IDX                                              2
#define mmHUBPREQ3_DCSURF_SURFACE_INUSE                                                                0x08b5
#define mmHUBPREQ3_DCSURF_SURFACE_INUSE_BASE_IDX                                                       2
#define mmHUBPREQ3_DCSURF_SURFACE_INUSE_HIGH                                                           0x08b6
#define mmHUBPREQ3_DCSURF_SURFACE_INUSE_HIGH_BASE_IDX                                                  2
#define mmHUBPREQ3_DCSURF_SURFACE_INUSE_C                                                              0x08b7
#define mmHUBPREQ3_DCSURF_SURFACE_INUSE_C_BASE_IDX                                                     2
#define mmHUBPREQ3_DCSURF_SURFACE_INUSE_HIGH_C                                                         0x08b8
#define mmHUBPREQ3_DCSURF_SURFACE_INUSE_HIGH_C_BASE_IDX                                                2
#define mmHUBPREQ3_DCSURF_SURFACE_EARLIEST_INUSE                                                       0x08b9
#define mmHUBPREQ3_DCSURF_SURFACE_EARLIEST_INUSE_BASE_IDX                                              2
#define mmHUBPREQ3_DCSURF_SURFACE_EARLIEST_INUSE_HIGH                                                  0x08ba
#define mmHUBPREQ3_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_BASE_IDX                                         2
#define mmHUBPREQ3_DCSURF_SURFACE_EARLIEST_INUSE_C                                                     0x08bb
#define mmHUBPREQ3_DCSURF_SURFACE_EARLIEST_INUSE_C_BASE_IDX                                            2
#define mmHUBPREQ3_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C                                                0x08bc
#define mmHUBPREQ3_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C_BASE_IDX                                       2
#define mmHUBPREQ3_DCN_EXPANSION_MODE                                                                  0x08c0
#define mmHUBPREQ3_DCN_EXPANSION_MODE_BASE_IDX                                                         2
#define mmHUBPREQ3_DCN_TTU_QOS_WM                                                                      0x08c1
#define mmHUBPREQ3_DCN_TTU_QOS_WM_BASE_IDX                                                             2
#define mmHUBPREQ3_DCN_GLOBAL_TTU_CNTL                                                                 0x08c2
#define mmHUBPREQ3_DCN_GLOBAL_TTU_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ3_DCN_SURF0_TTU_CNTL0                                                                 0x08c3
#define mmHUBPREQ3_DCN_SURF0_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ3_DCN_SURF0_TTU_CNTL1                                                                 0x08c4
#define mmHUBPREQ3_DCN_SURF0_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ3_DCN_SURF1_TTU_CNTL0                                                                 0x08c5
#define mmHUBPREQ3_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ3_DCN_SURF1_TTU_CNTL1                                                                 0x08c6
#define mmHUBPREQ3_DCN_SURF1_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ3_DCN_CUR0_TTU_CNTL0                                                                  0x08c7
#define mmHUBPREQ3_DCN_CUR0_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ3_DCN_CUR0_TTU_CNTL1                                                                  0x08c8
#define mmHUBPREQ3_DCN_CUR0_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ3_DCN_CUR1_TTU_CNTL0                                                                  0x08c9
#define mmHUBPREQ3_DCN_CUR1_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ3_DCN_CUR1_TTU_CNTL1                                                                  0x08ca
#define mmHUBPREQ3_DCN_CUR1_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ3_DCN_VM_SYSTEM_APERTURE_LOW_ADDR                                                     0x08cb
#define mmHUBPREQ3_DCN_VM_SYSTEM_APERTURE_LOW_ADDR_BASE_IDX                                            2
#define mmHUBPREQ3_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR                                                    0x08cc
#define mmHUBPREQ3_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_BASE_IDX                                           2
#define mmHUBPREQ3_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB                                              0x08cd
#define mmHUBPREQ3_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ3_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB                                              0x08ce
#define mmHUBPREQ3_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ3_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB                                    0x08cf
#define mmHUBPREQ3_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB_BASE_IDX                           2
#define mmHUBPREQ3_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB                                    0x08d0
#define mmHUBPREQ3_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB_BASE_IDX                           2
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB                                             0x08d1
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB_BASE_IDX                                    2
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB                                             0x08d2
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB_BASE_IDX                                    2
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB                                            0x08d3
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB                                            0x08d4
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB_BASE_IDX                                   2
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB                                              0x08d5
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB                                              0x08d6
#define mmHUBPREQ3_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ3_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB                                            0x08d7
#define mmHUBPREQ3_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ3_DC_VM_CONTEXT0_CNTL                                                                 0x08d8
#define mmHUBPREQ3_DC_VM_CONTEXT0_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ3_DCN_VM_MX_L1_TLB_CNTL                                                               0x08d9
#define mmHUBPREQ3_DCN_VM_MX_L1_TLB_CNTL_BASE_IDX                                                      2
#define mmHUBPREQ3_BLANK_OFFSET_0                                                                      0x08da
#define mmHUBPREQ3_BLANK_OFFSET_0_BASE_IDX                                                             2
#define mmHUBPREQ3_BLANK_OFFSET_1                                                                      0x08db
#define mmHUBPREQ3_BLANK_OFFSET_1_BASE_IDX                                                             2
#define mmHUBPREQ3_DST_DIMENSIONS                                                                      0x08dc
#define mmHUBPREQ3_DST_DIMENSIONS_BASE_IDX                                                             2
#define mmHUBPREQ3_DST_AFTER_SCALER                                                                    0x08dd
#define mmHUBPREQ3_DST_AFTER_SCALER_BASE_IDX                                                           2
#define mmHUBPREQ3_PREFETCH_SETTINGS                                                                   0x08de
#define mmHUBPREQ3_PREFETCH_SETTINGS_BASE_IDX                                                          2
#define mmHUBPREQ3_PREFETCH_SETTINGS_C                                                                 0x08df
#define mmHUBPREQ3_PREFETCH_SETTINGS_C_BASE_IDX                                                        2
#define mmHUBPREQ3_VBLANK_PARAMETERS_0                                                                 0x08e0
#define mmHUBPREQ3_VBLANK_PARAMETERS_0_BASE_IDX                                                        2
#define mmHUBPREQ3_VBLANK_PARAMETERS_1                                                                 0x08e1
#define mmHUBPREQ3_VBLANK_PARAMETERS_1_BASE_IDX                                                        2
#define mmHUBPREQ3_VBLANK_PARAMETERS_2                                                                 0x08e2
#define mmHUBPREQ3_VBLANK_PARAMETERS_2_BASE_IDX                                                        2
#define mmHUBPREQ3_VBLANK_PARAMETERS_3                                                                 0x08e3
#define mmHUBPREQ3_VBLANK_PARAMETERS_3_BASE_IDX                                                        2
#define mmHUBPREQ3_VBLANK_PARAMETERS_4                                                                 0x08e4
#define mmHUBPREQ3_VBLANK_PARAMETERS_4_BASE_IDX                                                        2
#define mmHUBPREQ3_FLIP_PARAMETERS_0                                                                   0x08e5
#define mmHUBPREQ3_FLIP_PARAMETERS_0_BASE_IDX                                                          2
#define mmHUBPREQ3_FLIP_PARAMETERS_1                                                                   0x08e6
#define mmHUBPREQ3_FLIP_PARAMETERS_1_BASE_IDX                                                          2
#define mmHUBPREQ3_FLIP_PARAMETERS_2                                                                   0x08e7
#define mmHUBPREQ3_FLIP_PARAMETERS_2_BASE_IDX                                                          2
#define mmHUBPREQ3_NOM_PARAMETERS_0                                                                    0x08e8
#define mmHUBPREQ3_NOM_PARAMETERS_0_BASE_IDX                                                           2
#define mmHUBPREQ3_NOM_PARAMETERS_1                                                                    0x08e9
#define mmHUBPREQ3_NOM_PARAMETERS_1_BASE_IDX                                                           2
#define mmHUBPREQ3_NOM_PARAMETERS_2                                                                    0x08ea
#define mmHUBPREQ3_NOM_PARAMETERS_2_BASE_IDX                                                           2
#define mmHUBPREQ3_NOM_PARAMETERS_3                                                                    0x08eb
#define mmHUBPREQ3_NOM_PARAMETERS_3_BASE_IDX                                                           2
#define mmHUBPREQ3_NOM_PARAMETERS_4                                                                    0x08ec
#define mmHUBPREQ3_NOM_PARAMETERS_4_BASE_IDX                                                           2
#define mmHUBPREQ3_NOM_PARAMETERS_5                                                                    0x08ed
#define mmHUBPREQ3_NOM_PARAMETERS_5_BASE_IDX                                                           2
#define mmHUBPREQ3_NOM_PARAMETERS_6                                                                    0x08ee
#define mmHUBPREQ3_NOM_PARAMETERS_6_BASE_IDX                                                           2
#define mmHUBPREQ3_NOM_PARAMETERS_7                                                                    0x08ef
#define mmHUBPREQ3_NOM_PARAMETERS_7_BASE_IDX                                                           2
#define mmHUBPREQ3_PER_LINE_DELIVERY_PRE                                                               0x08f0
#define mmHUBPREQ3_PER_LINE_DELIVERY_PRE_BASE_IDX                                                      2
#define mmHUBPREQ3_PER_LINE_DELIVERY                                                                   0x08f1
#define mmHUBPREQ3_PER_LINE_DELIVERY_BASE_IDX                                                          2
#define mmHUBPREQ3_CURSOR_SETTINGS                                                                     0x08f2
#define mmHUBPREQ3_CURSOR_SETTINGS_BASE_IDX                                                            2
#define mmHUBPREQ3_REF_FREQ_TO_PIX_FREQ                                                                0x08f3
#define mmHUBPREQ3_REF_FREQ_TO_PIX_FREQ_BASE_IDX                                                       2
#define mmHUBPREQ3_DST_Y_DELTA_DRQ_LIMIT                                                               0x08f4
#define mmHUBPREQ3_DST_Y_DELTA_DRQ_LIMIT_BASE_IDX                                                      2
#define mmHUBPREQ3_HUBPREQ_MEM_PWR_CTRL                                                                0x08f5
#define mmHUBPREQ3_HUBPREQ_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPREQ3_HUBPREQ_MEM_PWR_STATUS                                                              0x08f6
#define mmHUBPREQ3_HUBPREQ_MEM_PWR_STATUS_BASE_IDX                                                     2


// addressBlock: dce_dc_dcbubp3_dispdec_hubpret_dispdec
// base address: 0xa50
#define mmHUBPRET3_HUBPRET_CONTROL                                                                     0x0900
#define mmHUBPRET3_HUBPRET_CONTROL_BASE_IDX                                                            2
#define mmHUBPRET3_HUBPRET_MEM_PWR_CTRL                                                                0x0901
#define mmHUBPRET3_HUBPRET_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPRET3_HUBPRET_MEM_PWR_STATUS                                                              0x0902
#define mmHUBPRET3_HUBPRET_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmHUBPRET3_HUBPRET_READ_LINE_CTRL0                                                             0x0903
#define mmHUBPRET3_HUBPRET_READ_LINE_CTRL0_BASE_IDX                                                    2
#define mmHUBPRET3_HUBPRET_READ_LINE_CTRL1                                                             0x0904
#define mmHUBPRET3_HUBPRET_READ_LINE_CTRL1_BASE_IDX                                                    2
#define mmHUBPRET3_HUBPRET_READ_LINE0                                                                  0x0905
#define mmHUBPRET3_HUBPRET_READ_LINE0_BASE_IDX                                                         2
#define mmHUBPRET3_HUBPRET_READ_LINE1                                                                  0x0906
#define mmHUBPRET3_HUBPRET_READ_LINE1_BASE_IDX                                                         2
#define mmHUBPRET3_HUBPRET_INTERRUPT                                                                   0x0907
#define mmHUBPRET3_HUBPRET_INTERRUPT_BASE_IDX                                                          2
#define mmHUBPRET3_HUBPRET_READ_LINE_VALUE                                                             0x0908
#define mmHUBPRET3_HUBPRET_READ_LINE_VALUE_BASE_IDX                                                    2
#define mmHUBPRET3_HUBPRET_READ_LINE_STATUS                                                            0x0909
#define mmHUBPRET3_HUBPRET_READ_LINE_STATUS_BASE_IDX                                                   2


// addressBlock: dce_dc_dcbubp3_dispdec_cursor0_dispdec
// base address: 0xa50
#define mmCURSOR0_3_CURSOR_CONTROL                                                                     0x090c
#define mmCURSOR0_3_CURSOR_CONTROL_BASE_IDX                                                            2
#define mmCURSOR0_3_CURSOR_SURFACE_ADDRESS                                                             0x090d
#define mmCURSOR0_3_CURSOR_SURFACE_ADDRESS_BASE_IDX                                                    2
#define mmCURSOR0_3_CURSOR_SURFACE_ADDRESS_HIGH                                                        0x090e
#define mmCURSOR0_3_CURSOR_SURFACE_ADDRESS_HIGH_BASE_IDX                                               2
#define mmCURSOR0_3_CURSOR_SIZE                                                                        0x090f
#define mmCURSOR0_3_CURSOR_SIZE_BASE_IDX                                                               2
#define mmCURSOR0_3_CURSOR_POSITION                                                                    0x0910
#define mmCURSOR0_3_CURSOR_POSITION_BASE_IDX                                                           2
#define mmCURSOR0_3_CURSOR_HOT_SPOT                                                                    0x0911
#define mmCURSOR0_3_CURSOR_HOT_SPOT_BASE_IDX                                                           2
#define mmCURSOR0_3_CURSOR_STEREO_CONTROL                                                              0x0912
#define mmCURSOR0_3_CURSOR_STEREO_CONTROL_BASE_IDX                                                     2
#define mmCURSOR0_3_CURSOR_DST_OFFSET                                                                  0x0913
#define mmCURSOR0_3_CURSOR_DST_OFFSET_BASE_IDX                                                         2
#define mmCURSOR0_3_CURSOR_MEM_PWR_CTRL                                                                0x0914
#define mmCURSOR0_3_CURSOR_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmCURSOR0_3_CURSOR_MEM_PWR_STATUS                                                              0x0915
#define mmCURSOR0_3_CURSOR_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmCURSOR0_3_DMDATA_ADDRESS_HIGH                                                                0x0916
#define mmCURSOR0_3_DMDATA_ADDRESS_HIGH_BASE_IDX                                                       2
#define mmCURSOR0_3_DMDATA_ADDRESS_LOW                                                                 0x0917
#define mmCURSOR0_3_DMDATA_ADDRESS_LOW_BASE_IDX                                                        2
#define mmCURSOR0_3_DMDATA_CNTL                                                                        0x0918
#define mmCURSOR0_3_DMDATA_CNTL_BASE_IDX                                                               2
#define mmCURSOR0_3_DMDATA_QOS_CNTL                                                                    0x0919
#define mmCURSOR0_3_DMDATA_QOS_CNTL_BASE_IDX                                                           2
#define mmCURSOR0_3_DMDATA_STATUS                                                                      0x091a
#define mmCURSOR0_3_DMDATA_STATUS_BASE_IDX                                                             2
#define mmCURSOR0_3_DMDATA_SW_CNTL                                                                     0x091b
#define mmCURSOR0_3_DMDATA_SW_CNTL_BASE_IDX                                                            2
#define mmCURSOR0_3_DMDATA_SW_DATA                                                                     0x091c
#define mmCURSOR0_3_DMDATA_SW_DATA_BASE_IDX                                                            2


// addressBlock: dce_dc_dcbubp3_dispdec_hubp_dcperfmon_dc_perfmon_dispdec
// base address: 0x24c4
#define mmDC_PERFMON10_PERFCOUNTER_CNTL                                                                0x0931
#define mmDC_PERFMON10_PERFCOUNTER_CNTL_BASE_IDX                                                       2
#define mmDC_PERFMON10_PERFCOUNTER_CNTL2                                                               0x0932
#define mmDC_PERFMON10_PERFCOUNTER_CNTL2_BASE_IDX                                                      2
#define mmDC_PERFMON10_PERFCOUNTER_STATE                                                               0x0933
#define mmDC_PERFMON10_PERFCOUNTER_STATE_BASE_IDX                                                      2
#define mmDC_PERFMON10_PERFMON_CNTL                                                                    0x0934
#define mmDC_PERFMON10_PERFMON_CNTL_BASE_IDX                                                           2
#define mmDC_PERFMON10_PERFMON_CNTL2                                                                   0x0935
#define mmDC_PERFMON10_PERFMON_CNTL2_BASE_IDX                                                          2
#define mmDC_PERFMON10_PERFMON_CVALUE_INT_MISC                                                         0x0936
#define mmDC_PERFMON10_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                2
#define mmDC_PERFMON10_PERFMON_CVALUE_LOW                                                              0x0937
#define mmDC_PERFMON10_PERFMON_CVALUE_LOW_BASE_IDX                                                     2
#define mmDC_PERFMON10_PERFMON_HI                                                                      0x0938
#define mmDC_PERFMON10_PERFMON_HI_BASE_IDX                                                             2
#define mmDC_PERFMON10_PERFMON_LOW                                                                     0x0939
#define mmDC_PERFMON10_PERFMON_LOW_BASE_IDX                                                            2


// addressBlock: dce_dc_dcbubp3_dispdec_hubpxfc_dispdec
// base address: 0xa50
#define mmHUBPXFC3_HUBP_XFC_CNTL                                                                       0x093d
#define mmHUBPXFC3_HUBP_XFC_CNTL_BASE_IDX                                                              2
#define mmHUBPXFC3_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB                                                     0x093e
#define mmHUBPXFC3_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC3_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB                                                     0x093f
#define mmHUBPXFC3_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC3_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB                                                     0x0940
#define mmHUBPXFC3_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC3_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB                                                     0x0941
#define mmHUBPXFC3_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC3_HUBP_XFC_XBUF_RD_PITCH                                                              0x0942
#define mmHUBPXFC3_HUBP_XFC_XBUF_RD_PITCH_BASE_IDX                                                     2
#define mmHUBPXFC3_HUBP_XFC_DELAY_CONFIG0                                                              0x0943
#define mmHUBPXFC3_HUBP_XFC_DELAY_CONFIG0_BASE_IDX                                                     2
#define mmHUBPXFC3_HUBP_XFC_DELAY_CONFIG1                                                              0x0944
#define mmHUBPXFC3_HUBP_XFC_DELAY_CONFIG1_BASE_IDX                                                     2
#define mmHUBPXFC3_HUBP_XFC_DELAY_CONFIG2                                                              0x0945
#define mmHUBPXFC3_HUBP_XFC_DELAY_CONFIG2_BASE_IDX                                                     2
#define mmHUBPXFC3_HUBP_XFC_UNDERFLOW_STATUS                                                           0x0946
#define mmHUBPXFC3_HUBP_XFC_UNDERFLOW_STATUS_BASE_IDX                                                  2
#define mmHUBPXFC3_HUBP_XFC_SLV_VTG_CONFIG0                                                            0x0947
#define mmHUBPXFC3_HUBP_XFC_SLV_VTG_CONFIG0_BASE_IDX                                                   2
#define mmHUBPXFC3_HUBP_XFC_SLV_VTG_CONFIG1                                                            0x0948
#define mmHUBPXFC3_HUBP_XFC_SLV_VTG_CONFIG1_BASE_IDX                                                   2
#define mmHUBPXFC3_HUBP_XFC_SLV_SCALER_CONFIG0                                                         0x0949
#define mmHUBPXFC3_HUBP_XFC_SLV_SCALER_CONFIG0_BASE_IDX                                                2
#define mmHUBPXFC3_HUBP_XFC_SLV_SCALER_CONFIG1                                                         0x094a
#define mmHUBPXFC3_HUBP_XFC_SLV_SCALER_CONFIG1_BASE_IDX                                                2
#define mmHUBPXFC3_HUBP_XFC_MPC_CONFIG                                                                 0x094b
#define mmHUBPXFC3_HUBP_XFC_MPC_CONFIG_BASE_IDX                                                        2


// addressBlock: dce_dc_dcbubp4_dispdec_hubp_dispdec
// base address: 0xdc0
#define mmHUBP4_DCSURF_SURFACE_CONFIG                                                                  0x0955
#define mmHUBP4_DCSURF_SURFACE_CONFIG_BASE_IDX                                                         2
#define mmHUBP4_DCSURF_ADDR_CONFIG                                                                     0x0956
#define mmHUBP4_DCSURF_ADDR_CONFIG_BASE_IDX                                                            2
#define mmHUBP4_DCSURF_TILING_CONFIG                                                                   0x0957
#define mmHUBP4_DCSURF_TILING_CONFIG_BASE_IDX                                                          2
#define mmHUBP4_DCSURF_PRI_VIEWPORT_START                                                              0x0959
#define mmHUBP4_DCSURF_PRI_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP4_DCSURF_PRI_VIEWPORT_DIMENSION                                                          0x095a
#define mmHUBP4_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP4_DCSURF_PRI_VIEWPORT_START_C                                                            0x095b
#define mmHUBP4_DCSURF_PRI_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP4_DCSURF_PRI_VIEWPORT_DIMENSION_C                                                        0x095c
#define mmHUBP4_DCSURF_PRI_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP4_DCSURF_SEC_VIEWPORT_START                                                              0x095d
#define mmHUBP4_DCSURF_SEC_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP4_DCSURF_SEC_VIEWPORT_DIMENSION                                                          0x095e
#define mmHUBP4_DCSURF_SEC_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP4_DCSURF_SEC_VIEWPORT_START_C                                                            0x095f
#define mmHUBP4_DCSURF_SEC_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP4_DCSURF_SEC_VIEWPORT_DIMENSION_C                                                        0x0960
#define mmHUBP4_DCSURF_SEC_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP4_DCHUBP_REQ_SIZE_CONFIG                                                                 0x0961
#define mmHUBP4_DCHUBP_REQ_SIZE_CONFIG_BASE_IDX                                                        2
#define mmHUBP4_DCHUBP_REQ_SIZE_CONFIG_C                                                               0x0962
#define mmHUBP4_DCHUBP_REQ_SIZE_CONFIG_C_BASE_IDX                                                      2
#define mmHUBP4_DCHUBP_CNTL                                                                            0x0963
#define mmHUBP4_DCHUBP_CNTL_BASE_IDX                                                                   2
#define mmHUBP4_HUBP_CLK_CNTL                                                                          0x0964
#define mmHUBP4_HUBP_CLK_CNTL_BASE_IDX                                                                 2
#define mmHUBP4_DCHUBP_VMPG_CONFIG                                                                     0x0965
#define mmHUBP4_DCHUBP_VMPG_CONFIG_BASE_IDX                                                            2
#define mmHUBP4_HUBPREQ_DEBUG_DB                                                                       0x0966
#define mmHUBP4_HUBPREQ_DEBUG_DB_BASE_IDX                                                              2
#define mmHUBP4_HUBPREQ_DEBUG                                                                          0x0967
#define mmHUBP4_HUBPREQ_DEBUG_BASE_IDX                                                                 2
#define mmHUBP4_HUBP_MEASURE_WIN_CTRL_DCFCLK                                                           0x096b
#define mmHUBP4_HUBP_MEASURE_WIN_CTRL_DCFCLK_BASE_IDX                                                  2
#define mmHUBP4_HUBP_MEASURE_WIN_CTRL_DPPCLK                                                           0x096c
#define mmHUBP4_HUBP_MEASURE_WIN_CTRL_DPPCLK_BASE_IDX                                                  2


// addressBlock: dce_dc_dcbubp4_dispdec_hubpreq_dispdec
// base address: 0xdc0
#define mmHUBPREQ4_DCSURF_SURFACE_PITCH                                                                0x0977
#define mmHUBPREQ4_DCSURF_SURFACE_PITCH_BASE_IDX                                                       2
#define mmHUBPREQ4_DCSURF_SURFACE_PITCH_C                                                              0x0978
#define mmHUBPREQ4_DCSURF_SURFACE_PITCH_C_BASE_IDX                                                     2
#define mmHUBPREQ4_VMID_SETTINGS_0                                                                     0x0979
#define mmHUBPREQ4_VMID_SETTINGS_0_BASE_IDX                                                            2
#define mmHUBPREQ4_DCSURF_PRIMARY_SURFACE_ADDRESS                                                      0x097a
#define mmHUBPREQ4_DCSURF_PRIMARY_SURFACE_ADDRESS_BASE_IDX                                             2
#define mmHUBPREQ4_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH                                                 0x097b
#define mmHUBPREQ4_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                        2
#define mmHUBPREQ4_DCSURF_PRIMARY_SURFACE_ADDRESS_C                                                    0x097c
#define mmHUBPREQ4_DCSURF_PRIMARY_SURFACE_ADDRESS_C_BASE_IDX                                           2
#define mmHUBPREQ4_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C                                               0x097d
#define mmHUBPREQ4_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                      2
#define mmHUBPREQ4_DCSURF_SECONDARY_SURFACE_ADDRESS                                                    0x097e
#define mmHUBPREQ4_DCSURF_SECONDARY_SURFACE_ADDRESS_BASE_IDX                                           2
#define mmHUBPREQ4_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH                                               0x097f
#define mmHUBPREQ4_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                      2
#define mmHUBPREQ4_DCSURF_SECONDARY_SURFACE_ADDRESS_C                                                  0x0980
#define mmHUBPREQ4_DCSURF_SECONDARY_SURFACE_ADDRESS_C_BASE_IDX                                         2
#define mmHUBPREQ4_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C                                             0x0981
#define mmHUBPREQ4_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                    2
#define mmHUBPREQ4_DCSURF_PRIMARY_META_SURFACE_ADDRESS                                                 0x0982
#define mmHUBPREQ4_DCSURF_PRIMARY_META_SURFACE_ADDRESS_BASE_IDX                                        2
#define mmHUBPREQ4_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH                                            0x0983
#define mmHUBPREQ4_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                   2
#define mmHUBPREQ4_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C                                               0x0984
#define mmHUBPREQ4_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C_BASE_IDX                                      2
#define mmHUBPREQ4_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C                                          0x0985
#define mmHUBPREQ4_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                 2
#define mmHUBPREQ4_DCSURF_SECONDARY_META_SURFACE_ADDRESS                                               0x0986
#define mmHUBPREQ4_DCSURF_SECONDARY_META_SURFACE_ADDRESS_BASE_IDX                                      2
#define mmHUBPREQ4_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH                                          0x0987
#define mmHUBPREQ4_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                 2
#define mmHUBPREQ4_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C                                             0x0988
#define mmHUBPREQ4_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C_BASE_IDX                                    2
#define mmHUBPREQ4_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C                                        0x0989
#define mmHUBPREQ4_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                               2
#define mmHUBPREQ4_DCSURF_SURFACE_CONTROL                                                              0x098a
#define mmHUBPREQ4_DCSURF_SURFACE_CONTROL_BASE_IDX                                                     2
#define mmHUBPREQ4_DCSURF_FLIP_CONTROL                                                                 0x098b
#define mmHUBPREQ4_DCSURF_FLIP_CONTROL_BASE_IDX                                                        2
#define mmHUBPREQ4_DCSURF_FLIP_CONTROL2                                                                0x098c
#define mmHUBPREQ4_DCSURF_FLIP_CONTROL2_BASE_IDX                                                       2
#define mmHUBPREQ4_DCSURF_QUEUE_CONTROL                                                                0x098d
#define mmHUBPREQ4_DCSURF_QUEUE_CONTROL_BASE_IDX                                                       2
#define mmHUBPREQ4_DCSURF_FRAME_PACING_TIME                                                            0x098e
#define mmHUBPREQ4_DCSURF_FRAME_PACING_TIME_BASE_IDX                                                   2
#define mmHUBPREQ4_SURFACE_CURRENT_PACING_COUNTER                                                      0x098f
#define mmHUBPREQ4_SURFACE_CURRENT_PACING_COUNTER_BASE_IDX                                             2
#define mmHUBPREQ4_DCSURF_SURFACE_FLIP_INTERRUPT                                                       0x0990
#define mmHUBPREQ4_DCSURF_SURFACE_FLIP_INTERRUPT_BASE_IDX                                              2
#define mmHUBPREQ4_DCSURF_SURFACE_INUSE                                                                0x0991
#define mmHUBPREQ4_DCSURF_SURFACE_INUSE_BASE_IDX                                                       2
#define mmHUBPREQ4_DCSURF_SURFACE_INUSE_HIGH                                                           0x0992
#define mmHUBPREQ4_DCSURF_SURFACE_INUSE_HIGH_BASE_IDX                                                  2
#define mmHUBPREQ4_DCSURF_SURFACE_INUSE_C                                                              0x0993
#define mmHUBPREQ4_DCSURF_SURFACE_INUSE_C_BASE_IDX                                                     2
#define mmHUBPREQ4_DCSURF_SURFACE_INUSE_HIGH_C                                                         0x0994
#define mmHUBPREQ4_DCSURF_SURFACE_INUSE_HIGH_C_BASE_IDX                                                2
#define mmHUBPREQ4_DCSURF_SURFACE_EARLIEST_INUSE                                                       0x0995
#define mmHUBPREQ4_DCSURF_SURFACE_EARLIEST_INUSE_BASE_IDX                                              2
#define mmHUBPREQ4_DCSURF_SURFACE_EARLIEST_INUSE_HIGH                                                  0x0996
#define mmHUBPREQ4_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_BASE_IDX                                         2
#define mmHUBPREQ4_DCSURF_SURFACE_EARLIEST_INUSE_C                                                     0x0997
#define mmHUBPREQ4_DCSURF_SURFACE_EARLIEST_INUSE_C_BASE_IDX                                            2
#define mmHUBPREQ4_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C                                                0x0998
#define mmHUBPREQ4_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C_BASE_IDX                                       2
#define mmHUBPREQ4_DCN_EXPANSION_MODE                                                                  0x099c
#define mmHUBPREQ4_DCN_EXPANSION_MODE_BASE_IDX                                                         2
#define mmHUBPREQ4_DCN_TTU_QOS_WM                                                                      0x099d
#define mmHUBPREQ4_DCN_TTU_QOS_WM_BASE_IDX                                                             2
#define mmHUBPREQ4_DCN_GLOBAL_TTU_CNTL                                                                 0x099e
#define mmHUBPREQ4_DCN_GLOBAL_TTU_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ4_DCN_SURF0_TTU_CNTL0                                                                 0x099f
#define mmHUBPREQ4_DCN_SURF0_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ4_DCN_SURF0_TTU_CNTL1                                                                 0x09a0
#define mmHUBPREQ4_DCN_SURF0_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ4_DCN_SURF1_TTU_CNTL0                                                                 0x09a1
#define mmHUBPREQ4_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ4_DCN_SURF1_TTU_CNTL1                                                                 0x09a2
#define mmHUBPREQ4_DCN_SURF1_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ4_DCN_CUR0_TTU_CNTL0                                                                  0x09a3
#define mmHUBPREQ4_DCN_CUR0_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ4_DCN_CUR0_TTU_CNTL1                                                                  0x09a4
#define mmHUBPREQ4_DCN_CUR0_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ4_DCN_CUR1_TTU_CNTL0                                                                  0x09a5
#define mmHUBPREQ4_DCN_CUR1_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ4_DCN_CUR1_TTU_CNTL1                                                                  0x09a6
#define mmHUBPREQ4_DCN_CUR1_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ4_DCN_VM_SYSTEM_APERTURE_LOW_ADDR                                                     0x09a7
#define mmHUBPREQ4_DCN_VM_SYSTEM_APERTURE_LOW_ADDR_BASE_IDX                                            2
#define mmHUBPREQ4_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR                                                    0x09a8
#define mmHUBPREQ4_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_BASE_IDX                                           2
#define mmHUBPREQ4_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB                                              0x09a9
#define mmHUBPREQ4_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ4_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB                                              0x09aa
#define mmHUBPREQ4_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ4_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB                                    0x09ab
#define mmHUBPREQ4_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB_BASE_IDX                           2
#define mmHUBPREQ4_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB                                    0x09ac
#define mmHUBPREQ4_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB_BASE_IDX                           2
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB                                             0x09ad
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB_BASE_IDX                                    2
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB                                             0x09ae
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB_BASE_IDX                                    2
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB                                            0x09af
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB                                            0x09b0
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB_BASE_IDX                                   2
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB                                              0x09b1
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB                                              0x09b2
#define mmHUBPREQ4_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ4_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB                                            0x09b3
#define mmHUBPREQ4_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ4_DC_VM_CONTEXT0_CNTL                                                                 0x09b4
#define mmHUBPREQ4_DC_VM_CONTEXT0_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ4_DCN_VM_MX_L1_TLB_CNTL                                                               0x09b5
#define mmHUBPREQ4_DCN_VM_MX_L1_TLB_CNTL_BASE_IDX                                                      2
#define mmHUBPREQ4_BLANK_OFFSET_0                                                                      0x09b6
#define mmHUBPREQ4_BLANK_OFFSET_0_BASE_IDX                                                             2
#define mmHUBPREQ4_BLANK_OFFSET_1                                                                      0x09b7
#define mmHUBPREQ4_BLANK_OFFSET_1_BASE_IDX                                                             2
#define mmHUBPREQ4_DST_DIMENSIONS                                                                      0x09b8
#define mmHUBPREQ4_DST_DIMENSIONS_BASE_IDX                                                             2
#define mmHUBPREQ4_DST_AFTER_SCALER                                                                    0x09b9
#define mmHUBPREQ4_DST_AFTER_SCALER_BASE_IDX                                                           2
#define mmHUBPREQ4_PREFETCH_SETTINGS                                                                   0x09ba
#define mmHUBPREQ4_PREFETCH_SETTINGS_BASE_IDX                                                          2
#define mmHUBPREQ4_PREFETCH_SETTINGS_C                                                                 0x09bb
#define mmHUBPREQ4_PREFETCH_SETTINGS_C_BASE_IDX                                                        2
#define mmHUBPREQ4_VBLANK_PARAMETERS_0                                                                 0x09bc
#define mmHUBPREQ4_VBLANK_PARAMETERS_0_BASE_IDX                                                        2
#define mmHUBPREQ4_VBLANK_PARAMETERS_1                                                                 0x09bd
#define mmHUBPREQ4_VBLANK_PARAMETERS_1_BASE_IDX                                                        2
#define mmHUBPREQ4_VBLANK_PARAMETERS_2                                                                 0x09be
#define mmHUBPREQ4_VBLANK_PARAMETERS_2_BASE_IDX                                                        2
#define mmHUBPREQ4_VBLANK_PARAMETERS_3                                                                 0x09bf
#define mmHUBPREQ4_VBLANK_PARAMETERS_3_BASE_IDX                                                        2
#define mmHUBPREQ4_VBLANK_PARAMETERS_4                                                                 0x09c0
#define mmHUBPREQ4_VBLANK_PARAMETERS_4_BASE_IDX                                                        2
#define mmHUBPREQ4_FLIP_PARAMETERS_0                                                                   0x09c1
#define mmHUBPREQ4_FLIP_PARAMETERS_0_BASE_IDX                                                          2
#define mmHUBPREQ4_FLIP_PARAMETERS_1                                                                   0x09c2
#define mmHUBPREQ4_FLIP_PARAMETERS_1_BASE_IDX                                                          2
#define mmHUBPREQ4_FLIP_PARAMETERS_2                                                                   0x09c3
#define mmHUBPREQ4_FLIP_PARAMETERS_2_BASE_IDX                                                          2
#define mmHUBPREQ4_NOM_PARAMETERS_0                                                                    0x09c4
#define mmHUBPREQ4_NOM_PARAMETERS_0_BASE_IDX                                                           2
#define mmHUBPREQ4_NOM_PARAMETERS_1                                                                    0x09c5
#define mmHUBPREQ4_NOM_PARAMETERS_1_BASE_IDX                                                           2
#define mmHUBPREQ4_NOM_PARAMETERS_2                                                                    0x09c6
#define mmHUBPREQ4_NOM_PARAMETERS_2_BASE_IDX                                                           2
#define mmHUBPREQ4_NOM_PARAMETERS_3                                                                    0x09c7
#define mmHUBPREQ4_NOM_PARAMETERS_3_BASE_IDX                                                           2
#define mmHUBPREQ4_NOM_PARAMETERS_4                                                                    0x09c8
#define mmHUBPREQ4_NOM_PARAMETERS_4_BASE_IDX                                                           2
#define mmHUBPREQ4_NOM_PARAMETERS_5                                                                    0x09c9
#define mmHUBPREQ4_NOM_PARAMETERS_5_BASE_IDX                                                           2
#define mmHUBPREQ4_NOM_PARAMETERS_6                                                                    0x09ca
#define mmHUBPREQ4_NOM_PARAMETERS_6_BASE_IDX                                                           2
#define mmHUBPREQ4_NOM_PARAMETERS_7                                                                    0x09cb
#define mmHUBPREQ4_NOM_PARAMETERS_7_BASE_IDX                                                           2
#define mmHUBPREQ4_PER_LINE_DELIVERY_PRE                                                               0x09cc
#define mmHUBPREQ4_PER_LINE_DELIVERY_PRE_BASE_IDX                                                      2
#define mmHUBPREQ4_PER_LINE_DELIVERY                                                                   0x09cd
#define mmHUBPREQ4_PER_LINE_DELIVERY_BASE_IDX                                                          2
#define mmHUBPREQ4_CURSOR_SETTINGS                                                                     0x09ce
#define mmHUBPREQ4_CURSOR_SETTINGS_BASE_IDX                                                            2
#define mmHUBPREQ4_REF_FREQ_TO_PIX_FREQ                                                                0x09cf
#define mmHUBPREQ4_REF_FREQ_TO_PIX_FREQ_BASE_IDX                                                       2
#define mmHUBPREQ4_DST_Y_DELTA_DRQ_LIMIT                                                               0x09d0
#define mmHUBPREQ4_DST_Y_DELTA_DRQ_LIMIT_BASE_IDX                                                      2
#define mmHUBPREQ4_HUBPREQ_MEM_PWR_CTRL                                                                0x09d1
#define mmHUBPREQ4_HUBPREQ_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPREQ4_HUBPREQ_MEM_PWR_STATUS                                                              0x09d2
#define mmHUBPREQ4_HUBPREQ_MEM_PWR_STATUS_BASE_IDX                                                     2


// addressBlock: dce_dc_dcbubp4_dispdec_hubpret_dispdec
// base address: 0xdc0
#define mmHUBPRET4_HUBPRET_CONTROL                                                                     0x09dc
#define mmHUBPRET4_HUBPRET_CONTROL_BASE_IDX                                                            2
#define mmHUBPRET4_HUBPRET_MEM_PWR_CTRL                                                                0x09dd
#define mmHUBPRET4_HUBPRET_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPRET4_HUBPRET_MEM_PWR_STATUS                                                              0x09de
#define mmHUBPRET4_HUBPRET_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmHUBPRET4_HUBPRET_READ_LINE_CTRL0                                                             0x09df
#define mmHUBPRET4_HUBPRET_READ_LINE_CTRL0_BASE_IDX                                                    2
#define mmHUBPRET4_HUBPRET_READ_LINE_CTRL1                                                             0x09e0
#define mmHUBPRET4_HUBPRET_READ_LINE_CTRL1_BASE_IDX                                                    2
#define mmHUBPRET4_HUBPRET_READ_LINE0                                                                  0x09e1
#define mmHUBPRET4_HUBPRET_READ_LINE0_BASE_IDX                                                         2
#define mmHUBPRET4_HUBPRET_READ_LINE1                                                                  0x09e2
#define mmHUBPRET4_HUBPRET_READ_LINE1_BASE_IDX                                                         2
#define mmHUBPRET4_HUBPRET_INTERRUPT                                                                   0x09e3
#define mmHUBPRET4_HUBPRET_INTERRUPT_BASE_IDX                                                          2
#define mmHUBPRET4_HUBPRET_READ_LINE_VALUE                                                             0x09e4
#define mmHUBPRET4_HUBPRET_READ_LINE_VALUE_BASE_IDX                                                    2
#define mmHUBPRET4_HUBPRET_READ_LINE_STATUS                                                            0x09e5
#define mmHUBPRET4_HUBPRET_READ_LINE_STATUS_BASE_IDX                                                   2


// addressBlock: dce_dc_dcbubp4_dispdec_cursor0_dispdec
// base address: 0xdc0
#define mmCURSOR0_4_CURSOR_CONTROL                                                                     0x09e8
#define mmCURSOR0_4_CURSOR_CONTROL_BASE_IDX                                                            2
#define mmCURSOR0_4_CURSOR_SURFACE_ADDRESS                                                             0x09e9
#define mmCURSOR0_4_CURSOR_SURFACE_ADDRESS_BASE_IDX                                                    2
#define mmCURSOR0_4_CURSOR_SURFACE_ADDRESS_HIGH                                                        0x09ea
#define mmCURSOR0_4_CURSOR_SURFACE_ADDRESS_HIGH_BASE_IDX                                               2
#define mmCURSOR0_4_CURSOR_SIZE                                                                        0x09eb
#define mmCURSOR0_4_CURSOR_SIZE_BASE_IDX                                                               2
#define mmCURSOR0_4_CURSOR_POSITION                                                                    0x09ec
#define mmCURSOR0_4_CURSOR_POSITION_BASE_IDX                                                           2
#define mmCURSOR0_4_CURSOR_HOT_SPOT                                                                    0x09ed
#define mmCURSOR0_4_CURSOR_HOT_SPOT_BASE_IDX                                                           2
#define mmCURSOR0_4_CURSOR_STEREO_CONTROL                                                              0x09ee
#define mmCURSOR0_4_CURSOR_STEREO_CONTROL_BASE_IDX                                                     2
#define mmCURSOR0_4_CURSOR_DST_OFFSET                                                                  0x09ef
#define mmCURSOR0_4_CURSOR_DST_OFFSET_BASE_IDX                                                         2
#define mmCURSOR0_4_CURSOR_MEM_PWR_CTRL                                                                0x09f0
#define mmCURSOR0_4_CURSOR_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmCURSOR0_4_CURSOR_MEM_PWR_STATUS                                                              0x09f1
#define mmCURSOR0_4_CURSOR_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmCURSOR0_4_DMDATA_ADDRESS_HIGH                                                                0x09f2
#define mmCURSOR0_4_DMDATA_ADDRESS_HIGH_BASE_IDX                                                       2
#define mmCURSOR0_4_DMDATA_ADDRESS_LOW                                                                 0x09f3
#define mmCURSOR0_4_DMDATA_ADDRESS_LOW_BASE_IDX                                                        2
#define mmCURSOR0_4_DMDATA_CNTL                                                                        0x09f4
#define mmCURSOR0_4_DMDATA_CNTL_BASE_IDX                                                               2
#define mmCURSOR0_4_DMDATA_QOS_CNTL                                                                    0x09f5
#define mmCURSOR0_4_DMDATA_QOS_CNTL_BASE_IDX                                                           2
#define mmCURSOR0_4_DMDATA_STATUS                                                                      0x09f6
#define mmCURSOR0_4_DMDATA_STATUS_BASE_IDX                                                             2
#define mmCURSOR0_4_DMDATA_SW_CNTL                                                                     0x09f7
#define mmCURSOR0_4_DMDATA_SW_CNTL_BASE_IDX                                                            2
#define mmCURSOR0_4_DMDATA_SW_DATA                                                                     0x09f8
#define mmCURSOR0_4_DMDATA_SW_DATA_BASE_IDX                                                            2


// addressBlock: dce_dc_dcbubp4_dispdec_hubp_dcperfmon_dc_perfmon_dispdec
// base address: 0x2834
#define mmDC_PERFMON11_PERFCOUNTER_CNTL                                                                0x0a0d
#define mmDC_PERFMON11_PERFCOUNTER_CNTL_BASE_IDX                                                       2
#define mmDC_PERFMON11_PERFCOUNTER_CNTL2                                                               0x0a0e
#define mmDC_PERFMON11_PERFCOUNTER_CNTL2_BASE_IDX                                                      2
#define mmDC_PERFMON11_PERFCOUNTER_STATE                                                               0x0a0f
#define mmDC_PERFMON11_PERFCOUNTER_STATE_BASE_IDX                                                      2
#define mmDC_PERFMON11_PERFMON_CNTL                                                                    0x0a10
#define mmDC_PERFMON11_PERFMON_CNTL_BASE_IDX                                                           2
#define mmDC_PERFMON11_PERFMON_CNTL2                                                                   0x0a11
#define mmDC_PERFMON11_PERFMON_CNTL2_BASE_IDX                                                          2
#define mmDC_PERFMON11_PERFMON_CVALUE_INT_MISC                                                         0x0a12
#define mmDC_PERFMON11_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                2
#define mmDC_PERFMON11_PERFMON_CVALUE_LOW                                                              0x0a13
#define mmDC_PERFMON11_PERFMON_CVALUE_LOW_BASE_IDX                                                     2
#define mmDC_PERFMON11_PERFMON_HI                                                                      0x0a14
#define mmDC_PERFMON11_PERFMON_HI_BASE_IDX                                                             2
#define mmDC_PERFMON11_PERFMON_LOW                                                                     0x0a15
#define mmDC_PERFMON11_PERFMON_LOW_BASE_IDX                                                            2


// addressBlock: dce_dc_dcbubp4_dispdec_hubpxfc_dispdec
// base address: 0xdc0
#define mmHUBPXFC4_HUBP_XFC_CNTL                                                                       0x0a19
#define mmHUBPXFC4_HUBP_XFC_CNTL_BASE_IDX                                                              2
#define mmHUBPXFC4_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB                                                     0x0a1a
#define mmHUBPXFC4_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC4_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB                                                     0x0a1b
#define mmHUBPXFC4_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC4_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB                                                     0x0a1c
#define mmHUBPXFC4_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC4_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB                                                     0x0a1d
#define mmHUBPXFC4_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC4_HUBP_XFC_XBUF_RD_PITCH                                                              0x0a1e
#define mmHUBPXFC4_HUBP_XFC_XBUF_RD_PITCH_BASE_IDX                                                     2
#define mmHUBPXFC4_HUBP_XFC_DELAY_CONFIG0                                                              0x0a1f
#define mmHUBPXFC4_HUBP_XFC_DELAY_CONFIG0_BASE_IDX                                                     2
#define mmHUBPXFC4_HUBP_XFC_DELAY_CONFIG1                                                              0x0a20
#define mmHUBPXFC4_HUBP_XFC_DELAY_CONFIG1_BASE_IDX                                                     2
#define mmHUBPXFC4_HUBP_XFC_DELAY_CONFIG2                                                              0x0a21
#define mmHUBPXFC4_HUBP_XFC_DELAY_CONFIG2_BASE_IDX                                                     2
#define mmHUBPXFC4_HUBP_XFC_UNDERFLOW_STATUS                                                           0x0a22
#define mmHUBPXFC4_HUBP_XFC_UNDERFLOW_STATUS_BASE_IDX                                                  2
#define mmHUBPXFC4_HUBP_XFC_SLV_VTG_CONFIG0                                                            0x0a23
#define mmHUBPXFC4_HUBP_XFC_SLV_VTG_CONFIG0_BASE_IDX                                                   2
#define mmHUBPXFC4_HUBP_XFC_SLV_VTG_CONFIG1                                                            0x0a24
#define mmHUBPXFC4_HUBP_XFC_SLV_VTG_CONFIG1_BASE_IDX                                                   2
#define mmHUBPXFC4_HUBP_XFC_SLV_SCALER_CONFIG0                                                         0x0a25
#define mmHUBPXFC4_HUBP_XFC_SLV_SCALER_CONFIG0_BASE_IDX                                                2
#define mmHUBPXFC4_HUBP_XFC_SLV_SCALER_CONFIG1                                                         0x0a26
#define mmHUBPXFC4_HUBP_XFC_SLV_SCALER_CONFIG1_BASE_IDX                                                2
#define mmHUBPXFC4_HUBP_XFC_MPC_CONFIG                                                                 0x0a27
#define mmHUBPXFC4_HUBP_XFC_MPC_CONFIG_BASE_IDX                                                        2


// addressBlock: dce_dc_dcbubp5_dispdec_hubp_dispdec
// base address: 0x1130
#define mmHUBP5_DCSURF_SURFACE_CONFIG                                                                  0x0a31
#define mmHUBP5_DCSURF_SURFACE_CONFIG_BASE_IDX                                                         2
#define mmHUBP5_DCSURF_ADDR_CONFIG                                                                     0x0a32
#define mmHUBP5_DCSURF_ADDR_CONFIG_BASE_IDX                                                            2
#define mmHUBP5_DCSURF_TILING_CONFIG                                                                   0x0a33
#define mmHUBP5_DCSURF_TILING_CONFIG_BASE_IDX                                                          2
#define mmHUBP5_DCSURF_PRI_VIEWPORT_START                                                              0x0a35
#define mmHUBP5_DCSURF_PRI_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP5_DCSURF_PRI_VIEWPORT_DIMENSION                                                          0x0a36
#define mmHUBP5_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP5_DCSURF_PRI_VIEWPORT_START_C                                                            0x0a37
#define mmHUBP5_DCSURF_PRI_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP5_DCSURF_PRI_VIEWPORT_DIMENSION_C                                                        0x0a38
#define mmHUBP5_DCSURF_PRI_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP5_DCSURF_SEC_VIEWPORT_START                                                              0x0a39
#define mmHUBP5_DCSURF_SEC_VIEWPORT_START_BASE_IDX                                                     2
#define mmHUBP5_DCSURF_SEC_VIEWPORT_DIMENSION                                                          0x0a3a
#define mmHUBP5_DCSURF_SEC_VIEWPORT_DIMENSION_BASE_IDX                                                 2
#define mmHUBP5_DCSURF_SEC_VIEWPORT_START_C                                                            0x0a3b
#define mmHUBP5_DCSURF_SEC_VIEWPORT_START_C_BASE_IDX                                                   2
#define mmHUBP5_DCSURF_SEC_VIEWPORT_DIMENSION_C                                                        0x0a3c
#define mmHUBP5_DCSURF_SEC_VIEWPORT_DIMENSION_C_BASE_IDX                                               2
#define mmHUBP5_DCHUBP_REQ_SIZE_CONFIG                                                                 0x0a3d
#define mmHUBP5_DCHUBP_REQ_SIZE_CONFIG_BASE_IDX                                                        2
#define mmHUBP5_DCHUBP_REQ_SIZE_CONFIG_C                                                               0x0a3e
#define mmHUBP5_DCHUBP_REQ_SIZE_CONFIG_C_BASE_IDX                                                      2
#define mmHUBP5_DCHUBP_CNTL                                                                            0x0a3f
#define mmHUBP5_DCHUBP_CNTL_BASE_IDX                                                                   2
#define mmHUBP5_HUBP_CLK_CNTL                                                                          0x0a40
#define mmHUBP5_HUBP_CLK_CNTL_BASE_IDX                                                                 2
#define mmHUBP5_DCHUBP_VMPG_CONFIG                                                                     0x0a41
#define mmHUBP5_DCHUBP_VMPG_CONFIG_BASE_IDX                                                            2
#define mmHUBP5_HUBPREQ_DEBUG_DB                                                                       0x0a42
#define mmHUBP5_HUBPREQ_DEBUG_DB_BASE_IDX                                                              2
#define mmHUBP5_HUBPREQ_DEBUG                                                                          0x0a43
#define mmHUBP5_HUBPREQ_DEBUG_BASE_IDX                                                                 2
#define mmHUBP5_HUBP_MEASURE_WIN_CTRL_DCFCLK                                                           0x0a47
#define mmHUBP5_HUBP_MEASURE_WIN_CTRL_DCFCLK_BASE_IDX                                                  2
#define mmHUBP5_HUBP_MEASURE_WIN_CTRL_DPPCLK                                                           0x0a48
#define mmHUBP5_HUBP_MEASURE_WIN_CTRL_DPPCLK_BASE_IDX                                                  2


// addressBlock: dce_dc_dcbubp5_dispdec_hubpreq_dispdec
// base address: 0x1130
#define mmHUBPREQ5_DCSURF_SURFACE_PITCH                                                                0x0a53
#define mmHUBPREQ5_DCSURF_SURFACE_PITCH_BASE_IDX                                                       2
#define mmHUBPREQ5_DCSURF_SURFACE_PITCH_C                                                              0x0a54
#define mmHUBPREQ5_DCSURF_SURFACE_PITCH_C_BASE_IDX                                                     2
#define mmHUBPREQ5_VMID_SETTINGS_0                                                                     0x0a55
#define mmHUBPREQ5_VMID_SETTINGS_0_BASE_IDX                                                            2
#define mmHUBPREQ5_DCSURF_PRIMARY_SURFACE_ADDRESS                                                      0x0a56
#define mmHUBPREQ5_DCSURF_PRIMARY_SURFACE_ADDRESS_BASE_IDX                                             2
#define mmHUBPREQ5_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH                                                 0x0a57
#define mmHUBPREQ5_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                        2
#define mmHUBPREQ5_DCSURF_PRIMARY_SURFACE_ADDRESS_C                                                    0x0a58
#define mmHUBPREQ5_DCSURF_PRIMARY_SURFACE_ADDRESS_C_BASE_IDX                                           2
#define mmHUBPREQ5_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C                                               0x0a59
#define mmHUBPREQ5_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                      2
#define mmHUBPREQ5_DCSURF_SECONDARY_SURFACE_ADDRESS                                                    0x0a5a
#define mmHUBPREQ5_DCSURF_SECONDARY_SURFACE_ADDRESS_BASE_IDX                                           2
#define mmHUBPREQ5_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH                                               0x0a5b
#define mmHUBPREQ5_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_BASE_IDX                                      2
#define mmHUBPREQ5_DCSURF_SECONDARY_SURFACE_ADDRESS_C                                                  0x0a5c
#define mmHUBPREQ5_DCSURF_SECONDARY_SURFACE_ADDRESS_C_BASE_IDX                                         2
#define mmHUBPREQ5_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C                                             0x0a5d
#define mmHUBPREQ5_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                    2
#define mmHUBPREQ5_DCSURF_PRIMARY_META_SURFACE_ADDRESS                                                 0x0a5e
#define mmHUBPREQ5_DCSURF_PRIMARY_META_SURFACE_ADDRESS_BASE_IDX                                        2
#define mmHUBPREQ5_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH                                            0x0a5f
#define mmHUBPREQ5_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                   2
#define mmHUBPREQ5_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C                                               0x0a60
#define mmHUBPREQ5_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C_BASE_IDX                                      2
#define mmHUBPREQ5_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C                                          0x0a61
#define mmHUBPREQ5_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                                 2
#define mmHUBPREQ5_DCSURF_SECONDARY_META_SURFACE_ADDRESS                                               0x0a62
#define mmHUBPREQ5_DCSURF_SECONDARY_META_SURFACE_ADDRESS_BASE_IDX                                      2
#define mmHUBPREQ5_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH                                          0x0a63
#define mmHUBPREQ5_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_BASE_IDX                                 2
#define mmHUBPREQ5_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C                                             0x0a64
#define mmHUBPREQ5_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C_BASE_IDX                                    2
#define mmHUBPREQ5_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C                                        0x0a65
#define mmHUBPREQ5_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C_BASE_IDX                               2
#define mmHUBPREQ5_DCSURF_SURFACE_CONTROL                                                              0x0a66
#define mmHUBPREQ5_DCSURF_SURFACE_CONTROL_BASE_IDX                                                     2
#define mmHUBPREQ5_DCSURF_FLIP_CONTROL                                                                 0x0a67
#define mmHUBPREQ5_DCSURF_FLIP_CONTROL_BASE_IDX                                                        2
#define mmHUBPREQ5_DCSURF_FLIP_CONTROL2                                                                0x0a68
#define mmHUBPREQ5_DCSURF_FLIP_CONTROL2_BASE_IDX                                                       2
#define mmHUBPREQ5_DCSURF_QUEUE_CONTROL                                                                0x0a69
#define mmHUBPREQ5_DCSURF_QUEUE_CONTROL_BASE_IDX                                                       2
#define mmHUBPREQ5_DCSURF_FRAME_PACING_TIME                                                            0x0a6a
#define mmHUBPREQ5_DCSURF_FRAME_PACING_TIME_BASE_IDX                                                   2
#define mmHUBPREQ5_SURFACE_CURRENT_PACING_COUNTER                                                      0x0a6b
#define mmHUBPREQ5_SURFACE_CURRENT_PACING_COUNTER_BASE_IDX                                             2
#define mmHUBPREQ5_DCSURF_SURFACE_FLIP_INTERRUPT                                                       0x0a6c
#define mmHUBPREQ5_DCSURF_SURFACE_FLIP_INTERRUPT_BASE_IDX                                              2
#define mmHUBPREQ5_DCSURF_SURFACE_INUSE                                                                0x0a6d
#define mmHUBPREQ5_DCSURF_SURFACE_INUSE_BASE_IDX                                                       2
#define mmHUBPREQ5_DCSURF_SURFACE_INUSE_HIGH                                                           0x0a6e
#define mmHUBPREQ5_DCSURF_SURFACE_INUSE_HIGH_BASE_IDX                                                  2
#define mmHUBPREQ5_DCSURF_SURFACE_INUSE_C                                                              0x0a6f
#define mmHUBPREQ5_DCSURF_SURFACE_INUSE_C_BASE_IDX                                                     2
#define mmHUBPREQ5_DCSURF_SURFACE_INUSE_HIGH_C                                                         0x0a70
#define mmHUBPREQ5_DCSURF_SURFACE_INUSE_HIGH_C_BASE_IDX                                                2
#define mmHUBPREQ5_DCSURF_SURFACE_EARLIEST_INUSE                                                       0x0a71

#define mmHUBPREQ5_DCSURF_SURFACE_EARLIEST_INUSE_BASE_IDX                                              2
#define mmHUBPREQ5_DCSURF_SURFACE_EARLIEST_INUSE_HIGH                                                  0x0a72
#define mmHUBPREQ5_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_BASE_IDX                                         2
#define mmHUBPREQ5_DCSURF_SURFACE_EARLIEST_INUSE_C                                                     0x0a73
#define mmHUBPREQ5_DCSURF_SURFACE_EARLIEST_INUSE_C_BASE_IDX                                            2
#define mmHUBPREQ5_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C                                                0x0a74
#define mmHUBPREQ5_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C_BASE_IDX                                       2
#define mmHUBPREQ5_DCN_EXPANSION_MODE                                                                  0x0a78
#define mmHUBPREQ5_DCN_EXPANSION_MODE_BASE_IDX                                                         2
#define mmHUBPREQ5_DCN_TTU_QOS_WM                                                                      0x0a79
#define mmHUBPREQ5_DCN_TTU_QOS_WM_BASE_IDX                                                             2
#define mmHUBPREQ5_DCN_GLOBAL_TTU_CNTL                                                                 0x0a7a
#define mmHUBPREQ5_DCN_GLOBAL_TTU_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ5_DCN_SURF0_TTU_CNTL0                                                                 0x0a7b
#define mmHUBPREQ5_DCN_SURF0_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ5_DCN_SURF0_TTU_CNTL1                                                                 0x0a7c
#define mmHUBPREQ5_DCN_SURF0_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ5_DCN_SURF1_TTU_CNTL0                                                                 0x0a7d
#define mmHUBPREQ5_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2
#define mmHUBPREQ5_DCN_SURF1_TTU_CNTL1                                                                 0x0a7e
#define mmHUBPREQ5_DCN_SURF1_TTU_CNTL1_BASE_IDX                                                        2
#define mmHUBPREQ5_DCN_CUR0_TTU_CNTL0                                                                  0x0a7f
#define mmHUBPREQ5_DCN_CUR0_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ5_DCN_CUR0_TTU_CNTL1                                                                  0x0a80
#define mmHUBPREQ5_DCN_CUR0_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ5_DCN_CUR1_TTU_CNTL0                                                                  0x0a81
#define mmHUBPREQ5_DCN_CUR1_TTU_CNTL0_BASE_IDX                                                         2
#define mmHUBPREQ5_DCN_CUR1_TTU_CNTL1                                                                  0x0a82
#define mmHUBPREQ5_DCN_CUR1_TTU_CNTL1_BASE_IDX                                                         2
#define mmHUBPREQ5_DCN_VM_SYSTEM_APERTURE_LOW_ADDR                                                     0x0a83
#define mmHUBPREQ5_DCN_VM_SYSTEM_APERTURE_LOW_ADDR_BASE_IDX                                            2
#define mmHUBPREQ5_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR                                                    0x0a84
#define mmHUBPREQ5_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_BASE_IDX                                           2
#define mmHUBPREQ5_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB                                              0x0a85
#define mmHUBPREQ5_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ5_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB                                              0x0a86
#define mmHUBPREQ5_DC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ5_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB                                    0x0a87
#define mmHUBPREQ5_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB_BASE_IDX                           2
#define mmHUBPREQ5_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB                                    0x0a88
#define mmHUBPREQ5_DC_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB_BASE_IDX                           2
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB                                             0x0a89
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB_BASE_IDX                                    2
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB                                             0x0a8a
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB_BASE_IDX                                    2
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB                                            0x0a8b
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB                                            0x0a8c
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB_BASE_IDX                                   2
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB                                              0x0a8d
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB_BASE_IDX                                     2
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB                                              0x0a8e
#define mmHUBPREQ5_DC_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB_BASE_IDX                                     2
#define mmHUBPREQ5_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB                                            0x0a8f
#define mmHUBPREQ5_DC_VM_CONTEXT0_PROTECTION_FAULT_ADDR_LSB_BASE_IDX                                   2
#define mmHUBPREQ5_DC_VM_CONTEXT0_CNTL                                                                 0x0a90
#define mmHUBPREQ5_DC_VM_CONTEXT0_CNTL_BASE_IDX                                                        2
#define mmHUBPREQ5_DCN_VM_MX_L1_TLB_CNTL                                                               0x0a91
#define mmHUBPREQ5_DCN_VM_MX_L1_TLB_CNTL_BASE_IDX                                                      2
#define mmHUBPREQ5_BLANK_OFFSET_0                                                                      0x0a92
#define mmHUBPREQ5_BLANK_OFFSET_0_BASE_IDX                                                             2
#define mmHUBPREQ5_BLANK_OFFSET_1                                                                      0x0a93
#define mmHUBPREQ5_BLANK_OFFSET_1_BASE_IDX                                                             2
#define mmHUBPREQ5_DST_DIMENSIONS                                                                      0x0a94
#define mmHUBPREQ5_DST_DIMENSIONS_BASE_IDX                                                             2
#define mmHUBPREQ5_DST_AFTER_SCALER                                                                    0x0a95
#define mmHUBPREQ5_DST_AFTER_SCALER_BASE_IDX                                                           2
#define mmHUBPREQ5_PREFETCH_SETTINGS                                                                   0x0a96
#define mmHUBPREQ5_PREFETCH_SETTINGS_BASE_IDX                                                          2
#define mmHUBPREQ5_PREFETCH_SETTINGS_C                                                                 0x0a97
#define mmHUBPREQ5_PREFETCH_SETTINGS_C_BASE_IDX                                                        2
#define mmHUBPREQ5_VBLANK_PARAMETERS_0                                                                 0x0a98
#define mmHUBPREQ5_VBLANK_PARAMETERS_0_BASE_IDX                                                        2
#define mmHUBPREQ5_VBLANK_PARAMETERS_1                                                                 0x0a99
#define mmHUBPREQ5_VBLANK_PARAMETERS_1_BASE_IDX                                                        2
#define mmHUBPREQ5_VBLANK_PARAMETERS_2                                                                 0x0a9a
#define mmHUBPREQ5_VBLANK_PARAMETERS_2_BASE_IDX                                                        2
#define mmHUBPREQ5_VBLANK_PARAMETERS_3                                                                 0x0a9b
#define mmHUBPREQ5_VBLANK_PARAMETERS_3_BASE_IDX                                                        2
#define mmHUBPREQ5_VBLANK_PARAMETERS_4                                                                 0x0a9c
#define mmHUBPREQ5_VBLANK_PARAMETERS_4_BASE_IDX                                                        2
#define mmHUBPREQ5_FLIP_PARAMETERS_0                                                                   0x0a9d
#define mmHUBPREQ5_FLIP_PARAMETERS_0_BASE_IDX                                                          2
#define mmHUBPREQ5_FLIP_PARAMETERS_1                                                                   0x0a9e
#define mmHUBPREQ5_FLIP_PARAMETERS_1_BASE_IDX                                                          2
#define mmHUBPREQ5_FLIP_PARAMETERS_2                                                                   0x0a9f
#define mmHUBPREQ5_FLIP_PARAMETERS_2_BASE_IDX                                                          2
#define mmHUBPREQ5_NOM_PARAMETERS_0                                                                    0x0aa0
#define mmHUBPREQ5_NOM_PARAMETERS_0_BASE_IDX                                                           2
#define mmHUBPREQ5_NOM_PARAMETERS_1                                                                    0x0aa1
#define mmHUBPREQ5_NOM_PARAMETERS_1_BASE_IDX                                                           2
#define mmHUBPREQ5_NOM_PARAMETERS_2                                                                    0x0aa2
#define mmHUBPREQ5_NOM_PARAMETERS_2_BASE_IDX                                                           2
#define mmHUBPREQ5_NOM_PARAMETERS_3                                                                    0x0aa3
#define mmHUBPREQ5_NOM_PARAMETERS_3_BASE_IDX                                                           2
#define mmHUBPREQ5_NOM_PARAMETERS_4                                                                    0x0aa4
#define mmHUBPREQ5_NOM_PARAMETERS_4_BASE_IDX                                                           2
#define mmHUBPREQ5_NOM_PARAMETERS_5                                                                    0x0aa5
#define mmHUBPREQ5_NOM_PARAMETERS_5_BASE_IDX                                                           2
#define mmHUBPREQ5_NOM_PARAMETERS_6                                                                    0x0aa6
#define mmHUBPREQ5_NOM_PARAMETERS_6_BASE_IDX                                                           2
#define mmHUBPREQ5_NOM_PARAMETERS_7                                                                    0x0aa7
#define mmHUBPREQ5_NOM_PARAMETERS_7_BASE_IDX                                                           2
#define mmHUBPREQ5_PER_LINE_DELIVERY_PRE                                                               0x0aa8
#define mmHUBPREQ5_PER_LINE_DELIVERY_PRE_BASE_IDX                                                      2
#define mmHUBPREQ5_PER_LINE_DELIVERY                                                                   0x0aa9
#define mmHUBPREQ5_PER_LINE_DELIVERY_BASE_IDX                                                          2
#define mmHUBPREQ5_CURSOR_SETTINGS                                                                     0x0aaa
#define mmHUBPREQ5_CURSOR_SETTINGS_BASE_IDX                                                            2
#define mmHUBPREQ5_REF_FREQ_TO_PIX_FREQ                                                                0x0aab
#define mmHUBPREQ5_REF_FREQ_TO_PIX_FREQ_BASE_IDX                                                       2
#define mmHUBPREQ5_DST_Y_DELTA_DRQ_LIMIT                                                               0x0aac
#define mmHUBPREQ5_DST_Y_DELTA_DRQ_LIMIT_BASE_IDX                                                      2
#define mmHUBPREQ5_HUBPREQ_MEM_PWR_CTRL                                                                0x0aad
#define mmHUBPREQ5_HUBPREQ_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPREQ5_HUBPREQ_MEM_PWR_STATUS                                                              0x0aae
#define mmHUBPREQ5_HUBPREQ_MEM_PWR_STATUS_BASE_IDX                                                     2


// addressBlock: dce_dc_dcbubp5_dispdec_hubpret_dispdec
// base address: 0x1130
#define mmHUBPRET5_HUBPRET_CONTROL                                                                     0x0ab8
#define mmHUBPRET5_HUBPRET_CONTROL_BASE_IDX                                                            2
#define mmHUBPRET5_HUBPRET_MEM_PWR_CTRL                                                                0x0ab9
#define mmHUBPRET5_HUBPRET_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmHUBPRET5_HUBPRET_MEM_PWR_STATUS                                                              0x0aba
#define mmHUBPRET5_HUBPRET_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmHUBPRET5_HUBPRET_READ_LINE_CTRL0                                                             0x0abb
#define mmHUBPRET5_HUBPRET_READ_LINE_CTRL0_BASE_IDX                                                    2
#define mmHUBPRET5_HUBPRET_READ_LINE_CTRL1                                                             0x0abc
#define mmHUBPRET5_HUBPRET_READ_LINE_CTRL1_BASE_IDX                                                    2
#define mmHUBPRET5_HUBPRET_READ_LINE0                                                                  0x0abd
#define mmHUBPRET5_HUBPRET_READ_LINE0_BASE_IDX                                                         2
#define mmHUBPRET5_HUBPRET_READ_LINE1                                                                  0x0abe
#define mmHUBPRET5_HUBPRET_READ_LINE1_BASE_IDX                                                         2
#define mmHUBPRET5_HUBPRET_INTERRUPT                                                                   0x0abf
#define mmHUBPRET5_HUBPRET_INTERRUPT_BASE_IDX                                                          2
#define mmHUBPRET5_HUBPRET_READ_LINE_VALUE                                                             0x0ac0
#define mmHUBPRET5_HUBPRET_READ_LINE_VALUE_BASE_IDX                                                    2
#define mmHUBPRET5_HUBPRET_READ_LINE_STATUS                                                            0x0ac1
#define mmHUBPRET5_HUBPRET_READ_LINE_STATUS_BASE_IDX                                                   2


// addressBlock: dce_dc_dcbubp5_dispdec_cursor0_dispdec
// base address: 0x1130
#define mmCURSOR0_5_CURSOR_CONTROL                                                                     0x0ac4
#define mmCURSOR0_5_CURSOR_CONTROL_BASE_IDX                                                            2
#define mmCURSOR0_5_CURSOR_SURFACE_ADDRESS                                                             0x0ac5
#define mmCURSOR0_5_CURSOR_SURFACE_ADDRESS_BASE_IDX                                                    2
#define mmCURSOR0_5_CURSOR_SURFACE_ADDRESS_HIGH                                                        0x0ac6
#define mmCURSOR0_5_CURSOR_SURFACE_ADDRESS_HIGH_BASE_IDX                                               2
#define mmCURSOR0_5_CURSOR_SIZE                                                                        0x0ac7
#define mmCURSOR0_5_CURSOR_SIZE_BASE_IDX                                                               2
#define mmCURSOR0_5_CURSOR_POSITION                                                                    0x0ac8
#define mmCURSOR0_5_CURSOR_POSITION_BASE_IDX                                                           2
#define mmCURSOR0_5_CURSOR_HOT_SPOT                                                                    0x0ac9
#define mmCURSOR0_5_CURSOR_HOT_SPOT_BASE_IDX                                                           2
#define mmCURSOR0_5_CURSOR_STEREO_CONTROL                                                              0x0aca
#define mmCURSOR0_5_CURSOR_STEREO_CONTROL_BASE_IDX                                                     2
#define mmCURSOR0_5_CURSOR_DST_OFFSET                                                                  0x0acb
#define mmCURSOR0_5_CURSOR_DST_OFFSET_BASE_IDX                                                         2
#define mmCURSOR0_5_CURSOR_MEM_PWR_CTRL                                                                0x0acc
#define mmCURSOR0_5_CURSOR_MEM_PWR_CTRL_BASE_IDX                                                       2
#define mmCURSOR0_5_CURSOR_MEM_PWR_STATUS                                                              0x0acd
#define mmCURSOR0_5_CURSOR_MEM_PWR_STATUS_BASE_IDX                                                     2
#define mmCURSOR0_5_DMDATA_ADDRESS_HIGH                                                                0x0ace
#define mmCURSOR0_5_DMDATA_ADDRESS_HIGH_BASE_IDX                                                       2
#define mmCURSOR0_5_DMDATA_ADDRESS_LOW                                                                 0x0acf
#define mmCURSOR0_5_DMDATA_ADDRESS_LOW_BASE_IDX                                                        2
#define mmCURSOR0_5_DMDATA_CNTL                                                                        0x0ad0
#define mmCURSOR0_5_DMDATA_CNTL_BASE_IDX                                                               2
#define mmCURSOR0_5_DMDATA_QOS_CNTL                                                                    0x0ad1
#define mmCURSOR0_5_DMDATA_QOS_CNTL_BASE_IDX                                                           2
#define mmCURSOR0_5_DMDATA_STATUS                                                                      0x0ad2
#define mmCURSOR0_5_DMDATA_STATUS_BASE_IDX                                                             2
#define mmCURSOR0_5_DMDATA_SW_CNTL                                                                     0x0ad3
#define mmCURSOR0_5_DMDATA_SW_CNTL_BASE_IDX                                                            2
#define mmCURSOR0_5_DMDATA_SW_DATA                                                                     0x0ad4
#define mmCURSOR0_5_DMDATA_SW_DATA_BASE_IDX                                                            2


// addressBlock: dce_dc_dcbubp5_dispdec_hubp_dcperfmon_dc_perfmon_dispdec
// base address: 0x2ba4
#define mmDC_PERFMON12_PERFCOUNTER_CNTL                                                                0x0ae9
#define mmDC_PERFMON12_PERFCOUNTER_CNTL_BASE_IDX                                                       2
#define mmDC_PERFMON12_PERFCOUNTER_CNTL2                                                               0x0aea
#define mmDC_PERFMON12_PERFCOUNTER_CNTL2_BASE_IDX                                                      2
#define mmDC_PERFMON12_PERFCOUNTER_STATE                                                               0x0aeb
#define mmDC_PERFMON12_PERFCOUNTER_STATE_BASE_IDX                                                      2
#define mmDC_PERFMON12_PERFMON_CNTL                                                                    0x0aec
#define mmDC_PERFMON12_PERFMON_CNTL_BASE_IDX                                                           2
#define mmDC_PERFMON12_PERFMON_CNTL2                                                                   0x0aed
#define mmDC_PERFMON12_PERFMON_CNTL2_BASE_IDX                                                          2
#define mmDC_PERFMON12_PERFMON_CVALUE_INT_MISC                                                         0x0aee
#define mmDC_PERFMON12_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                2
#define mmDC_PERFMON12_PERFMON_CVALUE_LOW                                                              0x0aef
#define mmDC_PERFMON12_PERFMON_CVALUE_LOW_BASE_IDX                                                     2
#define mmDC_PERFMON12_PERFMON_HI                                                                      0x0af0
#define mmDC_PERFMON12_PERFMON_HI_BASE_IDX                                                             2
#define mmDC_PERFMON12_PERFMON_LOW                                                                     0x0af1
#define mmDC_PERFMON12_PERFMON_LOW_BASE_IDX                                                            2


// addressBlock: dce_dc_dcbubp5_dispdec_hubpxfc_dispdec
// base address: 0x1130
#define mmHUBPXFC5_HUBP_XFC_CNTL                                                                       0x0af5
#define mmHUBPXFC5_HUBP_XFC_CNTL_BASE_IDX                                                              2
#define mmHUBPXFC5_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB                                                     0x0af6
#define mmHUBPXFC5_HUBP_XFC_XBUF_RD_BASE0_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC5_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB                                                     0x0af7
#define mmHUBPXFC5_HUBP_XFC_XBUF_RD_BASE0_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC5_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB                                                     0x0af8
#define mmHUBPXFC5_HUBP_XFC_XBUF_RD_BASE1_ADDR_LSB_BASE_IDX                                            2
#define mmHUBPXFC5_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB                                                     0x0af9
#define mmHUBPXFC5_HUBP_XFC_XBUF_RD_BASE1_ADDR_MSB_BASE_IDX                                            2
#define mmHUBPXFC5_HUBP_XFC_XBUF_RD_PITCH                                                              0x0afa
#define mmHUBPXFC5_HUBP_XFC_XBUF_RD_PITCH_BASE_IDX                                                     2
#define mmHUBPXFC5_HUBP_XFC_DELAY_CONFIG0                                                              0x0afb
#define mmHUBPXFC5_HUBP_XFC_DELAY_CONFIG0_BASE_IDX                                                     2
#define mmHUBPXFC5_HUBP_XFC_DELAY_CONFIG1                                                              0x0afc
#define mmHUBPXFC5_HUBP_XFC_DELAY_CONFIG1_BASE_IDX                                                     2
#define mmHUBPXFC5_HUBP_XFC_DELAY_CONFIG2                                                              0x0afd
#define mmHUBPXFC5_HUBP_XFC_DELAY_CONFIG2_BASE_IDX                                                     2
#define mmHUBPXFC5_HUBP_XFC_UNDERFLOW_STATUS                                                           0x0afe
#define mmHUBPXFC5_HUBP_XFC_UNDERFLOW_STATUS_BASE_IDX                                                  2
#define mmHUBPXFC5_HUBP_XFC_SLV_VTG_CONFIG0                                                            0x0aff
#define mmHUBPXFC5_HUBP_XFC_SLV_VTG_CONFIG0_BASE_IDX                                                   2
#define mmHUBPXFC5_HUBP_XFC_SLV_VTG_CONFIG1                                                            0x0b00
#define mmHUBPXFC5_HUBP_XFC_SLV_VTG_CONFIG1_BASE_IDX                                                   2
#define mmHUBPXFC5_HUBP_XFC_SLV_SCALER_CONFIG0                                                         0x0b01
#define mmHUBPXFC5_HUBP_XFC_SLV_SCALER_CONFIG0_BASE_IDX                                                2
#define mmHUBPXFC5_HUBP_XFC_SLV_SCALER_CONFIG1                                                         0x0b02
#define mmHUBPXFC5_HUBP_XFC_SLV_SCALER_CONFIG1_BASE_IDX                                                2
#define mmHUBPXFC5_HUBP_XFC_MPC_CONFIG                                                                 0x0b03
#define mmHUBPXFC5_HUBP_XFC_MPC_CONFIG_BASE_IDX                                                        2


// addressBlock: dce_dc_dpp0_dispdec_dpp_top_dispdec
// base address: 0x0
#define mmDPP_TOP0_DPP_CONTROL                                                                         0x0cc5
#define mmDPP_TOP0_DPP_CONTROL_BASE_IDX                                                                2
#define mmDPP_TOP0_DPP_SOFT_RESET                                                                      0x0cc6
#define mmDPP_TOP0_DPP_SOFT_RESET_BASE_IDX                                                             2
#define mmDPP_TOP0_DPP_CRC_VAL_R_G                                                                     0x0cc7
#define mmDPP_TOP0_DPP_CRC_VAL_R_G_BASE_IDX                                                            2
#define mmDPP_TOP0_DPP_CRC_VAL_B_A                                                                     0x0cc8
#define mmDPP_TOP0_DPP_CRC_VAL_B_A_BASE_IDX                                                            2
#define mmDPP_TOP0_DPP_CRC_CTRL                                                                        0x0cc9
#define mmDPP_TOP0_DPP_CRC_CTRL_BASE_IDX                                                               2
#define mmDPP_TOP0_HOST_READ_CONTROL                                                                   0x0cca
#define mmDPP_TOP0_HOST_READ_CONTROL_BASE_IDX                                                          2


// addressBlock: dce_dc_dpp0_dispdec_cnvc_cfg_dispdec
// base address: 0x0
#define mmCNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT                                                          0x0ccf
#define mmCNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT_BASE_IDX                                                 2
#define mmCNVC_CFG0_FORMAT_CONTROL                                                                     0x0cd0
#define mmCNVC_CFG0_FORMAT_CONTROL_BASE_IDX                                                            2
#define mmCNVC_CFG0_FCNV_FP_BIAS_R                                                                     0x0cd1
#define mmCNVC_CFG0_FCNV_FP_BIAS_R_BASE_IDX                                                            2
#define mmCNVC_CFG0_FCNV_FP_BIAS_G                                                                     0x0cd2
#define mmCNVC_CFG0_FCNV_FP_BIAS_G_BASE_IDX                                                            2
#define mmCNVC_CFG0_FCNV_FP_BIAS_B                                                                     0x0cd3
#define mmCNVC_CFG0_FCNV_FP_BIAS_B_BASE_IDX                                                            2
#define mmCNVC_CFG0_FCNV_FP_SCALE_R                                                                    0x0cd4
#define mmCNVC_CFG0_FCNV_FP_SCALE_R_BASE_IDX                                                           2
#define mmCNVC_CFG0_FCNV_FP_SCALE_G                                                                    0x0cd5
#define mmCNVC_CFG0_FCNV_FP_SCALE_G_BASE_IDX                                                           2
#define mmCNVC_CFG0_FCNV_FP_SCALE_B                                                                    0x0cd6
#define mmCNVC_CFG0_FCNV_FP_SCALE_B_BASE_IDX                                                           2
#define mmCNVC_CFG0_COLOR_KEYER_CONTROL                                                                0x0cd7
#define mmCNVC_CFG0_COLOR_KEYER_CONTROL_BASE_IDX                                                       2
#define mmCNVC_CFG0_COLOR_KEYER_ALPHA                                                                  0x0cd8
#define mmCNVC_CFG0_COLOR_KEYER_ALPHA_BASE_IDX                                                         2
#define mmCNVC_CFG0_COLOR_KEYER_RED                                                                    0x0cd9
#define mmCNVC_CFG0_COLOR_KEYER_RED_BASE_IDX                                                           2
#define mmCNVC_CFG0_COLOR_KEYER_GREEN                                                                  0x0cda
#define mmCNVC_CFG0_COLOR_KEYER_GREEN_BASE_IDX                                                         2
#define mmCNVC_CFG0_COLOR_KEYER_BLUE                                                                   0x0cdb
#define mmCNVC_CFG0_COLOR_KEYER_BLUE_BASE_IDX                                                          2
#define mmCNVC_CFG0_ALPHA_2BIT_LUT                                                                     0x0cdd
#define mmCNVC_CFG0_ALPHA_2BIT_LUT_BASE_IDX                                                            2


// addressBlock: dce_dc_dpp0_dispdec_cnvc_cur_dispdec
// base address: 0x0
#define mmCNVC_CUR0_CURSOR0_CONTROL                                                                    0x0ce0
#define mmCNVC_CUR0_CURSOR0_CONTROL_BASE_IDX                                                           2
#define mmCNVC_CUR0_CURSOR0_COLOR0                                                                     0x0ce1
#define mmCNVC_CUR0_CURSOR0_COLOR0_BASE_IDX                                                            2
#define mmCNVC_CUR0_CURSOR0_COLOR1                                                                     0x0ce2
#define mmCNVC_CUR0_CURSOR0_COLOR1_BASE_IDX                                                            2
#define mmCNVC_CUR0_CURSOR0_FP_SCALE_BIAS                                                              0x0ce3
#define mmCNVC_CUR0_CURSOR0_FP_SCALE_BIAS_BASE_IDX                                                     2


// addressBlock: dce_dc_dpp0_dispdec_dscl_dispdec
// base address: 0x0
#define mmDSCL0_SCL_COEF_RAM_TAP_SELECT                                                                0x0cea
#define mmDSCL0_SCL_COEF_RAM_TAP_SELECT_BASE_IDX                                                       2
#define mmDSCL0_SCL_COEF_RAM_TAP_DATA                                                                  0x0ceb
#define mmDSCL0_SCL_COEF_RAM_TAP_DATA_BASE_IDX                                                         2
#define mmDSCL0_SCL_MODE                                                                               0x0cec
#define mmDSCL0_SCL_MODE_BASE_IDX                                                                      2
#define mmDSCL0_SCL_TAP_CONTROL                                                                        0x0ced
#define mmDSCL0_SCL_TAP_CONTROL_BASE_IDX                                                               2
#define mmDSCL0_DSCL_CONTROL                                                                           0x0cee
#define mmDSCL0_DSCL_CONTROL_BASE_IDX                                                                  2
#define mmDSCL0_DSCL_2TAP_CONTROL                                                                      0x0cef
#define mmDSCL0_DSCL_2TAP_CONTROL_BASE_IDX                                                             2
#define mmDSCL0_SCL_MANUAL_REPLICATE_CONTROL                                                           0x0cf0
#define mmDSCL0_SCL_MANUAL_REPLICATE_CONTROL_BASE_IDX                                                  2
#define mmDSCL0_SCL_HORZ_FILTER_SCALE_RATIO                                                            0x0cf1
#define mmDSCL0_SCL_HORZ_FILTER_SCALE_RATIO_BASE_IDX                                                   2
#define mmDSCL0_SCL_HORZ_FILTER_INIT                                                                   0x0cf2
#define mmDSCL0_SCL_HORZ_FILTER_INIT_BASE_IDX                                                          2
#define mmDSCL0_SCL_HORZ_FILTER_SCALE_RATIO_C                                                          0x0cf3
#define mmDSCL0_SCL_HORZ_FILTER_SCALE_RATIO_C_BASE_IDX                                                 2
#define mmDSCL0_SCL_HORZ_FILTER_INIT_C                                                                 0x0cf4
#define mmDSCL0_SCL_HORZ_FILTER_INIT_C_BASE_IDX                                                        2
#define mmDSCL0_SCL_VERT_FILTER_SCALE_RATIO                                                            0x0cf5
#define mmDSCL0_SCL_VERT_FILTER_SCALE_RATIO_BASE_IDX                                                   2
#define mmDSCL0_SCL_VERT_FILTER_INIT                                                                   0x0cf6
#define mmDSCL0_SCL_VERT_FILTER_INIT_BASE_IDX                                                          2
#define mmDSCL0_SCL_VERT_FILTER_INIT_BOT                                                               0x0cf7
#define mmDSCL0_SCL_VERT_FILTER_INIT_BOT_BASE_IDX                                                      2
#define mmDSCL0_SCL_VERT_FILTER_SCALE_RATIO_C                                                          0x0cf8
#define mmDSCL0_SCL_VERT_FILTER_SCALE_RATIO_C_BASE_IDX                                                 2
#define mmDSCL0_SCL_VERT_FILTER_INIT_C                                                                 0x0cf9
#define mmDSCL0_SCL_VERT_FILTER_INIT_C_BASE_IDX                                                        2
#define mmDSCL0_SCL_VERT_FILTER_INIT_BOT_C                                                             0x0cfa
#define mmDSCL0_SCL_VERT_FILTER_INIT_BOT_C_BASE_IDX                                                    2
#define mmDSCL0_SCL_BLACK_OFFSET                                                                       0x0cfb
#define mmDSCL0_SCL_BLACK_OFFSET_BASE_IDX                                                              2
#define mmDSCL0_DSCL_UPDATE                                                                            0x0cfc
#define mmDSCL0_DSCL_UPDATE_BASE_IDX                                                                   2
#define mmDSCL0_DSCL_AUTOCAL                                                                           0x0cfd
#define mmDSCL0_DSCL_AUTOCAL_BASE_IDX                                                                  2
#define mmDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT                                                           0x0cfe
#define mmDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX                                                  2
#define mmDSCL0_DSCL_EXT_OVERSCAN_TOP_BOTTOM                                                           0x0cff
#define mmDSCL0_DSCL_EXT_OVERSCAN_TOP_BOTTOM_BASE_IDX                                                  2
#define mmDSCL0_OTG_H_BLANK                                                                            0x0d00
#define mmDSCL0_OTG_H_BLANK_BASE_IDX                                                                   2
#define mmDSCL0_OTG_V_BLANK                                                                            0x0d01
#define mmDSCL0_OTG_V_BLANK_BASE_IDX                                                                   2
#define mmDSCL0_RECOUT_START                                                                           0x0d02
#define mmDSCL0_RECOUT_START_BASE_IDX                                                                  2
#define mmDSCL0_RECOUT_SIZE                                                                            0x0d03
#define mmDSCL0_RECOUT_SIZE_BASE_IDX                                                                   2
#define mmDSCL0_MPC_SIZE                                                                               0x0d04
#define mmDSCL0_MPC_SIZE_BASE_IDX                                                                      2
#define mmDSCL0_LB_DATA_FORMAT                                                                         0x0d05
#define mmDSCL0_LB_DATA_FORMAT_BASE_IDX                                                                2
#define mmDSCL0_LB_MEMORY_CTRL                                                                         0x0d06
#define mmDSCL0_LB_MEMORY_CTRL_BASE_IDX                                                                2
#define mmDSCL0_LB_V_COUNTER                                                                           0x0d07
#define mmDSCL0_LB_V_COUNTER_BASE_IDX                                                                  2
#define mmDSCL0_DSCL_MEM_PWR_CTRL                                                                      0x0d08
#define mmDSCL0_DSCL_MEM_PWR_CTRL_BASE_IDX                                                             2
#define mmDSCL0_DSCL_MEM_PWR_STATUS                                                                    0x0d09
#define mmDSCL0_DSCL_MEM_PWR_STATUS_BASE_IDX                                                           2
#define mmDSCL0_OBUF_CONTROL                                                                           0x0d0a
#define mmDSCL0_OBUF_CONTROL_BASE_IDX                                                                  2
#define mmDSCL0_OBUF_MEM_PWR_CTRL                                                                      0x0d0b
#define mmDSCL0_OBUF_MEM_PWR_CTRL_BASE_IDX                                                             2


// addressBlock: dce_dc_dpp0_dispdec_cm_dispdec
// base address: 0x0
#define mmCM0_CM_CONTROL                                                                               0x0d1a
#define mmCM0_CM_CONTROL_BASE_IDX                                                                      2
#define mmCM0_CM_ICSC_CONTROL                                                                          0x0d1b
#define mmCM0_CM_ICSC_CONTROL_BASE_IDX                                                                 2
#define mmCM0_CM_ICSC_C11_C12                                                                          0x0d1c
#define mmCM0_CM_ICSC_C11_C12_BASE_IDX                                                                 2
#define mmCM0_CM_ICSC_C13_C14                                                                          0x0d1d
#define mmCM0_CM_ICSC_C13_C14_BASE_IDX                                                                 2
#define mmCM0_CM_ICSC_C21_C22                                                                          0x0d1e
#define mmCM0_CM_ICSC_C21_C22_BASE_IDX                                                                 2
#define mmCM0_CM_ICSC_C23_C24                                                                          0x0d1f
#define mmCM0_CM_ICSC_C23_C24_BASE_IDX                                                                 2
#define mmCM0_CM_ICSC_C31_C32                                                                          0x0d20
#define mmCM0_CM_ICSC_C31_C32_BASE_IDX                                                                 2
#define mmCM0_CM_ICSC_C33_C34                                                                          0x0d21
#define mmCM0_CM_ICSC_C33_C34_BASE_IDX                                                                 2
#define mmCM0_CM_ICSC_B_C11_C12                                                                        0x0d22
#define mmCM0_CM_ICSC_B_C11_C12_BASE_IDX                                                               2
#define mmCM0_CM_ICSC_B_C13_C14                                                                        0x0d23
#define mmCM0_CM_ICSC_B_C13_C14_BASE_IDX                                                               2
#define mmCM0_CM_ICSC_B_C21_C22                                                                        0x0d24
#define mmCM0_CM_ICSC_B_C21_C22_BASE_IDX                                                               2
#define mmCM0_CM_ICSC_B_C23_C24                                                                        0x0d25
#define mmCM0_CM_ICSC_B_C23_C24_BASE_IDX                                                               2
#define mmCM0_CM_ICSC_B_C31_C32                                                                        0x0d26
#define mmCM0_CM_ICSC_B_C31_C32_BASE_IDX                                                               2
#define mmCM0_CM_ICSC_B_C33_C34                                                                        0x0d27
#define mmCM0_CM_ICSC_B_C33_C34_BASE_IDX                                                               2
#define mmCM0_CM_GAMUT_REMAP_CONTROL                                                                   0x0d28
#define mmCM0_CM_GAMUT_REMAP_CONTROL_BASE_IDX                                                          2
#define mmCM0_CM_GAMUT_REMAP_C11_C12                                                                   0x0d29
#define mmCM0_CM_GAMUT_REMAP_C11_C12_BASE_IDX                                                          2
#define mmCM0_CM_GAMUT_REMAP_C13_C14                                                                   0x0d2a
#define mmCM0_CM_GAMUT_REMAP_C13_C14_BASE_IDX                                                          2
#define mmCM0_CM_GAMUT_REMAP_C21_C22                                                                   0x0d2b
#define mmCM0_CM_GAMUT_REMAP_C21_C22_BASE_IDX                                                          2
#define mmCM0_CM_GAMUT_REMAP_C23_C24                                                                   0x0d2c
#define mmCM0_CM_GAMUT_REMAP_C23_C24_BASE_IDX                                                          2
#define mmCM0_CM_GAMUT_REMAP_C31_C32                                                                   0x0d2d
#define mmCM0_CM_GAMUT_REMAP_C31_C32_BASE_IDX                                                          2
#define mmCM0_CM_GAMUT_REMAP_C33_C34                                                                   0x0d2e
#define mmCM0_CM_GAMUT_REMAP_C33_C34_BASE_IDX                                                          2
#define mmCM0_CM_GAMUT_REMAP_B_C11_C12                                                                 0x0d2f
#define mmCM0_CM_GAMUT_REMAP_B_C11_C12_BASE_IDX                                                        2
#define mmCM0_CM_GAMUT_REMAP_B_C13_C14                                                                 0x0d30
#define mmCM0_CM_GAMUT_REMAP_B_C13_C14_BASE_IDX                                                        2
#define mmCM0_CM_GAMUT_REMAP_B_C21_C22                                                                 0x0d31
#define mmCM0_CM_GAMUT_REMAP_B_C21_C22_BASE_IDX                                                        2
#define mmCM0_CM_GAMUT_REMAP_B_C23_C24                                                                 0x0d32
#define mmCM0_CM_GAMUT_REMAP_B_C23_C24_BASE_IDX                                                        2
#define mmCM0_CM_GAMUT_REMAP_B_C31_C32                                                                 0x0d33
#define mmCM0_CM_GAMUT_REMAP_B_C31_C32_BASE_IDX                                                        2
#define mmCM0_CM_GAMUT_REMAP_B_C33_C34                                                                 0x0d34
#define mmCM0_CM_GAMUT_REMAP_B_C33_C34_BASE_IDX                                                        2
#define mmCM0_CM_BIAS_CR_R                                                                             0x0d35
#define mmCM0_CM_BIAS_CR_R_BASE_IDX                                                                    2
#define mmCM0_CM_BIAS_Y_G_CB_B                                                                         0x0d36
#define mmCM0_CM_BIAS_Y_G_CB_B_BASE_IDX                                                                2
#define mmCM0_CM_DGAM_CONTROL                                                                          0x0d37
#define mmCM0_CM_DGAM_CONTROL_BASE_IDX                                                                 2
#define mmCM0_CM_DGAM_LUT_INDEX                                                                        0x0d38
#define mmCM0_CM_DGAM_LUT_INDEX_BASE_IDX                                                               2
#define mmCM0_CM_DGAM_LUT_DATA                                                                         0x0d39
#define mmCM0_CM_DGAM_LUT_DATA_BASE_IDX                                                                2
#define mmCM0_CM_DGAM_LUT_WRITE_EN_MASK                                                                0x0d3a
#define mmCM0_CM_DGAM_LUT_WRITE_EN_MASK_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMA_START_CNTL_B                                                                0x0d3b
#define mmCM0_CM_DGAM_RAMA_START_CNTL_B_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMA_START_CNTL_G                                                                0x0d3c
#define mmCM0_CM_DGAM_RAMA_START_CNTL_G_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMA_START_CNTL_R                                                                0x0d3d
#define mmCM0_CM_DGAM_RAMA_START_CNTL_R_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_B                                                                0x0d3e
#define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_B_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_G                                                                0x0d3f
#define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_G_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_R                                                                0x0d40
#define mmCM0_CM_DGAM_RAMA_SLOPE_CNTL_R_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMA_END_CNTL1_B                                                                 0x0d41
#define mmCM0_CM_DGAM_RAMA_END_CNTL1_B_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMA_END_CNTL2_B                                                                 0x0d42
#define mmCM0_CM_DGAM_RAMA_END_CNTL2_B_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMA_END_CNTL1_G                                                                 0x0d43
#define mmCM0_CM_DGAM_RAMA_END_CNTL1_G_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMA_END_CNTL2_G                                                                 0x0d44
#define mmCM0_CM_DGAM_RAMA_END_CNTL2_G_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMA_END_CNTL1_R                                                                 0x0d45
#define mmCM0_CM_DGAM_RAMA_END_CNTL1_R_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMA_END_CNTL2_R                                                                 0x0d46
#define mmCM0_CM_DGAM_RAMA_END_CNTL2_R_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMA_REGION_0_1                                                                  0x0d47
#define mmCM0_CM_DGAM_RAMA_REGION_0_1_BASE_IDX                                                         2
#define mmCM0_CM_DGAM_RAMA_REGION_2_3                                                                  0x0d48
#define mmCM0_CM_DGAM_RAMA_REGION_2_3_BASE_IDX                                                         2
#define mmCM0_CM_DGAM_RAMA_REGION_4_5                                                                  0x0d49
#define mmCM0_CM_DGAM_RAMA_REGION_4_5_BASE_IDX                                                         2
#define mmCM0_CM_DGAM_RAMA_REGION_6_7                                                                  0x0d4a
#define mmCM0_CM_DGAM_RAMA_REGION_6_7_BASE_IDX                                                         2
#define mmCM0_CM_DGAM_RAMA_REGION_8_9                                                                  0x0d4b
#define mmCM0_CM_DGAM_RAMA_REGION_8_9_BASE_IDX                                                         2
#define mmCM0_CM_DGAM_RAMA_REGION_10_11                                                                0x0d4c
#define mmCM0_CM_DGAM_RAMA_REGION_10_11_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMA_REGION_12_13                                                                0x0d4d
#define mmCM0_CM_DGAM_RAMA_REGION_12_13_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMA_REGION_14_15                                                                0x0d4e
#define mmCM0_CM_DGAM_RAMA_REGION_14_15_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMB_START_CNTL_B                                                                0x0d4f
#define mmCM0_CM_DGAM_RAMB_START_CNTL_B_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMB_START_CNTL_G                                                                0x0d50
#define mmCM0_CM_DGAM_RAMB_START_CNTL_G_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMB_START_CNTL_R                                                                0x0d51
#define mmCM0_CM_DGAM_RAMB_START_CNTL_R_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_B                                                                0x0d52
#define mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_B_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_G                                                                0x0d53
#define mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_G_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_R                                                                0x0d54
#define mmCM0_CM_DGAM_RAMB_SLOPE_CNTL_R_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMB_END_CNTL1_B                                                                 0x0d55
#define mmCM0_CM_DGAM_RAMB_END_CNTL1_B_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMB_END_CNTL2_B                                                                 0x0d56
#define mmCM0_CM_DGAM_RAMB_END_CNTL2_B_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMB_END_CNTL1_G                                                                 0x0d57
#define mmCM0_CM_DGAM_RAMB_END_CNTL1_G_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMB_END_CNTL2_G                                                                 0x0d58
#define mmCM0_CM_DGAM_RAMB_END_CNTL2_G_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMB_END_CNTL1_R                                                                 0x0d59
#define mmCM0_CM_DGAM_RAMB_END_CNTL1_R_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMB_END_CNTL2_R                                                                 0x0d5a
#define mmCM0_CM_DGAM_RAMB_END_CNTL2_R_BASE_IDX                                                        2
#define mmCM0_CM_DGAM_RAMB_REGION_0_1                                                                  0x0d5b
#define mmCM0_CM_DGAM_RAMB_REGION_0_1_BASE_IDX                                                         2
#define mmCM0_CM_DGAM_RAMB_REGION_2_3                                                                  0x0d5c
#define mmCM0_CM_DGAM_RAMB_REGION_2_3_BASE_IDX                                                         2
#define mmCM0_CM_DGAM_RAMB_REGION_4_5                                                                  0x0d5d
#define mmCM0_CM_DGAM_RAMB_REGION_4_5_BASE_IDX                                                         2
#define mmCM0_CM_DGAM_RAMB_REGION_6_7                                                                  0x0d5e
#define mmCM0_CM_DGAM_RAMB_REGION_6_7_BASE_IDX                                                         2
#define mmCM0_CM_DGAM_RAMB_REGION_8_9                                                                  0x0d5f
#define mmCM0_CM_DGAM_RAMB_REGION_8_9_BASE_IDX                                                         2
#define mmCM0_CM_DGAM_RAMB_REGION_10_11                                                                0x0d60
#define mmCM0_CM_DGAM_RAMB_REGION_10_11_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMB_REGION_12_13                                                                0x0d61
#define mmCM0_CM_DGAM_RAMB_REGION_12_13_BASE_IDX                                                       2
#define mmCM0_CM_DGAM_RAMB_REGION_14_15                                                                0x0d62
#define mmCM0_CM_DGAM_RAMB_REGION_14_15_BASE_IDX                                                       2
#define mmCM0_CM_BLNDGAM_CONTROL                                                                       0x0d63
#define mmCM0_CM_BLNDGAM_CONTROL_BASE_IDX                                                              2
#define mmCM0_CM_BLNDGAM_LUT_INDEX                                                                     0x0d64
#define mmCM0_CM_BLNDGAM_LUT_INDEX_BASE_IDX                                                            2
#define mmCM0_CM_BLNDGAM_LUT_DATA                                                                      0x0d65
#define mmCM0_CM_BLNDGAM_LUT_DATA_BASE_IDX                                                             2
#define mmCM0_CM_BLNDGAM_LUT_WRITE_EN_MASK                                                             0x0d66
#define mmCM0_CM_BLNDGAM_LUT_WRITE_EN_MASK_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_START_CNTL_B                                                             0x0d67
#define mmCM0_CM_BLNDGAM_RAMA_START_CNTL_B_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_START_CNTL_G                                                             0x0d68
#define mmCM0_CM_BLNDGAM_RAMA_START_CNTL_G_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_START_CNTL_R                                                             0x0d69
#define mmCM0_CM_BLNDGAM_RAMA_START_CNTL_R_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_B                                                             0x0d6a
#define mmCM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_B_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_G                                                             0x0d6b
#define mmCM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_G_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_R                                                             0x0d6c
#define mmCM0_CM_BLNDGAM_RAMA_SLOPE_CNTL_R_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_B                                                              0x0d6d
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_B_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_B                                                              0x0d6e
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_B_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_G                                                              0x0d6f
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_G_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_G                                                              0x0d70
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_G_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_R                                                              0x0d71
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL1_R_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_R                                                              0x0d72
#define mmCM0_CM_BLNDGAM_RAMA_END_CNTL2_R_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_0_1                                                               0x0d73
#define mmCM0_CM_BLNDGAM_RAMA_REGION_0_1_BASE_IDX                                                      2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_2_3                                                               0x0d74
#define mmCM0_CM_BLNDGAM_RAMA_REGION_2_3_BASE_IDX                                                      2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_4_5                                                               0x0d75
#define mmCM0_CM_BLNDGAM_RAMA_REGION_4_5_BASE_IDX                                                      2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_6_7                                                               0x0d76
#define mmCM0_CM_BLNDGAM_RAMA_REGION_6_7_BASE_IDX                                                      2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_8_9                                                               0x0d77
#define mmCM0_CM_BLNDGAM_RAMA_REGION_8_9_BASE_IDX                                                      2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_10_11                                                             0x0d78
#define mmCM0_CM_BLNDGAM_RAMA_REGION_10_11_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_12_13                                                             0x0d79
#define mmCM0_CM_BLNDGAM_RAMA_REGION_12_13_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_14_15                                                             0x0d7a
#define mmCM0_CM_BLNDGAM_RAMA_REGION_14_15_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_16_17                                                             0x0d7b
#define mmCM0_CM_BLNDGAM_RAMA_REGION_16_17_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_18_19                                                             0x0d7c
#define mmCM0_CM_BLNDGAM_RAMA_REGION_18_19_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_20_21                                                             0x0d7d
#define mmCM0_CM_BLNDGAM_RAMA_REGION_20_21_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_22_23                                                             0x0d7e
#define mmCM0_CM_BLNDGAM_RAMA_REGION_22_23_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_24_25                                                             0x0d7f
#define mmCM0_CM_BLNDGAM_RAMA_REGION_24_25_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_26_27                                                             0x0d80
#define mmCM0_CM_BLNDGAM_RAMA_REGION_26_27_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_28_29                                                             0x0d81
#define mmCM0_CM_BLNDGAM_RAMA_REGION_28_29_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_30_31                                                             0x0d82
#define mmCM0_CM_BLNDGAM_RAMA_REGION_30_31_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMA_REGION_32_33                                                             0x0d83
#define mmCM0_CM_BLNDGAM_RAMA_REGION_32_33_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_START_CNTL_B                                                             0x0d84
#define mmCM0_CM_BLNDGAM_RAMB_START_CNTL_B_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_START_CNTL_G                                                             0x0d85
#define mmCM0_CM_BLNDGAM_RAMB_START_CNTL_G_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_START_CNTL_R                                                             0x0d86
#define mmCM0_CM_BLNDGAM_RAMB_START_CNTL_R_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_B                                                             0x0d87
#define mmCM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_B_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_G                                                             0x0d88
#define mmCM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_G_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_R                                                             0x0d89
#define mmCM0_CM_BLNDGAM_RAMB_SLOPE_CNTL_R_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL1_B                                                              0x0d8a
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL1_B_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL2_B                                                              0x0d8b
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL2_B_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL1_G                                                              0x0d8c
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL1_G_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL2_G                                                              0x0d8d
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL2_G_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL1_R                                                              0x0d8e
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL1_R_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL2_R                                                              0x0d8f
#define mmCM0_CM_BLNDGAM_RAMB_END_CNTL2_R_BASE_IDX                                                     2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_0_1                                                               0x0d90
#define mmCM0_CM_BLNDGAM_RAMB_REGION_0_1_BASE_IDX                                                      2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_2_3                                                               0x0d91
#define mmCM0_CM_BLNDGAM_RAMB_REGION_2_3_BASE_IDX                                                      2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_4_5                                                               0x0d92
#define mmCM0_CM_BLNDGAM_RAMB_REGION_4_5_BASE_IDX                                                      2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_6_7                                                               0x0d93
#define mmCM0_CM_BLNDGAM_RAMB_REGION_6_7_BASE_IDX                                                      2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_8_9                                                               0x0d94
#define mmCM0_CM_BLNDGAM_RAMB_REGION_8_9_BASE_IDX                                                      2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_10_11                                                             0x0d95
#define mmCM0_CM_BLNDGAM_RAMB_REGION_10_11_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_12_13                                                             0x0d96
#define mmCM0_CM_BLNDGAM_RAMB_REGION_12_13_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_14_15                                                             0x0d97
#define mmCM0_CM_BLNDGAM_RAMB_REGION_14_15_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_16_17                                                             0x0d98
#define mmCM0_CM_BLNDGAM_RAMB_REGION_16_17_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_18_19                                                             0x0d99
#define mmCM0_CM_BLNDGAM_RAMB_REGION_18_19_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_20_21                                                             0x0d9a
#define mmCM0_CM_BLNDGAM_RAMB_REGION_20_21_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_22_23                                                             0x0d9b
#define mmCM0_CM_BLNDGAM_RAMB_REGION_22_23_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_24_25                                                             0x0d9c
#define mmCM0_CM_BLNDGAM_RAMB_REGION_24_25_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_26_27                                                             0x0d9d
#define mmCM0_CM_BLNDGAM_RAMB_REGION_26_27_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_28_29                                                             0x0d9e
#define mmCM0_CM_BLNDGAM_RAMB_REGION_28_29_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_30_31                                                             0x0d9f
#define mmCM0_CM_BLNDGAM_RAMB_REGION_30_31_BASE_IDX                                                    2
#define mmCM0_CM_BLNDGAM_RAMB_REGION_32_33                                                             0x0da0
#define mmCM0_CM_BLNDGAM_RAMB_REGION_32_33_BASE_IDX                                                    2
#define mmCM0_CM_HDR_MULT_COEF                                                                         0x0da1
#define mmCM0_CM_HDR_MULT_COEF_BASE_IDX                                                                2
#define mmCM0_CM_MEM_PWR_CTRL                                                                          0x0da2
#define mmCM0_CM_MEM_PWR_CTRL_BASE_IDX                                                                 2
#define mmCM0_CM_MEM_PWR_STATUS                                                                        0x0da3
#define mmCM0_CM_MEM_PWR_STATUS_BASE_IDX                                                               2
#define mmCM0_CM_DEALPHA                                                                               0x0da5
#define mmCM0_CM_DEALPHA_BASE_IDX                                                                      2
#define mmCM0_CM_COEF_FORMAT                                                                           0x0da6
#define mmCM0_CM_COEF_FORMAT_BASE_IDX                                                                  2
#define mmCM0_CM_SHAPER_CONTROL                                                                        0x0da7
#define mmCM0_CM_SHAPER_CONTROL_BASE_IDX                                                               2
#define mmCM0_CM_SHAPER_OFFSET_R                                                                       0x0da8
#define mmCM0_CM_SHAPER_OFFSET_R_BASE_IDX                                                              2
#define mmCM0_CM_SHAPER_OFFSET_G                                                                       0x0da9
#define mmCM0_CM_SHAPER_OFFSET_G_BASE_IDX                                                              2
#define mmCM0_CM_SHAPER_OFFSET_B                                                                       0x0daa
#define mmCM0_CM_SHAPER_OFFSET_B_BASE_IDX                                                              2
#define mmCM0_CM_SHAPER_SCALE_R                                                                        0x0dab
#define mmCM0_CM_SHAPER_SCALE_R_BASE_IDX                                                               2
#define mmCM0_CM_SHAPER_SCALE_G_B                                                                      0x0dac
#define mmCM0_CM_SHAPER_SCALE_G_B_BASE_IDX                                                             2
#define mmCM0_CM_SHAPER_LUT_INDEX                                                                      0x0dad
#define mmCM0_CM_SHAPER_LUT_INDEX_BASE_IDX                                                             2
#define mmCM0_CM_SHAPER_LUT_DATA                                                                       0x0dae
#define mmCM0_CM_SHAPER_LUT_DATA_BASE_IDX                                                              2
#define mmCM0_CM_SHAPER_LUT_WRITE_EN_MASK                                                              0x0daf
#define mmCM0_CM_SHAPER_LUT_WRITE_EN_MASK_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_START_CNTL_B                                                              0x0db0
#define mmCM0_CM_SHAPER_RAMA_START_CNTL_B_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_START_CNTL_G                                                              0x0db1
#define mmCM0_CM_SHAPER_RAMA_START_CNTL_G_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_START_CNTL_R                                                              0x0db2
#define mmCM0_CM_SHAPER_RAMA_START_CNTL_R_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_END_CNTL_B                                                                0x0db3
#define mmCM0_CM_SHAPER_RAMA_END_CNTL_B_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMA_END_CNTL_G                                                                0x0db4
#define mmCM0_CM_SHAPER_RAMA_END_CNTL_G_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMA_END_CNTL_R                                                                0x0db5
#define mmCM0_CM_SHAPER_RAMA_END_CNTL_R_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMA_REGION_0_1                                                                0x0db6
#define mmCM0_CM_SHAPER_RAMA_REGION_0_1_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMA_REGION_2_3                                                                0x0db7
#define mmCM0_CM_SHAPER_RAMA_REGION_2_3_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMA_REGION_4_5                                                                0x0db8
#define mmCM0_CM_SHAPER_RAMA_REGION_4_5_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMA_REGION_6_7                                                                0x0db9
#define mmCM0_CM_SHAPER_RAMA_REGION_6_7_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMA_REGION_8_9                                                                0x0dba
#define mmCM0_CM_SHAPER_RAMA_REGION_8_9_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMA_REGION_10_11                                                              0x0dbb
#define mmCM0_CM_SHAPER_RAMA_REGION_10_11_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_12_13                                                              0x0dbc
#define mmCM0_CM_SHAPER_RAMA_REGION_12_13_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_14_15                                                              0x0dbd
#define mmCM0_CM_SHAPER_RAMA_REGION_14_15_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_16_17                                                              0x0dbe
#define mmCM0_CM_SHAPER_RAMA_REGION_16_17_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_18_19                                                              0x0dbf
#define mmCM0_CM_SHAPER_RAMA_REGION_18_19_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_20_21                                                              0x0dc0
#define mmCM0_CM_SHAPER_RAMA_REGION_20_21_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_22_23                                                              0x0dc1
#define mmCM0_CM_SHAPER_RAMA_REGION_22_23_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_24_25                                                              0x0dc2
#define mmCM0_CM_SHAPER_RAMA_REGION_24_25_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_26_27                                                              0x0dc3
#define mmCM0_CM_SHAPER_RAMA_REGION_26_27_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_28_29                                                              0x0dc4
#define mmCM0_CM_SHAPER_RAMA_REGION_28_29_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_30_31                                                              0x0dc5
#define mmCM0_CM_SHAPER_RAMA_REGION_30_31_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMA_REGION_32_33                                                              0x0dc6
#define mmCM0_CM_SHAPER_RAMA_REGION_32_33_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_START_CNTL_B                                                              0x0dc7
#define mmCM0_CM_SHAPER_RAMB_START_CNTL_B_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_START_CNTL_G                                                              0x0dc8
#define mmCM0_CM_SHAPER_RAMB_START_CNTL_G_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_START_CNTL_R                                                              0x0dc9
#define mmCM0_CM_SHAPER_RAMB_START_CNTL_R_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_END_CNTL_B                                                                0x0dca
#define mmCM0_CM_SHAPER_RAMB_END_CNTL_B_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMB_END_CNTL_G                                                                0x0dcb
#define mmCM0_CM_SHAPER_RAMB_END_CNTL_G_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMB_END_CNTL_R                                                                0x0dcc
#define mmCM0_CM_SHAPER_RAMB_END_CNTL_R_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMB_REGION_0_1                                                                0x0dcd
#define mmCM0_CM_SHAPER_RAMB_REGION_0_1_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMB_REGION_2_3                                                                0x0dce
#define mmCM0_CM_SHAPER_RAMB_REGION_2_3_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMB_REGION_4_5                                                                0x0dcf
#define mmCM0_CM_SHAPER_RAMB_REGION_4_5_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMB_REGION_6_7                                                                0x0dd0
#define mmCM0_CM_SHAPER_RAMB_REGION_6_7_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMB_REGION_8_9                                                                0x0dd1
#define mmCM0_CM_SHAPER_RAMB_REGION_8_9_BASE_IDX                                                       2
#define mmCM0_CM_SHAPER_RAMB_REGION_10_11                                                              0x0dd2
#define mmCM0_CM_SHAPER_RAMB_REGION_10_11_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_12_13                                                              0x0dd3
#define mmCM0_CM_SHAPER_RAMB_REGION_12_13_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_14_15                                                              0x0dd4
#define mmCM0_CM_SHAPER_RAMB_REGION_14_15_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_16_17                                                              0x0dd5
#define mmCM0_CM_SHAPER_RAMB_REGION_16_17_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_18_19                                                              0x0dd6
#define mmCM0_CM_SHAPER_RAMB_REGION_18_19_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_20_21                                                              0x0dd7
#define mmCM0_CM_SHAPER_RAMB_REGION_20_21_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_22_23                                                              0x0dd8
#define mmCM0_CM_SHAPER_RAMB_REGION_22_23_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_24_25                                                              0x0dd9
#define mmCM0_CM_SHAPER_RAMB_REGION_24_25_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_26_27                                                              0x0dda
#define mmCM0_CM_SHAPER_RAMB_REGION_26_27_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_28_29                                                              0x0ddb
#define mmCM0_CM_SHAPER_RAMB_REGION_28_29_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_30_31                                                              0x0ddc
#define mmCM0_CM_SHAPER_RAMB_REGION_30_31_BASE_IDX                                                     2
#define mmCM0_CM_SHAPER_RAMB_REGION_32_33                                                              0x0ddd
#define mmCM0_CM_SHAPER_RAMB_REGION_32_33_BASE_IDX                                                     2
#define mmCM0_CM_MEM_PWR_CTRL2                                                                         0x0dde
#define mmCM0_CM_MEM_PWR_CTRL2_BASE_IDX                                                                2
#define mmCM0_CM_MEM_PWR_STATUS2                                                                       0x0ddf
#define mmCM0_CM_MEM_PWR_STATUS2_BASE_IDX                                                              2
#define mmCM0_CM_3DLUT_MODE                                                                            0x0de0
#define mmCM0_CM_3DLUT_MODE_BASE_IDX                                                                   2
#define mmCM0_CM_3DLUT_INDEX                                                                           0x0de1
#define mmCM0_CM_3DLUT_INDEX_BASE_IDX                                                                  2
#define mmCM0_CM_3DLUT_DATA                                                                            0x0de2
#define mmCM0_CM_3DLUT_DATA_BASE_IDX                                                                   2
#define mmCM0_CM_3DLUT_DATA_30BIT                                                                      0x0de3
#define mmCM0_CM_3DLUT_DATA_30BIT_BASE_IDX                                                             2
#define mmCM0_CM_3DLUT_READ_WRITE_CONTROL                                                              0x0de4
#define mmCM0_CM_3DLUT_READ_WRITE_CONTROL_BASE_IDX                                                     2
#define mmCM0_CM_3DLUT_OUT_NORM_FACTOR                                                                 0x0de5
#define mmCM0_CM_3DLUT_OUT_NORM_FACTOR_BASE_IDX                                                        2
#define mmCM0_CM_3DLUT_OUT_OFFSET_R                                                                    0x0de6
#define mmCM0_CM_3DLUT_OUT_OFFSET_R_BASE_IDX                                                           2
#define mmCM0_CM_3DLUT_OUT_OFFSET_G                                                                    0x0de7
#define mmCM0_CM_3DLUT_OUT_OFFSET_G_BASE_IDX                                                           2
#define mmCM0_CM_3DLUT_OUT_OFFSET_B                                                                    0x0de8
#define mmCM0_CM_3DLUT_OUT_OFFSET_B_BASE_IDX                                                           2
#define mmCM0_CM_TEST_DEBUG_INDEX                                                                      0x0de9
#define mmCM0_CM_TEST_DEBUG_INDEX_BASE_IDX                                                             2
#define mmCM0_CM_TEST_DEBUG_DATA                                                                       0x0dea
#define mmCM0_CM_TEST_DEBUG_DATA_BASE_IDX                                                              2


// addressBlock: dce_dc_dpp0_dispdec_dpp_dcperfmon_dc_perfmon_dispdec
// base address: 0x3890
#define mmDC_PERFMON13_PERFCOUNTER_CNTL                                                                0x0e24
#define mmDC_PERFMON13_PERFCOUNTER_CNTL_BASE_IDX                                                       2
#define mmDC_PERFMON13_PERFCOUNTER_CNTL2                                                               0x0e25
#define mmDC_PERFMON13_PERFCOUNTER_CNTL2_BASE_IDX                                                      2
#define mmDC_PERFMON13_PERFCOUNTER_STATE                                                               0x0e26
#define mmDC_PERFMON13_PERFCOUNTER_STATE_BASE_IDX                                                      2
#define mmDC_PERFMON13_PERFMON_CNTL                                                                    0x0e27
#define mmDC_PERFMON13_PERFMON_CNTL_BASE_IDX                                                           2
#define mmDC_PERFMON13_PERFMON_CNTL2                                                                   0x0e28
#define mmDC_PERFMON13_PERFMON_CNTL2_BASE_IDX                                                          2
#define mmDC_PERFMON13_PERFMON_CVALUE_INT_MISC                                                         0x0e29
#define mmDC_PERFMON13_PERFMON_CVALUE_INT_MISC_BASE_IDX                                                2
#define mmDC_PERFMON13_PERFMON_CVALUE_LOW                                                              0x0e2a
#define mmDC_PERFMON13_PERFMON_CVALUE_LOW_BASE_IDX                                                     2
#define mmDC_PERFMON13_PERFMON_HI                                                                      0x0e2b
#define mmDC_PERFMON13_PERFMON_HI_BASE_IDX                                                             2
#define mmDC_PERFMON13_PERFMON_LOW                                                                     0x0e2c
#define mmDC_PERFMON13_PERFMON_LOW_BASE_IDX                                                            2


// addressBlock: dce_dc_dpp1_dispdec_dpp_top_dispdec
// base address: 0x5ac
#define mmDPP_TOP1_DPP_CONTROL                                                                         0x0e30
#define mmDPP_TOP1_DPP_CONTROL_BASE_IDX                                                                2
#define mmDPP_TOP1_DPP_SOFT_RESET                                                                      0x0e31
#define mmDPP_TOP1_DPP_SOFT_RESET_BASE_IDX                                                             2
#define mmDPP_TOP1_DPP_CRC_VAL_R_G                                                                     0x0e32
#define mmDPP_TOP1_DPP_CRC_VAL_R_G_BASE_IDX                                                            2
#define mmDPP_TOP1_DPP_CRC_VAL_B_A                                                                     0x0e33
#define mmDPP_TOP1_DPP_CRC_VAL_B_A_BASE_IDX                                                            2
#define mmDPP_TOP1_DPP_CRC_CTRL                                                                        0x0e34
#define mmDPP_TOP1_DPP_CRC_CTRL_BASE_IDX                                                               2
#define mmDPP_TOP1_HOST_READ_CONTROL                                                                   0x0e35
#define mmDPP_TOP1_HOST_READ_CONTROL_BASE_IDX                                                          2


// addressBlock: dce_dc_dpp1_dispdec_cnvc_cfg_dispdec
// base address: 0x5ac
#define mmCNVC_CFG1_CNVC_SURFACE_PIXEL_FORMAT                                                          0x0e3a
#define mmCNVC_CFG1_CNVC_SURFACE_PIXEL_FORMAT_BASE_IDX                                                 2
#define mmCNVC_CFG1_FORMAT_CONTROL                                                                     0x0e3b
#define mmCNVC_CFG1_FORMAT_CONTROL_BASE_IDX                                                            2
#define mmCNVC_CFG1_FCNV_FP_BIAS_R                                                                     0x0e3c
#define mmCNVC_CFG1_FCNV_FP_BIAS_R_BASE_IDX                                                            2
#define mmCNVC_CFG1_FCNV_FP_BIAS_G                                                                     0x0e3d
#define mmCNVC_CFG1_FCNV_FP_BIAS_G_BASE_IDX                                                            2
#define mmCNVC_CFG1_FCNV_FP_BIAS_B                                                                     0x0e3e
#define mmCNVC_CFG1_FCNV_FP_BIAS_B_BASE_IDX                                                            2
#define mmCNVC_CFG1_FCNV_FP_SCALE_R                                                                    0x0e3f
#define mmCNVC_CFG1_FCNV_FP_SCALE_R_BASE_IDX                                                           2
#define mmCNVC_CFG1_FCNV_FP_SCALE_G                                                                    0x0e40
#define mmCNVC_CFG1_FCNV_FP_SCALE_G_BASE_IDX                                                           2
#define mmCNVC_CFG1_FCNV_FP_SCALE_B                                                                    0x0e41
#define mmCNVC_CFG1_FCNV_FP_SCALE_B_BASE_IDX                                                           2
#define mmCNVC_CFG1_COLOR_KEYER_CONTROL                                                                0x0e42
#define mmCNVC_CFG1_COLOR_KEYER_CONTROL_BASE_IDX                                                       2
#define mmCNVC_CFG1_COLOR_KEYER_ALPHA                                                                  0x0e43
#define mmCNVC_CFG1_COLOR_KEYER_ALPHA_BASE_IDX                                                         2
#define mmCNVC_CFG1_COLOR_KEYER_RED                                                                    0x0e44
#define mmCNVC_CFG1_COLOR_KEYER_RED_BASE_IDX                                                           2
#define mmCNVC_CFG1_COLOR_KEYER_GREEN                                                                  0x0e45
#define mmCNVC_CFG1_COLOR_KEYER_GREEN_BASE_IDX                                                         2
#define mmCNVC_CFG1_COLOR_KEYER_BLUE                                                                   0x0e46
#define mmCNVC_CFG1_COLOR_KEYER_BLUE_BASE_IDX                                                          2
#define mmCNVC_CFG1_ALPHA_2BIT_LUT                                                                     0x0e48
#define mmCNVC_CFG1_ALPHA_2BIT_LUT_BASE_IDX                                                            2


// addressBlock: dce_dc_dpp1_dispdec_cnvc_cur_dispdec
// base address: 0x5ac
#define mmCNVC_CUR1_CURSOR0_CONTROL                                                                    0x0e4b
#define mmCNVC_CUR1_CURSOR0_CONTROL_BASE_IDX                                                           2
#define mmCNVC_CUR1_CURSOR0_COLOR0                                                                     0x0e4c
#define mmCNVC_CUR1_CURSOR0_COLOR0_BASE_IDX                                                            2
#define mmCNVC_CUR1_CURSOR0_COLOR1                                                                     0x0e4d
#define mmCNVC_CUR1_CURSOR0_COLOR1_BASE_IDX                                                            2
#define mmCNVC_CUR1_CURSOR0_FP_SCALE_BIAS                                                              0x0e4e
#define mmCNVC_CUR1_CURSOR0_FP_SCALE_BIAS_BASE_IDX                                                     2


// addressBlock: dce_dc_dpp1_dispdec_dscl_dispdec
// base address: 0x5ac
#define mmDSCL1_SCL_COEF_RAM_TAP_SELECT                                                                0x0e55
#define mmDSCL1_SCL_COEF_RAM_TAP_SELECT_BASE_IDX                                                       2
#define mmDSCL1_SCL_COEF_RAM_TAP_DATA                                                                  0x0e56
#define mmDSCL1_SCL_COEF_RAM_TAP_DATA_BASE_IDX                                                         2
#define mmDSCL1_SCL_MODE                                                                               0x0e57
#define mmDSCL1_SCL_MODE_BASE_IDX                                                                      2
#define mmDSCL1_SCL_TAP_CONTROL                                                                        0x0e58
#define mmDSCL1_SCL_TAP_CONTROL_BASE_IDX                                                               2
#define mmDSCL1_DSCL_CONTROL                                                                           0x0e59
#define mmDSCL1_DSCL_CONTROL_BASE_IDX                                                                  2
#define mmDSCL1_DSCL_2TAP_CONTROL                                                                      0x0e5a
#define mmDSCL1_DSCL_2TAP_CONTROL_BASE_IDX                                                             2
#define mmDSCL1_SCL_MANUAL_REPLICATE_CONTROL                                                           0x0e5b
#define mmDSCL1_SCL_MANUAL_REPLICATE_CONTROL_BASE_IDX                                                  2
#define mmDSCL1_SCL_HORZ_FILTER_SCALE_RATIO                                                            0x0e5c
#define mmDSCL1_SCL_HORZ_FILTER_SCALE_RATIO_BASE_IDX                                                   2
#define mmDSCL1_SCL_HORZ_FILTER_INIT                                                                   0x0e5d
#define mmDSCL1_SCL_HORZ_FILTER_INIT_BASE_IDX                                                          2
#define mmDSCL1_SCL_HORZ_FILTER_SCALE_RATIO_C                                                          0x0e5e
#define mmDSCL1_SCL_HORZ_FILTER_SCALE_RATIO_C_BASE_IDX                                                 2
#define mmDSCL1_SCL_HORZ_FILTER_INIT_C                                                                 0x0e5f
#define mmDSCL1_SCL_HORZ_FILTER_INIT_C_BASE_IDX                                                        2
#define mmDSCL1_SCL_VERT_FILTER_SCALE_RATIO                                                            0x0e60
#define mmDSCL1_SCL_VERT_FILTER_SCALE_RATIO_BASE_IDX                                                   2
#define mmDSCL1_SCL_VERT_FILTER_INIT                                                                   0x0e61
#define mmDSCL1_SCL_VERT_FILTER_INIT_BASE_IDX                                                          2
#define mmDSCL1_SCL_VERT_FILTER_INIT_BOT                                                               0x0e62
#define mmDSCL1_SCL_VERT_FILTER_INIT_BOT_BASE_IDX                                                      2
#define mmDSCL1_SCL_VERT_FILTER_SCALE_RATIO_C                                                          0x0e63
#define mmDSCL1_SCL_VERT_FILTER_SCALE_RATIO_C_BASE_IDX                                                 2
#define mmDSCL1_SCL_VERT_FILTER_INIT_C                                                                 0x0e64
#define mmDSCL1_SCL_VERT_FILTER_INIT_C_BASE_IDX                                                        2
#define mmDSCL1_SCL_VERT_FILTER_INIT_BOT_C                                                             0x0e65
#define mmDSCL1_SCL_VERT_FILTER_INIT_BOT_C_BASE_IDX                                                    2
#define mmDSCL1_SCL_BLACK_OFFSET                                                                       0x0e66
#define mmDSCL1_SCL_BLACK_OFFSET_BASE_IDX                                                              2
#define mmDSCL1_DSCL_UPDATE                                                                            0x0e67
#define mmDSCL1_DSCL_UPDATE_BASE_IDX                                                                   2
#define mmDSCL1_DSCL_AUTOCAL                                                                           0x0e68
#define mmDSCL1_DSCL_AUTOCAL_BASE_IDX                                                                  2
#define mmDSCL1_DSCL_EXT_OVERSCAN_LEFT_RIGHT                                                           0x0e69
#define mmDSCL1_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX                                                  2
#define mmDSCL1_DSCL_EXT_OVERSCAN_TOP_BOTTOM                                                           0x0e6a
#define mmDSCL1_DSCL_EXT_OVERSCAN_TOP_BOTTOM_BASE_IDX                                                  2
#define mmDSCL1_OTG_H_BLANK                                                                            0x0e6b
#define mmDSCL1_OTG_H_BLANK_BASE_IDX                                                                   2
#define mmDSCL1_OTG_V_BLANK                                                                            0x0e6c
#define mmDSCL1_OTG_V_BLANK_BASE_IDX                                                                   2
#define mmDSCL1_RECOUT_START                                                                           0x0e6d
#define mmDSCL1_RECOUT_START_BASE_IDX                                                                  2
#define mmDSCL1_RECOUT_SIZE                                                                            0x0e6e
#define mmDSCL1_RECOUT_SIZE_BASE_IDX                                                                   2
#define mmDSCL1_MPC_SIZE                                                                               0x0e6f
#define mmDSCL1_MPC_SIZE_BASE_IDX                                                                      2
#define mmDSCL1_LB_DATA_FORMAT                                                                         0x0e70
#define mmDSCL1_LB_DATA_FORMAT_BASE_IDX                                                                2
#define mmDSCL1_LB_MEMORY_CTRL                                                                         0x0e71
#define mmDSCL1_LB_MEMORY_CTRL_BASE_IDX                                                                2
#define mmDSCL1_LB_V_COUNTER                                                                           0x0e72
#define mmDSCL1_LB_V_COUNTER_BASE_IDX                                                                  2
#define mmDSCL1_DSCL_MEM_PWR_CTRL                                                                      0x0e73
#define mmDSCL1_DSCL_MEM_PWR_CTRL_BASE_IDX                                                             2
#define mmDSCL1_DSCL_MEM_PWR_STATUS                                                                    0x0e74
#define mmDSCL1_DSCL_MEM_PWR_STATUS_BASE_IDX                                                           2
#define mmDSCL1_OBUF_CONTROL                                                                           0x0e75
#define mmDSCL1_OBUF_CONTROL_BASE_IDX                                                                  2
#define mmDSCL1_OBUF_MEM_PWR_CTRL                                                                      0x0e76
#define mmDSCL1_OBUF_MEM_PWR_CTRL_BASE_IDX                                                             2


// addressBlock: dce_dc_dpp1_dispdec_cm_dispdec
// base address: 0x5ac
#define mmCM1_CM_CONTROL                                                                               0x0e85
#define mmCM1_CM_CONTROL_BASE_IDX                                                                      2
#define mmCM1_CM_ICSC_CONTROL                                                                          0x0e86
#define mmCM1_CM_ICSC_CONTROL_BASE_IDX                                                                 2
#define mmCM1_CM_ICSC_C11_C12                                                                          0x0e87
#define mmCM1_CM_ICSC_C11_C12_BASE_IDX                                                                 2
#define mmCM1_CM_ICSC_C13_C14                                                                          0x0e88
#define mmCM1_CM_ICSC_C13_C14_BASE_IDX                                                                 2
#define mmCM1_CM_ICSC_C21_C22                                                                          0x0e89
#define mmCM1_CM_ICSC_C21_C22_BASE_IDX                                                                 2
#define mmCM1_CM_ICSC_C23_C24                                                                          0x0e8a
#define mmCM1_CM_ICSC_C23_C24_BASE_IDX                                                                 2
#define mmCM1_CM_ICSC_C31_C32                                                                          0x0e8b
#define mmCM1_CM_ICSC_C31_C32_BASE_IDX                                                                 2
#define mmCM1_CM_ICSC_C33_C34                                                                          0x0e8c
#define mmCM1_CM_ICSC_C33_C34_BASE_IDX                                                                 2
#define mmCM1_CM_ICSC_B_C11_C12                                                                        0x0e8d
#define mmCM1_CM_ICSC_B_C11_C12_BASE_IDX                                                               2
#define mmCM1_CM_ICSC_B_C13_C14                                                                        0x0e8e
#define mmCM1_CM_ICSC_B_C13_C14_BASE_IDX                                                               2
#define mmCM1_CM_ICSC_B_C21_C22                                                                        0x0e8f
#define mmCM1_CM_ICSC_B_C21_C22_BASE_IDX                                                               2
#define mmCM1_CM_ICSC_B_C23_C24                                                                        0x0e90
#define mmCM1_CM_ICSC_B_C23_C24_BASE_IDX                                                               2
#define mmCM1_CM_ICSC_B_C31_C32                                                                        0x0e91
#define mmCM1_CM_ICSC_B_C31_C32_BASE_IDX                                                               2
#define mmCM1_CM_ICSC_B_C33_C34                                                                        0x0e92
#define mmCM1_CM_ICSC_B_C33_C34_BASE_IDX                                                               2
#define mmCM1_CM_GAMUT_REMAP_CONTROL                                                                   0x0e93
#define mmCM1_CM_GAMUT_REMAP_CONTROL_BASE_IDX                                                          2
#define mmCM1_CM_GAMUT_REMAP_C11_C12                                                                   0x0e94
#define mmCM1_CM_GAMUT_REMAP_C11_C12_BASE_IDX                                                          2
#define mmCM1_CM_GAMUT_REMAP_C13_C14                                                                   0x0e95
#define mmCM1_CM_GAMUT_REMAP_C13_C14_BASE_IDX                                                          2
#define mmCM1_CM_GAMUT_REMAP_C21_C22                                                                   0x0e96
#define mmCM1_CM_GAMUT_REMAP_C21_C22_BASE_IDX                                                          2
#define mmCM1_CM_GAMUT_REMAP_C23_C24                                                                   0x0e97
#define mmCM1_CM_GAMUT_REMAP_C23_C24_BASE_IDX                                                          2
#define mmCM1_CM_GAMUT_REMAP_C31_C32                                                                   0x0e98
#define mmCM1_CM_GAMUT_REMAP_C31_C32_BASE_IDX                                                          2
#define mmCM1_CM_GAMUT_REMAP_C33_C34                                                                   0x0e99
#define mmCM1_CM_GAMUT_REMAP_C33_C34_BASE_IDX                                                          2
#define mmCM1_CM_GAMUT_REMAP_B_C11_C12                                                                 0x0e9a
#define mmCM1_CM_GAMUT_REMAP_B_C11_C12_BASE_IDX                                                        2
#define mmCM1_CM_GAMUT_REMAP_B_C13_C14                                                                 0x0e9b
#define mmCM1_CM_GAMUT_REMAP_B_C13_C14_BASE_IDX                                                        2
#define mmCM1_CM_GAMUT_REMAP_B_C21_C22                                                                 0x0e9c
#define mmCM1_CM_GAMUT_REMAP_B_C21_C22_BASE_IDX                                                        2
#define mmCM1_CM_GAMUT_REMAP_B_C23_C24                                                                 0x0e9d
#define mmCM1_CM_GAMUT_REMAP_B_C23_C24_BASE_IDX                                                        2
#define mmCM1_CM_GAMUT_REMAP_B_C31_C32                                                                 0x0e9e
#define mmCM1_CM_GAMUT_REMAP_B_C31_C32_BASE_IDX                                                        2
#define mmCM1_CM_GAMUT_REMAP_B_C33_C34                                                                 0x0e9f
#define mmCM1_CM_GAMUT_REMAP_B_C33_C34_BASE_IDX                                                        2
#define mmCM1_CM_BIAS_CR_R                                                                             0x0ea0